Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the application No. 18/420,121 filed on 01/23/2024.
Election/Restrictions
Applicant’s election without traverse of Invention I in the reply filed on 06/03/2026 is acknowledged.
Applicant’s assertion that claim 11 is a linking claim has been considered but is not persuasive. The restriction requirement was properly made under MPEP § 806.05(f), and applicant elected Invention I without traverse. Accordingly, the restriction requirement is maintained.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3 and 6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 is rejected under 35 U.S.C. § 112(b) as being indefinite because it is unclear what is meant by the recitation that “the surface of the first electrically insulating layer located on a first sidewall section abuts the surface of the first electrically insulating layer located on a second sidewall section.” Claim 1 recites that the first electrically insulating layer lines the sidewalls of the trench and that an electrically insulating plug is positioned in the trench. It is therefore unclear how the surfaces of the first electrically insulating layer located on opposing sidewall sections abut one another while the electrically insulating plug is positioned in the trench. Accordingly, the metes and bounds of the claimed subject matter cannot be determined with reasonable certainty.
Claim 6 is rejected under 35 U.S.C. §112(b) as being indefinite because the recitation “the electrically insulating layer comprises a nitride” renders the scope of the claim unclear. Claim 1 recites a “first electrically insulating layer” and “an electrically insulating plug,” but does not recite “the electrically insulating layer.” Therefore, it is unclear whether applicant intended the recited nitride to correspond to the first electrically insulating layer, the electrically insulating plug, or another structure. Accordingly, the metes and bounds of claim 6 cannot be determined with reasonable certainty.
Claim 1 recites the limitation "the plug" in line 1. There is insufficient antecedent basis for this limitation in the claim. It appears that Applicant was intended for - - the electrically insulating plug- -.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Pub # 2015/0333133 to Boettchet et al. (Boettcher).
Regarding independent claim 1, Boettcher discloses a semiconductor device (Fig. 2b), comprising:
a semiconductor substrate (Fig. 2B: 8 and ¶0055) having a first major surface;
a trench (Fig. 2B: 16) positioned in the semiconductor substrate (8), the trench (16) having a width, a base, and a side wall extending from the base to the first major surface;
a first electrically insulating layer (20 and ¶0074) that lines the base and the side wall of the trench (16);
and
an electrically insulating plug (22 and ¶0074) that is positioned in the trench (16) and that extends across the entire width of the trench (16),
wherein the plug (22) has a lower surface (see Examiner’s mark-up below) that forms an interface (see Examiner’s mark-up below, interface is where bottom of 22 contacts 20 at the base) with the first electrically insulating layer (20) and an upper surface (see Examiner’s mark-up below) that is coplanar (see Fig. 2b) with the first major surface of the semiconductor substrate (8) or that is positioned within the trench (16).
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Regarding claim 3, Boettchet (in view of the 112 second rejection above) disclose wherein the first electrically insulating layer (Fig. 2b: 20) has a surface and a thickness such that the surface of the first electrically insulating layer (20) located on a first sidewall section abuts the surface of the first electrically insulating layer (20) located on a second side wall section that opposes the first side wall section.
Regarding claim 6, Boettchet (in view of the 112 second rejection above) disclose wherein the first electrically insulating layer comprises an oxide and the electrically insulating layer comprises a nitride (¶0066).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2015/0333133 to Boettchet et al. (Boettcher) in view of US Pub # 2021/0328030 to Kim et al. (Kim).
Regarding claim 2, Boettchet disclose all of the limitations of claim 1 from which this claim depends.
Boettchet fails to explicitly disclose wherein the plug is in direct contact with the side wall of the trench or with a native oxide located on the side wall of the trench.
Kim discloses disclose wherein the plug (Fig. 2: 115) is in direct contact with the side wall of the trench (GT1) or with a native oxide located on the side wall of the trench.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have provided the side wall of the trench of Boettchet with the electrically insulating plug as taught by Kim so that the electrically insulating plug contacts the trench sidewalls in order to completely fill the upper portion of the trench, thereby minimizing void formation and providing a stable trench structure.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2015/0333133 to Boettchet et al. (Boettcher) in view of US Pat # 7,622,778 to Lee et al. (Lee).
Regarding claim 4, Boettchet disclose all of the limitations of claim 1 from which this claim depends, including a trench formed in a semiconductor substrate, a first electrically insulating layer disposed within the trench, and an electrically insulating plug positioned in the trench.
Boettchet fails to explicitly disclose wherein the first electrically insulating layer and the electrically insulating plug surround a sealed cavity within the trench.
Lee teaches a trench isolation structure (Fig. 2H) including an insulating layer (132) lining the inner wall of the trench (110) and a separate insulating layer (140) that closes (sealed) the trench opening such that a closed void (142, cavity) is enclosed within the trench (see, e.g., Fig. 2H).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to modify the trench structure of Boettchet to include the sealed cavity taught by the Lee in order to minimize the possibility of a dent formation between the isolation layer and the active region (col. 7, lines 15-17). Such a modification merely applies a known trench isolation configuration to obtain the predictable benefit of improved device reliability and stress relief.
Claims 5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2015/0333133 to Boettchet et al. (Boettcher) in view of US Pub # 2010/0035430 to Andry et al. (Andry).
Regarding claim 5, Boettchet disclose all of the limitations of claim 1 from which this claim depends, including a trench formed in a semiconductor substrate, a first electrically insulating layer disposed within the trench, and an electrically insulating plug positioned in the trench. Boettchet further teaches that the first electrically insulating layer is oxide (¶0066).
Andry teaches forming a trench-fill or trench-plug structure from an oxide material (¶0028). Andry further teaches that the first electrically insulating plug is oxide (¶0028).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to form the electrically insulating plug of Boettchet from the oxide material taught by Andry. A person of ordinary skill would have recognized oxide as a known electrically insulating trench-fill material suitable for electrically isolating adjacent semiconductor regions. The proposed substitution would have predictably provided an electrically insulating plug having improved dielectric isolation and reduced electrical leakage through the trench-fill region.
Regarding claim 7, Boettchet teaches a semiconductor device including a semiconductor substrate formed of silicon (Fig. 2b: 8; ¶0055) and a first electrically insulating layer formed of silicon oxide lining the trench (see the rejection of claim 1). However, Boettchet teaches the electrically insulating plug is formed of polycrystalline silicon rather than silicon oxide.
Andry teaches an electrically insulating trench plug formed of SiOx (Fig. 5G: 170 and ¶0028).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to substitute the polysilicon plug of Boettchet with the silicon oxide plug taught by Andry because silicon oxide is a well-known electrically insulating trench-fill material that provides excellent dielectric isolation, reduces leakage current, and is compatible with conventional trench isolation fabrication processes. The substitution represents the predictable use of one known insulating trench-fill material for another to obtain its recognized insulating properties.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2015/0333133 to Boettchet et al. (Boettcher) in view of US Pub # 2018/0166543 to Blank et al. (Blank).
Regarding claim 8, Boettchet disclose all of the limitations of claim 1 from which this claim depends. Boettchet further discloses wherein the semiconductor substrate (Fig. 2b: 8) comprises an active region (12) comprising a semiconductor device (200) and an edge termination region (14) that laterally surrounds the active region (12), wherein the termination trenches (19) formed in the edge termination region (14).
Boettchet fails to explicitly disclose wherein the trench has a ring- shape and laterally continuously surrounds the active region.
Blank teaches a semiconductor device (Figs. 4A-aB) having a cell region (32), an edge termination region (where edge termination trench 41 are formed) surrounding the cell region (32), and an edge termination trench (41) disposed within the edge termination region and surrounding the cell region (32) (¶0108-0109) and wherein the trench has a ring- shape (¶0113).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to modify the edge termination trench arrangement of Boettchet to employ the ring-shaped edge termination trench taught by the Blank because surrounding the active (cell) region with a continuous edge termination trench provides a more uniform distribution of the electric field (¶0111) around the periphery of the active region, thereby improving edge termination performance and increasing breakdown voltage while maintaining reliable operation of the semiconductor device (¶0146).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2015/0333133 to Boettchet et al. (Boettcher) in view of US Pub # 2018/0166543 to Blank et al. (Blank ‘543) and further in view of US Pub # 2019/0318995 to Blank et al. (Blank ‘995).
Regarding claim 9, Boettchet and Blank ‘543 disclose all of the limitations of claim 8 from which this claim depends. Specifically, Boettchet teaches an active region 12 comprising a plurality of active transistor cells 17 and a plurality of active trenches 16. Boettchet further teaches that active trenches 16 may be formed as discrete columns, thereby teaching or suggesting columnar trenches (¶0061), and teaches semiconductor mesa regions between adjacent active trenches.
Boettchet and Blank “543 do not clearly teach that each columnar trench in the active region comprises a field plate electrically insulated from the semiconductor substrate by an electrically insulating layer lining the columnar trench.
Blank ‘995 teaches a transistor-device cell region 31 comprising a plurality of columnar trenches 37, wherein each columnar trench 37 comprises a field plate 38. Blank ‘995 further teaches that the columnar trenches 37 are lined with an insulating layer 43 that electrically insulates field plate 38 from semiconductor layer 33, including drift region 34 (See, e.g., Fig. 4 and the corresponding description such as ¶0055-0057).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to provide the columnar active trenches of Boettchet with respective field plates and insulating trench liners, as taught by Blank “995, because such a configuration was a known arrangement for controlling and distributing the electric field in transistor cells while electrically isolating each field plate from the semiconductor substrate. The modification would predictably improve voltage-supporting performance and electric-field distribution within the active transistor cells.
Allowable Subject Matter
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 10 recites:
“a third electrically insulating layer arranged on the second electrically insulating layer, wherein the third electrically insulating layer laterally surrounds the field plate and has a lower surface that forms an interface with the second electrically insulating layer and an upper surface that is coplanar with the first major surface of the semiconductor substrate or that is positioned within the columnar trench.”
The considered prior art of record appears to fail to teach or render obvious the instant limitation in combination with all of the limitations of the independent claim.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub # 2015/0194336 to Zhou, US Pat # 8,669,466 to Guha et al., US Pat # 7,038,289 to Marty et al.; US Pub # 2006/0017097 to Hijzen et al. and US Pat # 5,275,974 to Ellul et al.
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/MOHSEN AHMADI/Primary Examiner, Art Unit 2896
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