DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Luan et al. US 2024/0420000 A1 (“Luan”).
As to claim 1, Luan discloses a quantum circuit designing apparatus comprising:
a processor (Figure 17 or Paragraphs 139-142); and
a memory configured to store at least one command to be executed by the processor (Figure 17 or Paragraphs 139-142),
wherein the processor removes devices according to importance of each of the devices in a programmable quantum circuit (Figures 1 or 11 or Paragraphs 16, 75 or 91 – e.g., prioritization according to possible gate elimination, see below).
Luan discloses many of the elements of claim 1, including the optimization of a quantum circuit by removing elements. Luan teaches prioritizing possible designs/configurations with removable elements, rather than prioritizing specific circuit elements. The examiner notes that this is equivalent to determining that removable elements are less important and nonremovable elements are more important. It would have been obvious to one having ordinary skill in the art at the time the invention was made to remove devices according to importance because doing so would allow circuit area and/or cost to be optimized while still maintaining functionality.
Claim 7 recites elements similar to claim 1, and is rejected for the same reasons.
Claim(s) 2 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Luan as applied to claims 1 or 7 above, and further in view of Lahnteenmaki US 2024/0289672 A1 (“Lahnteenmaki”).
As to claim 2, Luan discloses the quantum circuit design apparatus of claim 1, including the use of quantum circuit elements. Luan does not explicitly disclose the additional elements of claim 2. However, the missing element is well known in the art because while disclosing quantum computing hardware. Lahnteenmaki teaches that a conventional way of resding qubit states involves the use of a phase and amplituede shifter which is then detected in order to determine state (Lahnteenmake Paragraph 3). It would have been obvious to one having ordinary skill in the art at the time the invention was made for the device to include a phase shifter because they were commonly used in quantum circuits at the time.
Claim 8 recites elements similar to claim 2, and is rejected for the same reasons.
Allowable Subject Matter
Claims 3-6 and 9-12 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art does not teach or suggest an apparatus or method for quantum circuit design having the combination of steps/elements in the claims including, among other elements, the calculation and removal details of the claims, in combination with the analysis and manipulation elements of the claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRYCE M AISAKA whose telephone number is (571)270-5808. The examiner can normally be reached M-F: 6:30AM-5:00PM PT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached at (571)272-7483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BRYCE M AISAKA/Primary Examiner, Art Unit 2851
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