Tech Center 2800 • Art Units: 1737 2825 2851
This examiner grants 87% of resolved cases
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18511605 | DEVICE FOR GENERATING VERIFICATION VECTOR FOR CIRCUIT DESIGN VERIFICATION, CIRCUIT DESIGN SYSTEM, AND REINFORCEMENT LEARNING METHOD OF THE DEVICE AND THE CIRCUIT DESIGN SYSTEM | Non-Final OA | SAMSUNG ELECTRONICS CO, LTD. |
| 18315076 | METHOD FOR COMPREHENSIVE LOW POWER SIMULATION COVERAGE | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 18332416 | MACHINE LEARNING FOR NETLIST DESIGN | Non-Final OA | QUALCOMM Incorporated |
| 18170777 | RECORDING MEDIUM, DESIGN AIDING METHOD, AND INFORMATION PROCESSING DEVICE | Non-Final OA | Fujitsu Limited |
| 18332773 | DESIGN METHOD OF PHOTOMASK STRUCTURE | Non-Final OA | Powerchip Semiconductor Manufacturing Corporation |
| 18137382 | CONSTANT, EQUAL, OR OPPOSITE REGISTERS OR PORTS DETECTION DURING LOGIC SYNTHESIS | Non-Final OA | Synopsys, Inc. |
| 18192195 | AUTOMATED MULTI-STAGE DESIGN FLOW BASED ON FINAL QUALITY OF RESULT | Non-Final OA | Synopsys, Inc. |
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