Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-16 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Claim 1 recites analyzing, for each of a plurality of apparatuses, a task completion ratio of each of a plurality of automation functions implemented in a plurality of process tasks, mapping the task completion ratios of the automation functions to an evaluation matrix, to obtain a depth level corresponding to each of the apparatuses, analyzing a plurality of expansion ratios corresponding to the depth levels of the apparatuses and analyzing a comprehensive indicator according to the depth levels and the expansion ratios. The analyzing and mapping steps pertain to a mental process since these steps can be performed in the mind using pen and paper and thus falls under the mental process grouping of abstract ideas (MPEP 2106.04(a)(2)(III)).
The claim further recites semiconductor smart manufacturing. These limitations do not integrate the judicial exceptions but instead represents a field of use that is necessary for use of the recited judicial exception (2106.05(h)).
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As noted above, semiconductor smart manufacturing do not integrate the judicial exceptions but instead represents a field of use that is necessary for use of the recited judicial exception (2106.05(h)).
The claim does not include any further additional elements that are sufficient to amount to significantly more than the judicial exception.
Therefore, this claim is rejected.
Claim 9 recites similar limitations and is similarly rejected. The task evaluating unit, depth analyzing unit, expansion unit and indicator analyzing unit are recited at a high level of generality and amount to merely adding a generic computer, generic computer parts or a programmed computer to perform generic computer functions and does not automatically overcome an eligibility rejection (MPEP 2106.05(b)). Therefore, claim 9 is rejected.
Therefore, this claim is rejected.
Claim 2 recites wherein the automation functions include automatic data collection, automatic reporting, automatic analysis, automatic recommendation, automatic execution and automatic monitoring. The automatic data collection, automatic reporting, automatic analysis, automatic recommendation, automatic execution and automatic monitoring pertain to a mental process since these steps can be performed in the mind using pen and paper and thus falls under the mental process grouping of abstract ideas (MPEP 2106.04(a)(2)(III)).
Therefore, this claim is rejected.
Claim 3 recites wherein each of the task completion ratios is 0% to 100%. This limitation is recited at a high level of generality and amount to field of use and technological environment (2106.05(h)).
Therefore, this claim is rejected.
Claim 4 recites wherein the depth levels are 0 to 5. This limitation is recited at a high level of generality and amount to field of use and technological environment (2106.05(h)).
Therefore, this claim is rejected.
Claim 5 recites wherein the evaluation matrix records a plurality of completion threshold ratios. This limitation is recited at a high level of generality and amount to field of use and technological environment (2106.05(h)).
Therefore, this claim is rejected.
Claim 6 recites wherein in the evaluation matrix, the completion threshold ratios remain unchanged or increase in an order of the automation functions. This limitation is recited at a high level of generality and amount to field of use and technological environment (2106.05(h)).
Therefore, this claim is rejected.
Claim 7 recites wherein in the evaluation matrix, the completion threshold ratios remain unchanged or increase in an order of the depth levels. This limitation is recited at a high level of generality and amount to field of use and technological environment (2106.05(h)).
Therefore, this claim is rejected.
Claim 8 recites wherein the comprehensive indicator is a sum of products of the depth levels and the expansion ratios. This limitation is recited at a high level of generality and amount to field of use and technological environment (2106.05(h)).
Therefore, this claim is rejected.
Claims 10-16 recite similar limitations and are similarly rejected.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 4-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Prasad et al (US PUB. 20200073639, herein Prasad) in view of Xiao et al (US PUB. 20150287621, herein Xiao).
Regarding claim 1, Prasad teaches An autonomous evaluation method for [semiconductor smart manufacturing], comprising:
analyzing, for each of a plurality of apparatuses, a task completion ratio of each of a plurality of automation functions implemented in a plurality of process tasks (0098 “the process automation platform may generate, based on the process analysis model and the values for the set of assessment parameters, an automation maturity score representing a level of task automation weighted based on a set of questionnaire responses, and may determine the assessment score based on the automation maturity score”);
mapping the task completion ratios of the automation functions to an evaluation matrix, to obtain a depth level corresponding to each of the apparatuses (0094 “wherein an assessment score is assigned to the particular process based on values for the set of assessment parameters (block 440). For example, the process automation platform (e.g., using computing resource 225, processor 320, memory 330, storage component 340, input component 350, communication interface 370, and/or the like) may automatically assess the particular process based on the particular class, as described above in connection with FIGS. 1A-1D. In some implementations, a set of assessment parameters for assessing the particular process is selected based on the particular class. In some implementations, an assessment score is assigned to the particular process based on values for the set of assessment parameters”;
analyzing a plurality of expansion ratios corresponding to the depth levels of the apparatuses (0031 “process automation platform 110 may perform an artificial neural network processing technique (e.g., using a two-layer feedforward neural network architecture, a three-layer feedforward neural network architecture, and/or the like) to perform pattern recognition with regard to patterns of whether processes including different semantic descriptions are members of a particular class, whether the particular class is automatable using a tool that is configured to resolve another class of processes, and/or the like”, 0024 “process automation platform 110 may process the process data to generate the process analysis model, which may be a deep neural network based model to classify processes and tools associated with automatically completing processes, to determine an assessment score of a suitability of a tool for automatically completing a process, to determine a predicted benefit (e.g., a resource utilization reduction) from implementing a tool for automatically completing a process, and/or the like”);
and analyzing a comprehensive indicator according to the depth levels and the expansion ratios (0024 “process automation platform 110 may process the process data to generate the process analysis model, which may be a deep neural network based model to classify processes and tools associated with automatically completing processes, to determine an assessment score of a suitability of a tool for automatically completing a process, to determine a predicted benefit (e.g., a resource utilization reduction) from implementing a tool for automatically completing a process, and/or the like”, 0031).
The cited prior art do not teach semiconductor smart manufacturing.
Xiao teaches semiconductor smart manufacturing (0024 “automated inputting and outputting of the data obtained from the self-monitoring of the manufacturing equipment, and eliminates missing data and manually-changed data in semiconductor manufacturing processes”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to have modified the teachings of Prasad with the teachings of Xiao since Xiao teaches a means for “automatically collecting the semiconductor manufacturing parameters obtained from self-check or self-monitoring of semiconductor manufacturing equipment” (0004).
Regarding claim 2, the cited prior art teach the cited prior art teach The autonomous evaluation method for the semiconductor smart manufacturing according to claim 1.
Xiao teaches wherein the automation functions include automatic data collection, automatic reporting, automatic analysis, automatic recommendation, automatic execution and automatic monitoring (0025 “operator may click on suitable buttons on the manufacturing equipment to select the semiconductor manufacturing parameters to be monitored. The manufacturing equipment 602 or 603 may be any suitable manufacturing equipment having semiconductor manufacturing functions, such as wafer-processing equipment, testing equipment and/or assembly and packaging equipment”, 0026 “manufacturing equipment 602 or 603 may include an automated data collection system to accept, process, and execute commands”).
Regarding claim 4, the cited prior art teach The autonomous evaluation method for the semiconductor smart manufacturing according to claim 1.
Prasad teaches wherein the depth levels are 0 to 5 ((0031 “process automation platform 110 may perform an artificial neural network processing technique (e.g., using a two-layer feedforward neural network architecture, a three-layer feedforward neural network architecture, and/or the like) to perform pattern recognition with regard to patterns of whether processes including different semantic descriptions are members of a particular class, whether the particular class is automatable using a tool that is configured to resolve another class of processes, and/or the like”, 0024 “process automation platform 110 may process the process data to generate the process analysis model, which may be a deep neural network based model to classify processes and tools associated with automatically completing processes, to determine an assessment score of a suitability of a tool for automatically completing a process, to determine a predicted benefit (e.g., a resource utilization reduction) from implementing a tool for automatically completing a process, and/or the like”).
Regarding claim 5, the cited prior art teach The autonomous evaluation method for the semiconductor smart manufacturing according to claim 1.
Prasad teaches wherein the evaluation matrix records a plurality of completion threshold ratios (0024 “process automation platform 110 may process the process data to generate the process analysis model, which may be a deep neural network based model to classify processes and tools associated with automatically completing processes, to determine an assessment score of a suitability of a tool for automatically completing a process, to determine a predicted benefit (e.g., a resource utilization reduction) from implementing a tool for automatically completing a process, and/or the like”).
Regarding claim 6, the cited prior art teach The autonomous evaluation method for the semiconductor smart manufacturing according to claim 5.
Prasad teaches wherein in the evaluation matrix, the completion threshold ratios remain unchanged or increase in an order of the automation functions (0094 “wherein an assessment score is assigned to the particular process based on values for the set of assessment parameters (block 440). For example, the process automation platform (e.g., using computing resource 225, processor 320, memory 330, storage component 340, input component 350, communication interface 370, and/or the like) may automatically assess the particular process based on the particular class, as described above in connection with FIGS. 1A-1D. In some implementations, a set of assessment parameters for assessing the particular process is selected based on the particular class. In some implementations, an assessment score is assigned to the particular process based on values for the set of assessment parameters”)
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Prasad et al (US PUB. 20200073639, herein Prasad) in view of Xiao et al (US PUB. 20150287621, herein Xiao) in further view of Xu et al (US PUB. 20190236511, herein Xu).
Regarding claim 3, the cited prior art teach The autonomous evaluation method for the semiconductor smart manufacturing according to claim 1.
The cited prior art do not teach wherein each of the task completion ratios is 0% to 100%.
Xu teaches wherein each of the task completion ratios is 0% to 100% (0017 “the derived ratios can include a composition ratio, a conversion rate, and an addition ratio. Each of the derived ratios is an average ratio for the completed task sets. The composition ratio is for each task category and represents a percentage of that task category in a completed task set. The conversion rate represents the possibility that the nominal value of a task category in a task set can be converted into a realized value. The addition ratio represents a ratio at which a total realized value of a completed task set increases over time”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to have modified the teachings of Prasad and Xiao with the teachings of Xu since Xu teaches a means for allocating required resources at the beginning of the particular period of time based on historical data, and to use quantitative methods, together with a real-time visualization system, to provide additional guide for them to prepare for the subsequent periods (0004).
Conclusion
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/TAMEEM D SIDDIQUEE/
Primary Examiner
Art Unit 2116