Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 2 is objected to because of the following informalities: “pattern” in line 5. For the purpose of examination, it is considered as “patterns”. Appropriate correction is required.
Claim 3 is objected to because of the following informalities: “includes” in line 2. For the purpose of examination, it is considered as “include”. Appropriate correction is required.
Claim 14 is objected to because of the following informalities: “includes” in line 2. For the purpose of examination, it is considered as “include”. Appropriate correction is required.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “the plurality of electrode patterns include a plurality of first electrode patterns on one side and a plurality of second electrode patterns on the opposite side, with respect to a plurality of first alleviation patterns therebetween” of claim 15 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 15 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 15, it is not clear as to how the limitation “the plurality of electrode patterns include a plurality of first electrode patterns on one side and a plurality of second electrode patterns on the opposite side, with respect to a plurality of first alleviation patterns therebetween” is being met.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
1. Claim(s) 1,3-5,8,14,16,18 is/are rejected under 35 U.S.C. 102a(1) as being anticipated by US 20220013502 A1 (Lee).
Regarding claim 1, Lee shows (Fig. 1-4) a semiconductor device (100, para 25) comprising:
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a substrate (10W, para 26);
a structure (10MS, wiring structure, para 26) on the substrate, the structure including multilayer metal patterns (plurality of 14A, para 51) and multilayer insulating layers (12, para 51); and
a pad layer (10UI, para 27) on the structure, the pad layer including a plurality of bonding pads (16, para 53),
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wherein a plurality of uppermost patterns at an uppermost level among the multilayer metal patterns include electrode patterns (metal pattern connecting 16) configured to transfer signals and alleviation patterns (DP1-DP3 within 10UI, dummy pad, para 27) configured to not transfer signals, a first ratio (ratio at G1) of the alleviation patterns (DP1) within a first reference shape at a first distance (G1, as shown) from an edge of the structure (left edge) is greater than a second ratio (ratio at G2) of the alleviation patterns (DP2) within a second reference shape at a second distance (G2, as shown) from the edge of the structure, and the first distance is greater than the second distance.
Regarding claim 3, Lee shows (Fig. 1-4) wherein the multilayer metal patterns include the alleviation patterns (DP1-DP3) at the uppermost level and metal patterns thereunder (metal pattern connecting 16), and the alleviation patterns are not electrically connected to the metal patterns.
Regarding claim 4, Lee shows (Fig. 1-4) wherein the first reference shape is a first rectangle, first four alleviation patterns among the alleviation patterns are at four corners of the first rectangle (at G1), and the first ratio is a ratio between a total area of the first rectangle and an area of the first four alleviation patterns within the first rectangle, and the second reference shape is a second rectangle (at G2), second four alleviation patterns among the alleviation patterns are at four corners of the second rectangle, and the second ratio is a ratio between a total area of the second rectangle and an area of the second four alleviation patterns within the second rectangle.
Regarding claim 5, Lee shows (Fig. 1-4) wherein sizes of the first four alleviation patterns defining the first rectangle are same as sizes of the second four alleviation patterns defining the second rectangle, and an area of the first rectangle is smaller than an area of the second rectangle (as shown in Fig. 2).
Regarding claim 8, Lee shows (Fig. 1-4) wherein the structure includes a center region (MPR1, para 28) and a first peripheral region (DPR1, para 28) surrounding the center region, the electrode patterns are in the center region, and a plurality of first alleviation patterns, among the alleviation patterns, are in the first peripheral region.
Regarding claim 14, Lee shows (Fig. 1-4) wherein the multilayer metal patterns include the uppermost patterns (16) and metal patterns thereunder (patterns in 12), and thicknesses of the uppermost patterns are greater than thicknesses of the metal patterns.
Regarding claim 16, Lee shows (Fig. 1-4) a semiconductor package comprising:
a first chip (10C, para 26) including a first bonding pad (16, para 53) and a first pad insulating film (18A, para 54) surrounding the first bonding pad; and
a second chip (20C, para 26) including a second bonding pad (26, para 53) and a second pad insulating film (20UI, para 53) surrounding the second bonding pad, wherein the first chip and the second chip are hybrid-bonded to each other (para 27) such that the first bonding pad and the second bonding pad are in direct contact with each other and the first pad insulating film and the second pad insulating film are in direct contact with each other, the first chip includes, a substrate (10W, para 26), a structure (10MS, wiring structure, para 26) on the substrate, the structure including multilayer metal patterns (metal pattern in 10MS connecting 16, Fig. 4) and multilayer insulating layers (12), and a pad layer (10UI, para 53) on the structure, the pad layer including a plurality of bonding pads (16), a plurality of uppermost patterns at an uppermost level among the multilayer metal patterns include electrode patterns (metal pattern connecting 16) configured to transfer signals and alleviation patterns (DP1-DP3, dummy pad, para 27) configured to not transfer signals, a first ratio (ratio at G1) of the alleviation patterns within a first reference shape at a first distance from an edge of the structure is greater than a second ratio (ratio at G2) of the alleviation patterns within a second reference shape at a second distance from the edge of the structure, and the first distance is greater than the second distance.
Regarding claim 18, Lee shows (Fig. 1-4) wherein sizes of the first four alleviation patterns defining the first rectangle are same as sizes of the second four alleviation patterns defining the second rectangle, and an area of the first rectangle is smaller than an area of the second rectangle (as shown in Fig. 2).
Allowable Subject Matter
Claims 2,6-7,9-13,17,19-20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 2, the prior art of record, either singularly or in combination, does not disclose or suggest the combination of limitations including “at least some of the alleviation patterns are in direct contact with corresponding ones of the dummy pads”.
Regarding claim 6, the prior art of record, either singularly or in combination, does not disclose or suggest the combination of limitations including “sizes of the first four alleviation patterns defining the first rectangle are greater than sizes of the second four alleviation patterns defining the second rectangle”.
Regarding claim 7, the prior art of record, either singularly or in combination, does not disclose or suggest the combination of limitations including “wherein a longitudinal length of the first rectangle is same as a longitudinal length of the second rectangle, and a transverse length of the first rectangle is smaller than a transverse length of the second rectangle”.
Regarding claim 9 or claim 19, the prior art of record, either singularly or in combination, does not disclose or suggest the combination of limitations including “wherein a third ratio of the electrode patterns within a third reference shape within the center region is greater than a fourth ratio of the first alleviation patterns within a fourth reference shape within the first peripheral region”.
Regarding claim 17, the prior art of record, either singularly or in combination, does not disclose or suggest the combination of limitations including “at least some of the alleviation patterns are in direct contact with corresponding ones of the dummy pads”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WASIUL HAIDER whose telephone number is (571)272-1554. The examiner can normally be reached M-F 9 a.m. - 6 p.m..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WASIUL HAIDER/Primary Examiner, Art Unit 2812
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