Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Response to Amendment
Applicant’s amendment dated 05/12/2026 in which claims 2, 6, 7, 9, 10, 11, 13, 17 and 18 were amended has been entered of record. Currently, claims 1-20 are pending in light of the amendment.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless -
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Sforzin (U.S. Patent Application 11,335,416).
Claim 1. An apparatus, comprising: one or more controllers associated with a memory device (comprising local controllers 135 a and b, system controller, host controller, Sforzin Fig 1), wherein the one or more controllers are configured to (configured to is functional language) cause the apparatus to: communicate, from the one or more controllers to the memory device (communicate from local controller Fig 1), one or more program commands (read/write); perform one or more program operations at the memory device using a word line start voltage based at least in part on communicating the one or more program commands (perform a program operation at memory device 130); and communicate a lowest word line starting voltage offset associated with performing the one or more program operations to the one or more controllers (controller 135 is configured to communicate a lowest word line starting voltage offset associated with performing the one or more program operations to the one or more controllers).
Claim 2. The apparatus of claim 1, wherein the one or more controllers are further configured to (configured to is functional language) cause the apparatus to: determine whether a voltage offset exists for a block type (block type taught as 170 Fig 1) associated with the one or more program commands (read/write), wherein to communicate the one or more program commands, the one or more controllers are configured to cause the apparatus to: communicate a command indicating the voltage offset (controller 135 is configured to communicating the one or more program commands, including communicating a command indicating the voltage offset).
Claim 3. The apparatus of claim 2, wherein the word line start voltage is based, at least in part, on communicating the command indicating the voltage offset (the word line start voltage is based, at least in part, on communicating the command indicating the voltage offset through local controller 135 Fig 1).
Claim 4. The apparatus of claim 2, wherein the word line start voltage is based, at least in part, on communicating the command indicating the voltage offset and a default voltage (the word line start voltage is based at least in part on communicating the command indicating the offset and a default voltage through 135).
Claim 5. The apparatus of claim 1, wherein the word line start voltage is based, at least in part, on a default voltage (the word line start voltage is based, at least in part, on a default voltage from PMIC 145 Fig 1).
Claim 6. The apparatus of claim 1, wherein a plurality of block types are associated with the one or more program commands (block types in 100 Fig 1), and the one or more controllers are further configured to (configured to is functional language) cause the apparatus to: determine whether a voltage offset exists for each block type associated with the one or more program commands (commands from command queue 260 Fig 2), wherein to communicate the one or more program commands, the one or more controllers are configure to: communicate a command indicating a voltage offset for (from PMIC 305 Fig 3) each block type based at least in part on determining that the voltage offset exists for the block type (each block type of memory 100 based at least in part on determining that the voltage offset from PMIC exists for the block type in 310 Fig 3).
Claim 7. The apparatus of claim 1, wherein the one or more controllers are further configured to (configured to is functional language) cause the apparatus to: store a word line starting voltage offset for a first page of a block type associated with the one or more program commands (configured store a word line starting voltage offset for a first page of a block type in 310 Fig 3 associated with the one or more program commands from interface 220 Fig 2); compare the stored word line starting voltage offset to a subsequent word line starting voltage offset associated with a subsequent page of the block type (configured to compare the stored word line starting voltage offset to a subsequent word line starting voltage offset associated with a subsequent page of the block type in 310 Fig 3); and replace the stored word line starting voltage offset with the subsequent word line starting voltage offset if the subsequent word line starting voltage offset is less than the stored word line starting voltage offset (Sforzin Fig 3 is configured to replace the stored word line starting voltage offset with the subsequent word line starting voltage offset if the subsequent word line starting voltage offset is less than the stored word line starting voltage offset using memory 310).
Claim 8. The apparatus of claim 7, wherein the one or more controllers are further configured to (configured to is functional language) cause the apparatus to: repeat the comparing and the replacing, until the one or more program operations have been performed on all pages of the block type (Fig 3 is configured to repeat the comparing and the replacing, until the one or more program operations have been performed on all pages of the block type 310 Fig 3); and communicate an indication that the one or more program operations are complete to the one or more controllers (configured to communicate an indication that the one or more read/write program operations are complete to the one or more controllers, through controller 230 Fig 2).
Claim 9. The apparatus of claim 1, wherein to communicate the lowest word line starting voltage offset, the one or more controllers are configured to (configured to is functional language) cause the apparatus to: communicate an indication that the one or more program operations are complete to the one or more controllers (configured to communicate an indication that the program operation is complete to the one or more controllers through bus 253 Fig 2); and communicate the lowest word line starting voltage offset in response to receiving a command from the one or more controllers (configured to communicate the lowest word line starting voltage offset in response to receiving a command from the one or more controllers, storage controller 230 Fig 2).
Claim 10. The apparatus of claim 1, wherein the one or more controllers are further configured to (configured to is functional language) cause the apparatus to: store the lowest word line starting voltage offset and an indication of a block type associated with the word line starting voltage offset at the one or more controllers (configured to store the lowest word line starting voltage offset and an indication of a block type, block 170 Fig 1, associated with the word line starting voltage offset at the one or more controllers, local controller 135 Fig 1).
Claim 11. The apparatus of claim 10, wherein the one or more controllers are configured to (configured to is functional language) cause the apparatus to: store a respective lowest word line start voltage offset for each block type associated with the memory device (wherein the one or more controllers, comprising local controller 135 Fig 1, store a respective lowest word line start voltage offset for each block type, 170 Fig 1, associated with the memory device 130 Fig 1).
Claim 12. A non-transitory computer-readable medium storing code, the code comprising instructions executable by one or more processors to: communicate, from one or more controllers to a memory device (communicate from local controller comprising 135 a and b, system controller, host controller, Sforzin Fig 1), one or more program commands (read/write); perform one or more program operations at the memory device using a word line start voltage based at least in part on communicating the one or more program commands (perform a program operation at memory device 130); and communicate a lowest word line starting voltage offset associated with performing the one or more program operations to the one or more controllers (controller 135 communicates a lowest word line starting voltage offset associated with performing the one or more program operations to the one or more controllers).
Claim 13. The non-transitory computer-readable medium of claim 12, wherein the instructions are further executable by the one or more processors to: determine whether a voltage offset exists for a block type (block type taught as 170 Fig 1) associated with the one or more program commands (read/write), wherein, to communicate the one or more program commands, the instructions are further executable by the one or more processors (Comprising processor in host system 105) to: communicate a command indicating the voltage offset (controller 135 communicated the one or more program commands, including communicating a command indicating the voltage offset).
Claim 14. The non-transitory computer-readable medium of claim 13, wherein the word line start voltage is based, at least in part, on communicating the command indicating the voltage offset (the word line start voltage is based, at least in part, on communicating the command indicating the voltage offset through local controller 135 Fig 1).
Claim 15. The non-transitory computer-readable medium of claim 13, wherein the word line start voltage is based, at least in part, on communicating the command indicating the voltage offset and a default voltage (the word line start voltage is based at least in part on communicating the command indicating the offset and a default voltage through 135).
Claim 16. The non-transitory computer-readable medium of claim 12, wherein the word line start voltage is based, at least in part, on a default voltage (the word line start voltage is based, at least in part, on a default voltage from PMIC 145 Fig 1).
Claim 17. The non-transitory computer-readable medium of claim 12, wherein a plurality of block types are associated with the one or more program commands (block types in 100 Fig 1), and the instructions are further executable by the one or more processors to: determine whether a voltage offset exists for each block type associated with the one or more program commands (commands from command queue 260 Fig 2), wherein to communicate the one or more program commands, the instructions are further executable by the one or more processor (comprising processor in host system 105) to: communicate a command indicating a voltage offset for (from PMIC 305 Fig 3) each block type based at least in part on determining that the voltage offset exists for the block type (each block type of memory 100 based at least in part on determining that the voltage offset from PMIC exists for the block type in 310 Fig 3).
Claim 18. The non-transitory computer-readable medium of claim 12, wherein the instructions are further executable by the one or more processors to: store a word line starting voltage offset for a first page of a block type associated with the one or more program commands (store a word line starting voltage offset for a first page of a block type in 310 Fig 3 associated with the one or more program commands from interface 220 Fig 2); compare the stored word line starting voltage offset to a subsequent word line starting voltage offset associated with a subsequent page of the block type (compare the stored word line starting voltage offset to a subsequent word line starting voltage offset associated with a subsequent page of the block type in 310 Fig 3); and replace the stored word line starting voltage offset with the subsequent word line starting voltage offset if the subsequent word line starting voltage offset is less than the stored word line starting voltage offset (Sforzin Fig 3 is configured to replace the stored word line starting voltage offset with the subsequent word line starting voltage offset if the subsequent word line starting voltage offset is less than the stored word line starting voltage offset using memory 310).
Claim 19. The non-transitory computer-readable medium of claim 18, wherein the instructions are further executable by the one or more processors to: repeat the comparing and the replacing, until the one or more program operations have been performed on all pages of the block type (Fig 3 repeats the comparing and the replacing, until the one or more program operations have been performed on all pages of the block type 310 Fig 3); and communicate an indication that the one or more program operations are complete to the one or more controllers (communicates an indication that the one or more read/write program operations are complete to the one or more controllers, through controller 230 Fig 2).
Claim 20. A method, comprising: communicating, from a controller (local controllers 135) to a memory device (memory device 130 Fig 1), one or more program commands (read/write); performing one or more program operations at the memory device using a word line start voltage based at least in part on communicating (communicate from local controller Fig 1) the one or more program commands (read/write); and communicating a lowest word line starting voltage offset associated with performing the one or more program operations to the controller (controller 135 communicates a lowest word line starting voltage offset associated with performing the one or more program operations to the controller).
Response to Arguments
Applicant's arguments filed 05/12/2026 have been fully considered but they are not persuasive.
Amended claims 2, 6, 7, 9, 10, 11, 13, 17 and 18 are addressed in the 102 rejections above. Examiner notes the use of functional language “configured to” broadens the scope of the limitations. Applicant argues that Sofrin teaches “operation modes for reduced power consumption” as well as operating modes to address the rejection of claims 1, 12 and 20. Applicant argues the cited references are not the same. The claims teach the following claim limitation, configure to perform one or more program operations at the memory device using a word line start voltage based at least in part on communicating the one or more program commands (perform a program operation at memory device 130). In an active mode when memory device 130 is to be programmed one or more program commands signal the device to perform one or more program operations at memory device 130. The word line word line start voltage is present on the wordline of the cell being programmed. The limitations broadest reasonable interpretation is therefore met. Applicant further argues, supply voltages are taught rather program commands. Program commands are sent by supporting Memory System 110 taught in Fig 1 which is controlled by host system 105. Argument is therefore moot. Applicant further argues Sofrin is entirely silent with respect to configured to communicate a lowest wordline voltage. In an active mode when memory device 130 is programmed one or more program commands signal the device to perform one or more program operations at memory device 130. A wordline start voltage is present on the wordline of the cell being programmed. The apparatus is therefore configured to communicate a lowest word line staring voltage offset associate with one or more program operations on the wordline. Independent and dependent claim arguments are therefore moot.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Lappas whose telephone number is (571) 270-1272. The examiner can normally be reached on M-F 7:30AM-5:00PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached on (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JASON LAPPAS/
Primary Examiner, Art Unit 2827
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