DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The objection to claim 14 is withdrawn in view of the amendment correcting its dependency to claim 13.
Priority
Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d).
Information Disclosure Statement
There is no information disclosure statement filed for this application.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 8, 13 and 15 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Applicant asserts that the support for “deposited as a single conformal layer over the plurality of landing areas and continuously extending between the at least one landing area associated with the hot area and the at least one landing area associated with the heat dissipation area.” “can be found in the specification” without identifying where. The specification as originally filed is not seen to describe a heat spreader that is a single, continuous layer spanning both a hot landing area and a dissipation landing area, as distinguished from discrete heat spreader material and a separate heat spreader trace (See, for example, original claim 4). Applicant is required to identify with particularly the support for the amended limitation. MPEP 2163.06.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-7, 15, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Yoo (USPN 11171118 B2, hereinafter “Yoo”) in view of Smits et al. (“Laser Induced Forward Transfer of Graphene”, 10/23/2017, Applied physics letters, 111, 173101-1-173101-4) and Gao et al. (“Thermal chemical vapor deposition grown graphene heat spreader for thermal management of hot spots”, 5/14/2013, Elsevier Ltd, CARBON 61, 342-348).
In regards to claim 1, Yoo et al. (USPN 11171118 B2, hereinafter “Yoo”) discloses (see, for example, Fig. 2) a semiconductor product (200 including semiconductor devices 212, See Col. 3 lines 15-19) comprising
a plurality of landing areas including at least one landing area associated with hot area and at least one landing area associated with a heat dissipation area of the semiconductor product (See, for example, Col. 4 lines 13-19; and Col. 5 lines 25-39 Col. 5 lines 5-20), further comprising heat spreader material (Col. 3 lines 57-67; Col. 4 line 59-65)
Yoo does not teach that the heat spreader material being deposited as a single conformal layer over the plurality of landing areas and continuously extending between the at least one landing area associated with the hot area and the at least one landing area associated with the heat dissipation area.
Gao further teaches that the heat spreader material being deposited as a single conformal layer over the plurality of landing areas and continuously extending between the at least one landing area associated with the hot area and the at least one landing area associated with the heat dissipation area (the insertion of a graphene heat spreader (See, Abstract and Fig. 1(C )) conformally onto a thermal evaluated chip (s) (See, for example, fig. 3) decreases hot spot temperature by ~13oC at heat fluxes up to 430 W/Cm2 (See, for example, Fig. 4), achieving more uniform temperature distribution by spreading heat from hot spots to cooler surrounding areas (surfaces) (See, Figs. 2, 3 and 4 in conjunction with Fig. 1 (c ), Step 6 (Graphene heat spreader on the thermal evaluation chip)). As a result, the reduced hot spot temperature suggests improved temperature uniformity across the chips and enhanced performance and lifetime for electronic devices.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to conformally formed heat spreader material (such as graphene layer) because this would help provide uniform heat dissipation and avoids overheating of specific areas in the chips that affects the computing performance and reliability of the electronic devices.
In regards to claim 3, Yoo as modified above discloses (See, for example, Fig. 3, Gao) the heat spreader material is deposited based in part on a map corresponding to the at least one landing area associated with the hot area and the at least one landing area associated with the heat dissipation area of the semiconductor product (See, Fig. 1(C ), Step 6) is deposited based in part on a map of the hot areas (Hot Spot) and the at least one dissipation area of the semiconductor product (See, Figs. 3 and 4; and pp. 343-345) (Yoo further teaches that thermal routing circuit is specifically configured based on the locations of heat-generating semiconductor devices 212, Fig. 2B, to route thermal energy through layers 232, 242 to dissipation structures (heat spreaders 222), See Col. 2 line 59 thru Col. 3 line 8; and Col. 3 lines 51-67).
In regards to claim 4, Yoo as modified above discloses (See, for example, Fig. 2B, Yoo) the heat spreader material in a first one of the landing areas to receive the heat from the at least one landing area associated with the hot area of the semiconductor product, and in a second one of the plurality landing areas to provide a heat spreader trace from the first one of the plurality of landing areas to the at least one landing area associated with the heat dissipation area of the semiconductor product (graphene device -thermal layer 232 in a first landing area at the semiconductor device 212 (hot area) to receive heat therefrom, and module-thermal layer 242 comprising paths extending through a second landing area via thermal connectors 234 and thermal vias 244 to the spreaders 222. (dissipation area). See, for example, Col. 4 lines 55-67; and Col. 5 lines 5-55).
In regards to claim 5, Yoo as modified above discloses (See, for example, Fig. 2B, Yoo) that wafers, dies, or packages, wherein at least part of the heat spreader material is at a one micron-scale in dimension (Semiconductor assemblies includes semiconductor devices 212 (dies) on substrates within the semiconductor module 204, See Col. 3 lines 11-28; See also, Col. 6 lines 4-25; Gao teaches a monolayer graphene (0.335 nm to 0.345 nm thick, single atomic layer), and falls within a one micron-scale dimension (See, for example, page 345 and under subsection 3.1)).
In regards to claim 6, Yoo as modified above discloses that the at least one landing area associated with the heat dissipation area is part of the semiconductor product and comprises lesser heat generated relative to a neighboring part of the semiconductor product ( the thermal routing circuit routes thermal energy from heat-generating semiconductor devices 212 (hot areas) through graphene layers 232, 242 and thermal vias 244 to heat spreaders 222 (dissipation areas) at peripheral edges of the substrate, which generates lesser heat relative to the neighboring semiconductor devices 212. The heat spreaders 222 are separated from the heat-generating sources by a separation distance 260 (See, Fig. 2B; Col. 3 lines 50-67, and Col. 5 lines 25-53; Yoo; furthermore, Gao teaches (see, for example, Abstract and Fig. 1(C), Step 6) that the graphene heat spreader transfers heat from hot spots to surrounding cooler areas of lesser heat generation).
In regards to claim 7, Yoo as modified above discloses (See, for example, Fig. 2B, Yoo) that the heat spreader material is based in part on graphene and wherein a surface of the semiconductor product or the at least one landing area associated with the heat dissipation area is associated with a heat removal system extending perpendicular to a plane of the semiconductor product to dissipate the heat in a vertical direction relative to the plane of the semiconductor product (the device thermal layer 232 and the module-thermal layer 242 include graphene structures, See Fig. 2B and Col. 4 lines 13-67; and as shown in Fig. 2B, the heat spreaders 222 are configured to dissipate thermal energy vertically, extending perpendicular to the plane of the substrate. The heat spreaders 222 include heat spreading fins thermally coupled to the assembly thermal layer 252. See Col. 5 lines 25-39).
In regards to claim 15, Yoo discloses (See, for example, Fig. 2B) a method for a semiconductor product, the semiconductor product comprising a plurality of landing areas thereon and comprising a heat spreader, the method comprising: (semiconductor assembly 200 with heat-generating semiconductor devices 212 at hot areas within landing areas, and graphene layers 232, 242 over the landing areas, See Col. 3 lines 50-67);
operating the semiconductor product to generate heat from at least one landing area associated with a hot area (operating the semiconductor assembly 200 where semiconductor devices 212 (processing/memory dies) generate thermal energy during operation. See Col. 3, lines 9-29 and 50-67);
transferring the heat from the at least one landing area associated with the hot area through the heat spreader of a transfer area of the plurality of landing areas and extending to the at least one landing area associated with the heat dissipation area (graphene module-thermal layer 242 with traces routing thermal energy laterally from semiconductor devices 212 (hot areas) through thermal connectors 234 and thermal vias 244 (transfer area) to heat spreaders 222. See also, Col. 4, line 48 thru Col 5 line 24); and
dissipating the heat using the at least one landing area associated with the dissipation area of the plurality of landing areas
(heat spreaders 222 at dissipation areas configured to dissipate routed thermal energy, including heat spreading fins perpendicular to the substrate plane. See also Col. 5, lines 25-53).
Yoo is silent about a heat spreader that is conformal over the landing areas; and determining based on the operation, a map identifying a plurality of landing areas., including the at least one landing area associated with a hot area and at least one landing area associated with a heat dissipation area of the semiconductor product.
Gao teaches a heat spreader that is conformal over the landing areas (conformal graphene heat spreading from hot spots to cooler areas. See Fig. 1(C ), Step 6; Figs. 3 and 4, and Abstract); and determining based on the operation, a map identifying a plurality of landing areas., including the at least one landing area associated with a hot area and at least one landing area associated with a heat dissipation area of the semiconductor product (Gao teaches thermal characterization performed during operation of the thermal evaluating chip using a calibrated Pt circuit (See Fig. 3), generating temperature mapping data (See Fig. 4) that identifies hot spots and surrounding cooler (dissipation) areas (See, Fig. 1(C ), Step 6; pp. 343-345)
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to conformally formed heat spreader material (such as graphene layer) because this would help provide uniform heat dissipation and avoids overheating of specific areas in the chips that affects the computing performance and reliability of the electronic devices.
In regards to claim 17, Yoo as modified above discloses the heat spreader is deposited based in part on a map of the at least one landing area associated with the hot area and the at least one landing area associated with the heat dissipation area (Gao teaches thermal characterization mapping identifying hot spots, See for example, Figs. 1(C ), Step 6; and Figs. 3 and 4. Yoo also teaches thermal routing configured from semiconductor device 212 and heat spreader 222 locations. See Fig. 2B).
In regards to claim 18, Yoo as modified above discloses the heat spreader material is in a first one of the plurality of landing areas to receive the heat from an underlying feature of the semiconductor product, and wherein the heat spreader is in a second one of the plurality of landing areas and forming a heat spreader trace from the first one of the plurality of landing areas to the at least one landing area associated with the heat dissipation area of the semiconductor product (Yoo teaches device-thermal layer 232, See Fig. 2B, in a first landing area at underlying semiconductor devices 212 receiving heat, and module-thermal layer 242 with traces in a second landing area extending through thermal vias 244 to heat spreaders 222 (dissipation area). See Col. 4, line 13 thru Col. 5 line 61).
In regards to claim 19, Yoo as modified above discloses the semiconductor product further comprises wafers, dies, or packages, and wherein at least part of the heat spreader is at a one micron-scale in dimension (Yoo teaches semiconductor assemblies includes semiconductor devices 212 (dies) on substrates within the semiconductor module 204, See Col. 3 lines 11-28; See also, Col. 6 lines 4-25; and Gao teaches a monolayer graphene (0.335 nm to 0.345 nm thick, single atomic layer), and falls within a one micron-scale dimension (See, for example, page 345 and under subsection 3.1)).
In regards to claim 20, Yoo as modified above discloses the at least one landing area associated with the heat dissipation area is part of the semiconductor product and comprises lesser heat generated relative to a neighboring part of the semiconductor product ( the thermal routing circuit routes thermal energy from heat-generating semiconductor devices 212 (hot areas) through graphene layers 232, 242 and thermal vias 244 to heat spreaders 222 (dissipation areas) at peripheral edges of the substrate, which generates lesser heat relative to the neighboring semiconductor devices 212. The heat spreaders 222 are separated from the heat-generating sources by a separation distance 260 (See, Fig. 2B; Col. 3 lines 50-67, and Col. 5 lines 25-53; Yoo; furthermore, Gao teaches (see, for example, Abstract and Fig. 1(C), Step 6) that the graphene heat spreader transfers heat from hot spots to surrounding cooler areas of lesser heat generation), or wherein a surface of the semiconductor product or the at least one landing area associated with the heat dissipation area is associated with a heat removal system extending perpendicular to a plane of the semiconductor product to dissipate the heat in a vertical direction relative to the plane of the semiconductor product (the device thermal layer 232 and the module-thermal layer 242 include graphene structures, See Fig. 2B and Col. 4 lines 13-67; and as shown in Fig. 2B, the heat spreaders 222 are configured to dissipate thermal energy vertically, extending perpendicular to the plane of the substrate. The heat spreaders 222 include heat spreading fins thermally coupled to the assembly thermal layer 252. See Col. 5 lines 25-39).
Claims 2, 8-14 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Yoo (in view of Smits and Gao.
In regards to claim 2, Yoo as modified above discloses (See, Figs. 3 and 4, Smits) all limitations of claim 1 except the heat spreader is deposited using a transfer application,
transfer application comprising a laser transfer application to activate deposition of the heat spreader material to form a heat spreader in the landing areas.
Smits while disclosing a laser-induced forward transfer (LIFT) teaches (See, for example, Figs. 3-4) the heat spreader is deposited using a transfer application, transfer application comprising a laser transfer application to activate deposition of the heat spreader material to form a heat spreader in the landing areas (transfer of graphene from a donor substrate to an acceptor substrate (See, Fig. 3), where a triazene-based dynamic release layer is photo decomposed by a laser to propel graphene with well defined shapes onto a target substrate. The LIFT process constitutes a transfer application, See, for example, pp. 173101-1-173101-3)
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to employ the LIFT transfer application process because this would help transfer high device yield applicable to wafers of higher diametric sizes to produce statistically similar devices, which readily yield a device of good junction quality having low contact resistance even without any post fabrication treatments.
In regards to claim 8, Yoo discloses (See, for example, Fig. 2B) a method for a heat spreader for a semiconductor product (See Abstract; an Col. 2, ll. 55–67), the method comprising:
a map comprising a plurality of landing areas that comprises at least one landing area associated with a hot area and at least one landing area associated with a heat dissipation area (the thermal routing circuit within assembly 200 is specifically configured based on knowledge of the locations of heat-generating semiconductor devices 212. See also, for example, Col. 3, lines 50–67);
wherein the heat spreader material is deposited as a single conformal layer over the plurality of landing areas to spread heat associated with the landing area associated with the at least one landing area associated with the heat dissipation area of the semiconductor product (graphene device-thermal layer 232 and module-thermal layer 242 (FIG. 2B) conformally transferring thermal energy laterally from semiconductor devices 212 (hot areas) through thermal connectors 234 and thermal vias 244 to heat spreaders 222 (dissipation areas). See Yoo, FIG. 2B; col. 4, ll. 55–67; col. 5, ll. 1–30)
Yoo is silent about specifically showing the receiving a map comprising a plurality of landing areas that comprises at least one landing area associated with a hot area and at least one landing area associated with a heat dissipation area during operation of the semiconductor product; and the heat spreader is conformal in the landing areas;
Gao teaches (See, for example, Figs. 3 and 4) receiving a map comprising a plurality of landing areas that comprises at least one landing area associated with a hot area and at least one landing area associated with a heat dissipation area semiconductor product (thermal characterization of hot spots using a calibrated Pt circuit on a thermal evaluating chip (Fig. 3) and generating temperature mapping data (Fig. 4) identifying hot area locations during operation. See also, Fig. 1(C), step 6; and pp. 343–345); and the heat spreader is conformal in the landing areas (conformal graphene heat spreading from hot spots (See, Fig. 1(C), step 6; and Fig. 3) to cooler surrounding areas, with ~13°C temperature decrease See also, Abstract; and page 347.)
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to conformally formed heat spreader material (such as graphene layer) because this would help provide uniform heat dissipation and avoids overheating of specific areas in the chips that affects the computing performance and reliability of the electronic devices.
Yoo is also silent about providing a transfer substrate with a heat spreader material; and performing the plurality of landing areas identified
Smits teaches (See, for example, Fig. 3) providing a transfer substrate with a heat spreader material (providing a donor substrate (transfer substrate) with CVD-grown graphene (heat spreader material) thereon, with a triazene-based dynamic release layer (~200 nm) between the donor substrate and the graphene See also, page 173101-1); and performing transfer substrate to the plurality of landing areas identified (using a laser (thermal process) to photo-decompose the triazene release layer, activating forward transfer of the graphene from the donor substrate to the acceptor substrate with well-defined shapes (100 µm × 100 µm) at specific target locations (See, for example, Fig. 4a). See also, pp. 173101-1 to 173101-2).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to employ the LIFT transfer application process because this would help transfer high device yield applicable to wafers of higher diametric sizes to produce statistically similar devices, which readily yield a device of good junction quality having low contact resistance even without any post fabrication treatments.
In regards to claim 9, Yoo as modified above discloses (See, for example, Fig. 3, Smits) the thermal process comprises a laser-based transfer application to activate the deposition of the heat spreader material (a laser photo-decomposes the triazene release layer at 42–54 mJ/cm² to activate deposition of graphene from the donor to the acceptor substrate. See also, pp. 173101-1 thru 173101-3.)
In regards to claim 10, Yoo as modified above discloses (See, Fig. 4, Gao; Fig. 3/ 4 Smits; and Fig. 2B, Yoo) the heat spreader material is deposited based in part on a map of the hot areas and the at least one landing area associated with the heat dissipation area of the semiconductor product (temperature mapping data (Fig. 4) from Pt circuit characterization (Fig. 3) identifying hot area locations, Gao. Thermal routing configured based on known semiconductor device 212 locations, Yoo. Selective LIFT transfer to specific target locations (Smits, See, Fig. 1 (C ), Step 6; and Figs. 3 and 4))
In regards to claim 11, Yoo as modified above discloses
determining the at least one landing area associated with the heat dissipation area of the semiconductor product (Yoo teaches that the thermal routing circuit within assembly 200 (FIG. 2B) is configured to route thermal
energy from semiconductor devices 212 to heat spreaders 222 at peripheral edges (dissipation areas), requiring determination of both hot and dissipation areas. See Yoo, FIG. 2B; Col. 3, lines 50-67; Col. 5, lines 30-50. Gao also teaches identification of both hot spots and surrounding cooler areas (dissipation areas) through thermal characterization See Fig. 1(C ), Step 6; and Figs. 3/4);
determining the map based at least in part on a heat spreader trace to be provided from a first one of the landing areas, which is associated with the at least one hot area, to the at least one landing area associated with the heat dissipation area; (Yoo teaches that the thermal routing circuit includes module-thermal layer 242 (FIG. 2B) having traces (heat spreader traces) connecting semiconductor devices 212 (first landing area / hot area) via thermal connectors 234 and thermal vias 244 to heat spreaders 222 (dissipation area). See also, Col. 4, line 55 thru Col. 5, line 39); and
providing at least one of the heat spreader material in a first one of the landing areas to receive the heat from the at least one hot area, and to provide the heat spreader trace in a second one of the landing areas, the heat spreader trace to extend from the first one of the landing areas to the at least one landing area associated with the heat dissipation area of the semiconductor product.”
(Yoo teaches device-thermal layer 232 in a first landing area at semiconductor devices 212 (hot area) receiving heat therefrom, and module-thermal layer 242 with traces in a second landing area extending from the devices 212 through thermal vias 244 to heat spreaders 222 (dissipation area). See Fig. 2B; Col. 5, ll. 5–61. Smits also teaches that LIFT (Fig. 3) enables selective deposition of graphene with defined shapes at specific locations (Fig. 4a)).
In regards to claim 12, Yoo as modified above discloses (See, Fig. 2B, Yoo) the semiconductor product comprises wafers, dies, or packages, wherein at least part of the heat spreader material is at about a one micron-scale in dimension (semiconductor devices 212 (dies) within semiconductor modules 204 (packages). Gao teaches monolayer graphene (0.335 nm to 0.345 nm thick, single atomic layer), and falls within a one micron-scale dimension (See, for example, page 345 and under subsection 3.1)).
In regards to claim 13, Yoo discloses (See, Fig. 2B) the landing areas comprising at least one hot area to occur during operation of the semiconductor product (semiconductor devices 212 as heat-generating components (hot areas) during operation, See also, Col. 4 lines 13-24); and
the heat spreader material to be in the landing areas and to spread heat associated with the at least one hot area to at least one dissipation area of the semiconductor product (graphene layers 232, 242 spreading heat from semiconductor devices 212 (hot areas) to heat spreaders 222 (dissipation areas), See also Col. 4 lines 13 thru Col. 5 line 39).
Yoo is silent about a transfer application system comprising a transfer substrate with a heat spreader material; and comprising a laser to cause activation of the heat spreader material corresponding to a plurality of landing areas including at least one landing area associated with a hot area and at least one landing area associated with a heat dissipation area of a semiconductor product at landing areas of a semiconductor product.
Smits teaches a transfer application system comprising a transfer substrate with a heat spreader material corresponding to a plurality of landing areas including at least one landing area associated with a hot area and at least one landing area associated with a heat dissipation area of a semiconductor product at landing areas of a semiconductor product (a LIFT system comprising a donor substrate (transfer substrate) with CVD-grown graphene (heat spreader material) thereon and a triazene-based release layer (Smits, Fig. 3). See Smits, Fig. 3; p. 173101-1.); and
comprising a laser to cause activation of the heat spreader material at landing areas of a semiconductor product (a laser used to photo-decompose the triazene release layer (Fig. 3), causing activation and forward transfer of graphene to specific target locations on the acceptor substrate (Fig. 4a). See Smits, Figs. 3–4; pp. 173101-1 to 173101-2).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to employ the LIFT transfer application process because this would help transfer high device yield applicable to wafers of higher diametric sizes to produce statistically similar devices, which readily yield a device of good junction quality having low contact resistance even without any post fabrication treatments.
Yoo is silent about the heat spreader material to be conformally in the plurality of landing area and to spread heat associated with the at least one landing area associated with the hot area to at least one landing area associated with heat dissipation area of the semiconductor product.
Gao teaches the heat spreader material to be conformally in the plurality of landing area and to spread heat associated with the at least one landing area associated with the hot area to at least one landing area associated with heat dissipation area of the semiconductor product (conformal graphene heat spreading from hot spots to cooler areas. See Fig. 1(C ), Step 6; Figs. 3 and 4, and Abstract).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to conformally formed heat spreader material (such as graphene layer) because this would help provide uniform heat dissipation and avoids overheating of specific areas in the chips that affects the computing performance and reliability of the electronic devices.
In regards to claim 14, Yoo as modified above discloses a controller module to control the laser based in part on a map of the landing areas and to enable the activation of the heat spreader material to provide at least one of the heat spreader material in a first one of the landing areas to receive heat from the at least one hot area, and to provide a heat spreader trace in a second one of the landing areas, the heat spreader trace to extend from the first one of the landing areas to the at least one landing area associated with the heat dissipation area of the semiconductor product (Yoo teaches thermal routing including device-thermal layer 232 in a first landing area at semiconductor devices 212 (hot area) and module-thermal layer 242 with traces in a second landing area extending to heat spreaders 222 (dissipation area) See FIG. 2B) and Col. 3, lines 50–67; col. 5, lines 5–39. Smits teaches a LIFT system (Fig. 3) where the laser is controlled to selectively deposit graphene at designated target locations with defined shapes (Fig. 4a), where the laser system constitutes a controller module. “optimal fluence of the laser beam”, in page 173101-2, shows a controllable module. See also Figs. 3/ 4).
In regards to claim 16, Yoo as modified above teaches all limitations of claim 15 except that the heat spreader is provided by using transfer application comprising a laser transfer application to activate deposition of a heat spreader material to form the heat spreader in the plurality of landing areas.
Smits teaches the heat spreader is provided by using transfer application comprising a laser transfer application to activate deposition of a heat spreader material to form the heat spreader in the plurality of landing areas ( a heat spreader provided from a transfer application (the graphene is provided via LIFT (Fig. 3), i.e., from a transfer application. See Yoo, FIG. 2B; Smits, Fig. 3; Gao, Figs. 3 and 4. Smits further teaches LIFT, in Fig. 3, using a laser to activate deposition of graphene from the donor substrate to form a heat spreader at designated landing areas (Fig. 4a)).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to employ the LIFT transfer application process because this would help transfer high device yield applicable to wafers of higher diametric sizes to produce statistically similar devices, which readily yield a device of good junction quality having low contact resistance even without any post fabrication treatments.
Response to Arguments
Applicant's arguments filed 6/9/2026 have been fully considered but they are not persuasive.
Applicant makes the following arguments:
(1) “Landing areas associated with different thermal functions” (Remarks, pp. 8–10). Applicant argues that the claimed landing areas are associated with different thermal functions whereas Smits’ selected target locations are fabrication-defined. The argument is not commensurate in scope with amended claim 1, which no longer recites a transfer application; Smits is not relied upon for claim 1. Moreover, the claims recite no structure distinguishing a landing area “associated with a hot area” from one “associated with a heat dissipation area” — the recitation is a functional designation of surface regions. Yoo’s device regions and peripheral heat spreader regions, and Gao’s hot spot and surrounding cooler regions, satisfy the recitation. See MPEP § 2114.
(2) “Single conformal layer continuously extending” (Remarks, pp. 11–12). Applicant argues that Yoo’s thermal layers, thermal connectors, thermal vias, and heat spreaders do not render this limitation obvious. The Examiner does not rely on Yoo for this limitation. As set forth above, Gao teaches a single continuous conformal graphene film spanning the hot spot and the surrounding cooler regions. Additionally, the limitation is a product-by-process recitation in claims 1 and 13; patentability is determined by the structure implied. See MPEP § 2113.
(3) References attacked individually (Remarks, pp. 9–12). Applicant separately argues Yoo, then Smits, then Gao. One cannot show nonobviousness by attacking references individually where the rejection is based on a combination of references. See MPEP § 2145(IV); In re Keller, 642 F.2d 413 (CCPA 1981); In re Merck & Co., 800 F.2d 1091 (Fed. Cir. 1986).
(4) Independent claims 8, 13, and 15 and the dependent claims (Remarks, pp. 12–13). Applicant relies on the arguments presented for claim 1. Those arguments are not persuasive for the reasons given above, and the dependent claims stand rejected as set forth in the mapping tables.
(5) Unsupported assertions. Applicant’s repeated statements that the references “do not teach or suggest” the amended limitations are not accompanied by an identification of what structure is absent from the cited disclosures. Attorney’s argument cannot take the place of evidence. See MPEP § 2145.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Correspondence
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERMIAS T WOLDEGEORGIS whose telephone number is (571)270-5350. The examiner can normally be reached on Monday-Friday 8 am - 5 pm E.S.T..
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERMIAS T WOLDEGEORGIS/Primary Examiner, Art Unit 2893
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