Prosecution Insights
Last updated: October 22, 2026
Application No. 18/429,116

ELECTRONIC DEVICE

Non-Final OA §102§103§112
Filed
Jan 31, 2024
Examiner
SMITH, CHAD
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Advanced Semiconductor Engineering Inc.
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
737 granted / 934 resolved
+10.9% vs TC avg
Strong +20% interview lift
Without
With
+20.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
26 currently pending
Career history
970
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
46.9%
+6.9% vs TC avg
§102
40.3%
+0.3% vs TC avg
§112
10.1%
-29.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 934 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1 – 9, 11 – 13, 21 – 28 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: Claim 1 recites a second path having a higher speed than the first path. However, it is unclear to the examiner how a path has a speed. The claim implies that the second path is physically moving at a rate with respect to the first path without structural support for such a limitation. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 – 3, 6 – 9 and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Guidotti et al. (U.S. PG Pub. # 2006/0269288 A1). In Re claim 1, ‘288 teaches an electronic device (fig. 2), comprising: a plurality of electronic components (8 and 10 or 153 and 155); and a circuit structure (17) connected to the plurality of electronic components, wherein the circuit structure is configured to connect the electronic components adjacent to each other along a first path (62), and the circuit structure is further configured to connect the electronic components along a second path (7) having a greater length and a higher speed than the first path (par. 0028). In Re claims 2, 3, 6 and 7, ‘288 teaches the claimed limitations (pars. 0030, 0032, fig. 2). In Re claim 8, ‘288 teaches wherein the first path is closer to the electronic components than the second path is (62 contacts 153 and 155, 7 doesn’t). In Re claim 9, ‘288 teaches a photonic component configured to provide a photoelectric conversion (3 or 9) and electrically connecting the circuit structure to the plurality of electronic components (fig. 2). In Re claim 11, ‘288 teaches wherein the circuit structure comprises an optical channel (7) optically coupled to the photonic component and configured to connect the electronic components along the second path (fig. 2). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 4, 5 and 21 – 28 are rejected under 35 U.S.C. 103 as being unpatentable over Guidotti et al. (U.S. PG Pub. # 2006/0269288 A1). In Re claim 4, ‘288 teaches the device of claim 1 but is silent to the claimed range. It is well known in the art that electrical communication along electric paths is 50% to 70% the speed of optical communication along waveguides. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of ‘288 to make the electrical communication along electric path to be 50% to 70% the speed of optical communication along the light guiding structure thus ensuring high speed optical signal communication and lessening the design characteristics needed for high speed electrical signals via the electrical connection portion, thus allowing for cost efficient production of the device. In Re claim 5, ‘288 teaches that the circuit structure is a flexible substrate (par. 0029). Its well known in the art to use flexible circuits to fold back on themselves to save real-estate in communication devices. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to fold the device of fig. 2 back on itself whereby both the paths extend vertically as some point and horizontal at another. In Re claims 21 – 28, ‘288 teaches power modules (1, 11, par. 0029) and photonic components (3, 9),and circuit structure as claimed, but is silent to c4 bumps, the circuit layers, bridges, conductive pillars, cooling device, connection elements, an underfill, an encapsulant, conductive pad, solder bump, a thermal pipe, a processing component, memory, optical grid as claimed. However, it is well known in the art to use C4 bumps to attach circuits to one another as an expedient way of manufacture; to have multiple circuit layers, bridges, conductive pillars, cooling device, connection elements, an underfill, an encapsulant, conductive pad, solder bump, a thermal pipe, a processing component, memory, optical grid as claimed so as to allow for a robust and reliable device. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify ‘288 to use the claimed structures as claimed so as to create a cost efficient, robust and reliable device as a person with ordinary skill has good reason to pursue the known options within his or her technical grasp. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHAD SMITH whose telephone number is (571)270-1294. The examiner can normally be reached M-F 7:30 - 5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at 1-571-272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHAD H SMITH/ Primary Examiner, Art Unit 2874
Read full office action

Prosecution Timeline

Jan 31, 2024
Application Filed
Oct 07, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12761419
WAVEGUIDE WITH PERIODIC INDEX OF REFRACTION CLADDING
3y 6m to grant Granted Oct 13, 2026
Patent 12742994
OPTICAL DEVICE AND METHOD OF FABRICATING THEREOF
3y 7m to grant Granted Sep 22, 2026
Patent 12736748
INTEGRATED PHOTONICS OPTICAL GYROSCOPES WITH IMPROVED SENSITIVITY UTILIZING HIGH DENSITY SILICON NITRIDE WAVEGUIDES
2y 9m to grant Granted Sep 15, 2026
Patent 12736398
INTEGRATED OPTICAL SYSTEM-BASED OPTICAL DETECTION DEVICE
2y 4m to grant Granted Sep 15, 2026
Patent 12730257
OPTICAL FIBER WITH WIDE BANDWIDTH AND HIGH GAINS IN O+E BAND AND REGULATION METHOD THEREOF
2y 6m to grant Granted Sep 08, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+20.4%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 934 resolved cases by this examiner. Grant probability derived from career allowance rate.

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