Prosecution Insights
Last updated: October 02, 2026
Application No. 18/429,941

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Non-Final OA §102§103
Filed
Feb 01, 2024
Priority
Jul 28, 2023 — RE 10-2023-0099009 +1 more
Examiner
WARREN, MATTHEW E
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SK hynix Inc.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
892 granted / 1017 resolved
+19.7% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
18 currently pending
Career history
1035
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
52.3%
+12.3% vs TC avg
§102
35.1%
-4.9% vs TC avg
§112
9.5%
-30.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1017 resolved cases

Office Action

§102 §103
DETAILED ACTION This Office Action is in response to the Election and Amendment filed on June 1, 2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant's election with traverse of Species A, claims 1-12, in the reply filed on June 1, 2026 is acknowledged. The traversal is on the ground(s) that the amendments to Species B make it such that the claims no longer define patentably distinct species. This is not found persuasive because the species still disclose patentably distinct elements. For instance, claim 13, considered to be representative of Species B, discloses recessing the monocrystalline silicon layer through the sacrificial vertical openings. Species A discloses forming a first dielectric layer that covers a preliminary horizontal layer and forming a second dielectric layer over the first dielectric layer. These elements are not found in each other and mutually exclusive. The requirement is still deemed proper and is therefore made FINAL. Claims 13-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-5, 7, and 11 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kim et al. (US Pub. 2023/0413517 A1). The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. In re claim 1, Kim et al. discloses ([0071-0086]; figs. 10-21) a method for fabricating a semiconductor device, the method comprising: forming a stack body (fig. 10; SB) including a recess target layer (15) over a lower structure; forming sacrificial isolation openings (fig. 11; 18) in the stack body; forming sacrificial isolation layers including blocking layers (fig. 14; 21’) in the sacrificial isolation openings; forming sacrificial vertical openings (fig. 20; 27) in the stack body between the sacrificial isolation layers; forming a preliminary horizontal layer (fig. 12; 15 at 19) by recessing the recess target layer (15) of the stack body through the sacrificial vertical openings; forming a first dielectric layer (fig. 15; 20) that covers the preliminary horizontal layer; forming a second dielectric layer (fig. 15; 22) over the first dielectric layer; forming cell isolation openings (fig. 18; 26) by removing the sacrificial isolation layers; and trimming the first dielectric layer (fig. 17; at 24) through the cell isolation openings. In re claim 2, Kim et al. discloses ([0071-0086]; figs. 10-21) the blocking layers include a material having an etch selectivity with respect to the recess target layers (since the materials are different). In re claim 3, Kim et al. discloses ([0071-0086]; figs. 10-21) the blocking layers include silicon nitride, polysilicon, or a combination thereof In re claim 4, Kim et al. discloses ([0071-0086]; figs. 10-21) wherein the forming of the sacrificial isolation layers including the blocking layers includes: conformally forming the blocking layers over the sacrificial isolation openings, respectively; forming a sacrificial liner layer over the blocking layers; and forming a sacrificial gap-fill layer that fills the sacrificial isolation openings over the sacrificial liner layer. In re claim 5, Kim et al. discloses ([0077-0079]; figs. 10-21) wherein the sacrificial liner layer includes silicon oxide, and the sacrificial gap-fill layer includes amorphous carbon. In re claim 7, Kim et al. discloses ([0071-0086]; figs. 10-21) before the trimming of the first dielectric layer (fig. 17; at 24), forming a horizontal layer by trimming side surfaces of the preliminary horizontal layer (fig. 12; 15 at 19). In re claim 11, Kim et al. discloses ([0071-0086]; fig. 10) forming the stack body including the recess target layer includes sequentially forming a first sacrificial layer stack (lowest SB 13-16), the recess target layer (15), and a second sacrificial layer stack (upper SB 13-17). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 6, 9, and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US Pub. 2023/0413517 A1) as applied to claim 1 above, and further in view of the cited case law. In re claim 6, Kim et al. does not disclose wherein the recess target layer includes a monocrystalline silicon layer. However, such materials are well known in the art of semiconductors for use in memory devices. In re claim 9, Kim et al. does not disclose wherein a cross section of the horizontal layer has a cross shape, however any desired shape can be used to form a layer in a semiconductor device. In re claim 10, Kim et al. does not specifically disclose the blocking layers are formed in a double structure of polysilicon and silicon nitride. However, such materials are well known in the art of semiconductors for use in memory devices. Allowable Subject Matter Claims 8 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim (US Pub. 2023/0320067 A1), Feng (US Pub. 2024/0081041 A1), Yang (US Pub. 2024/0057308 A1), Feng (WO-2024051062 A1), Dou (WO-2024007367-A1), Wu (CN-118829219-A), and Shao (CN-115050744-A) also disclose various elements of the claims. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW E WARREN whose telephone number is (571)272-1737. The examiner can normally be reached Mon-Fri 10am - 6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, KRETELIA GRAHAM can be reached at 571-272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MATTHEW E WARREN/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Feb 01, 2024
Application Filed
Sep 10, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
93%
With Interview (+5.1%)
2y 7m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1017 resolved cases by this examiner. Grant probability derived from career allowance rate.

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