DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Invention of Embodiment 2 of Figures 10-12, Claims 1-20, in the reply filed on 07/06/2026 is acknowledged. The traversal is on the ground(s) that both Embodiment 1 and Embodiment 2 include a charge bump, a bonding pad with corresponding switch, PMIC, a voltage generator, etc., therefore, are not patentably distinct This is not found persuasive because Embodiment 1 shows a bonding pad with a bonding pad switch, and Embodiment 2, on the other hands, shows a plurality of bonding pads with a plurality of bonding pad switches.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park (US 2017/0154666) in view of Suh (PN 8,698,321).
Regarding claim 1, Park discloses, as shown in Figures, a memory device comprising:
a first chip (die #1) comprising a memory cell array [0030]; and
a second chip (die #2) bonded to the first chip and comprising a voltage generator ([0006],[0025],[0076]-[0079]) configured to generate a voltage which is supplied to the memory cell array,
wherein the second chip is connected to the voltage generator and bonded to an external charge pump (156 in die #k).
Park does not disclose the second chip comprises a bonding pad. However, Suh disclose a chip (die 1 to die 4) comprises a bonding pad (no label, or 504, 510, 516, 522 of Figure 5). Note Figures 1-5 of Suh. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the chip of Park comprising a bonding pad, such as taught by Suh in order to provide a better electrical connection between the chips.
Regarding claim 2, Park and Suh disclose the second chip comprises:
a first surface (a bottom surface of die #2) bonded to the first chip; and
a second surface (an upper surface of die #2) on which the bonding pad is formed.
Allowable Subject Matter
Claims 3-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 9-20 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Applicant' s claims 3-20 are allowable over the references of record because none of these references disclose or can be combined to yield the claimed memory device comprising a second chip comprises a bonding pad switch configured to adjust a connection between the bonding pad and the voltage generator, a wire pad connected to the voltage generator in parallel with the bonding pad and connected to an external power management integrated circuit (PMIC), and a wire pad switch configured to adjust a connection between the wire pad and the voltage generator, as recited in claim 3; none of these references disclose or can be combined to yield the claimed memory device comprising the second chip comprises: a connection circuit supplied with an external voltage, and a voltage generator configured to generate a voltage which is supplied to the memory cell array based on the external voltage, wherein the connection circuit comprises: a plurality of bonding pads connected to the voltage generator, wherein each bonding pad of the plurality of bonding pads is bonded to a corresponding external charge pump from among a plurality of external charge pumps, a plurality of bonding pad switches configured to adjust a connection between the each bonding pad and the voltage generator, a wire pad connected to the voltage generator in parallel with the plurality of bonding pads, and connected to an external power management integrated circuit, and a wire pad switch configured to adjust a connection between the wire pad and the voltage generator, in combination with the remaining claimed limitations of claim 9; none of these references disclose or can be combined to yield the claimed memory system comprising a memory device comprises: a memory cell array, a connection circuit supplied with an external voltage, and a voltage generator configured to generate a voltage supplied to the memory cell array based on the external voltage, wherein the connection circuit comprises: a plurality of bonding pads connected to the voltage generator, wherein each bonding pad of the plurality of bonding pads is bonded to a corresponding external charge pump from among a plurality of external charge pumps, a plurality of bonding pad switches configured to adjust a connection between the each bonding pad and the voltage generator, a wire pad connected to the voltage generator in parallel with the plurality of bonding pads, and connected to an external power management integrated circuit, and a wire pad switch configured to adjust a connection between the wire pad and the voltage generator, in combination with the remaining claimed limitations of claim 16.
Conclusion
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/HUNG K VU/ Primary Examiner, Art Unit 2897
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