DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Amendment filed 7/2/2026.
Claims 1-17 are pending. Claims 18-20 are cancelled.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 2/2/2024 and 3/28/2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Election/Restrictions
Applicant’s election of Invention I in the reply filed on 7/2/2024 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claims 18-20, which have been canceled, withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 7/2/2026.
Applicant's election with traverse of Species II in the reply filed on 7/2/2024 is acknowledged. The traversal is on the ground(s) that the search and examination of the entire application could be made without undue burden (Remarks 6-7).
This is not found persuasive because Species I and II require a different field of search (e.g., searching different classes /subclasses or electronic resources, or employing different search strategies or search queries) and thus there would be serious search and/or examination burden to search for both the features of Species I and II. The requirement is still deemed proper and is therefore made FINAL.
Claim 2 is withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected Species, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 7/2/2026.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 9, 11 and 16-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hung et al. (US 6,628,550 B1, hereinafter “Hung”).
Regarding independent claim 9, Figure 2 of Hung discloses a memory device, comprising:
an erasure gate region (Col. 8, Lines 5-8) comprising:
a first well 204 (“p-well”- Col. 7, Line 43-44); and
a floating gate transistor comprising:
a first channel region 214 (“n- pocket doped region”- Col. 7, Lines 45-46) that and a second channel region 212 (“n-well”- Col. 7, Lines 45-46) are disposed along a first direction; and
a floating gate structure 218 (“floating gate”- Col. 7, Lines 46-47) disposed above the first channel region 214 and the second channel region 212, and the floating gate structure 218 extending above the first well 204 along a second direction different from the first direction, wherein the first channel region and the second channel region have different critical voltages of channel formation, since the first and second channel regions 214 and 212 have different dimensional aspects (i.e., different sized areas), which would affect their respective critical voltages of channel formation.
Regarding claim 11, Figure 2 of Hung discloses wherein an first area of the first channel region 214 under the floating gate structure 218 is smaller than an second area of the second channel region 212 under the floating gate structure 218.
Regarding claim 16, Figure 2 of Hung discloses wherein the first channel region 214 and the second channel region 212 have different doping concentrations (Col. 5, Lines 53-57, Col. 6, Lines 3-8).
Regarding claim 17, Figure 2 of Hung discloses wherein along the first direction, the first channel region 214 has a first width and the second channel region 212 has a second width greater than the first width.
Allowable Subject Matter
Claims 1 and 3-8 are allowed.
Regarding independent claim 1, Figure 2 of Hung discloses a memory device, comprising:
a first well 204 (“p-well”- Col. 7, Line 43-44);
a first doped region 212 (“n-well”- Col. 7, Lines 45-46) disposed in the first well 204 and coupled to an erasure signal line (Col. 9, Lines 57-60), and the first doped region 212 having a first conducting type; and
a floating gate structure 218 (“floating gate”- Col. 7, Lines 46-47) crossing above the first well 204 and a second well 214 (“n- pocket doped region”- Col. 7, Lines 45-46).
Hung does not expressly disclose a second doped region disposed in a second well and coupled to a bit line, and the second doped region having a second conducting type and the floating gate structure comprising a first gate structure having a first capacitive coupling ratio and a second gate structure, wherein the first gate structure and the second gate structure are disposed above the second well, and the second gate structure has a second capacitive coupling ratio different from the first capacitive coupling ratio.
Thus, regarding independent claim 1, the claim is allowed, because the prior art of record including Hung, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “a second doped region disposed in a second well and coupled to a bit line, and the second doped region having a second conducting type” and “the floating gate structure comprising: a first gate structure having a first capacitive coupling ratio and a second gate structure, wherein the first gate structure and the second gate structure are disposed above the second well, and the second gate structure has a second capacitive coupling ratio different from the first capacitive coupling ratio”.
Claims 3-8 are allowed as being dependent on allowed claim 1.
Claims 10 and 12-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 10, the prior art of record including Hung, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein an first absolute value of the critical voltage of channel formation of the first channel region is smaller than an second absolute value of the critical voltage of channel formation of the second channel region”.
Regarding claim 12 (which claims 13-15 depend from), the prior art of record including Hung, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the floating gate structure comprises: a first gate structure disposed above the first channel region and having a first width along the first direction; and a second gate structure disposed above the second channel region and having a second width greater than the first width along the first direction, wherein the first gate structure and the second gate structure have different doping concentrations”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Jeon et al. (US 2008/0029808 A1), which discloses a memory device comprising a floating gate structure disposed over a first well.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JAY C CHANG/Primary Examiner, Art Unit 2817
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