DETAILED ACTION
This Office action is in response to the election filed 13 May 2026. Claims 1-20 are currently pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-14, in the reply filed on 13 May 2026 is acknowledged.
Claims 15-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 13 May 2026.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6, 7, 13, and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 recites the limitation "the at least one electrode layer" in line 2. There is insufficient antecedent basis for this limitation in the claim. It is unclear whether this limitation refers to the previously recited “at least one of the plurality of electrode layers” or a different electrode layer of the plurality of electrode layers. For the purposes of examination, the former is assumed.
Claim 7 recites the limitation "the at least one electrode layer" in line 2. There is insufficient antecedent basis for this limitation in the claim. It is unclear whether this limitation refers to the previously recited “at least one of the plurality of electrode layers” or a different electrode layer of the plurality of electrode layers. For the purposes of examination, the former is assumed.
Claim 13 recites the limitation “the average grain diameter of the multiple crystal grains in the third layer is twice a thickness of the third layer or more.” It is unclear how the crystal grains in the third layer can have an average grain diameter that is twice a thickness of the third layer itself, since the grains are contained within the third layer. It is not clear how the constituents that make up a layer can exceed the thickness of the layer itself. For the purposes of examination, it is assumed the third layer contains multiple crystal grains with an average grain diameter.
Claim 14 recites the limitation "the at least one electrode layer" in line 3. There is insufficient antecedent basis for this limitation in the claim. It is unclear whether this limitation refers to the previously recited “at least one of the plurality of electrode layers” or a different electrode layer of the plurality of electrode layers. For the purposes of examination, the former is assumed.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0189989 A1 to Toda et al. (hereinafter “Toda”) in view of US 2007/0001246 A1 to Lim et al. (hereinafter “Lim”) and US 2011/0031550 A1 to Komori (hereinafter “Komori”).
Regarding independent claim 1, Toda (Fig. 5) discloses a semiconductor device comprising:
a film stack 16 (¶ 0033) including a plurality of electrode layers 7 (¶ 0033) and a plurality of first insulating films 14 (¶ 0033) alternately stacked on top of one another (Fig. 5);
a charge storage layer 4 (¶ 0018) provided between a side face (side) of the electrode layers 7 through a second insulating film 5a (¶ 0048); and
a semiconductor layer 2 (¶ 0018) provided between a side face (side) of the charge storage layer 4 through a third insulating film 3 (¶ 0018), wherein at least one of the plurality of electrode layers 7 includes a first layer 7a (¶ 0027) and a second layer 7b (¶ 0027), the first layer is a layer including tungsten and nitrogen (¶ 0027), and the second layer is a layer including tungsten (¶ 0027).
Toda does not expressly disclose the first layer is a polycrystalline layer, and the second layer is an amorphous layer.
In the same field of endeavor, Lim discloses an electrode with a barrier layer including a polycrystalline layer including tungsten and nitrogen (¶ 0032). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the material of Lim in the device of Toda for the purpose of providing an art-recognized material known to be suitable for use in semiconductor device barrier layers, as exemplified by Lim.
In the same field of endeavor, Komori discloses an electrode including an amorphous layer including tungsten (¶ 0111). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the material of Komori in the device of Toda for the purpose of providing an art-recognized material known to be suitable for use in semiconductor device electrodes, as exemplified by Komori.
Regarding claim 3, Toda, Lim, and Komori disclose the semiconductor device according to claim 1, wherein the second layer further includes boron or silicon (Komori, ¶ 0111 - amorphous tungsten silicide includes silicon).
Regarding claim 4, Toda, Lim, and Komori disclose the semiconductor device according to claim 1, however fail to expressly disclose: wherein a silicon concentration in the second layer is between about 6.0×10.sup.21 and about 1.5×10.sup.22 atoms/cm.sup.3. However, it would have been obvious to one of ordinary skill in the art at the time the invention was made to provide a silicon concentration within the above recited range, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F .2d 272, 205 USPQ 215 (CCPA 1980). Here, the silicon concentration is considered a result effective variable because varying the silicon concentration in tungsten silicide affects the resistivity and work function of the electrode. Thus the ordinary artisan would have been motivated to modify the concentration for the purpose of adjusting the performance of the electrode.
Regarding claim 5, Toda, Lim, and Komori disclose the semiconductor device according to claim 1, wherein a silicon concentration in the second layer is higher than a boron concentration in the second layer (Komori - ¶ 0111, no boron is disclosed, thus its concentration is zero).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Toda, Lim, and Komori as applied to claim 1 above, and further in view of US 5,487,923 to Min et al. (hereinafter “Min”).
Regarding claim 2, Toda, Lim, and Komori disclose the semiconductor device according to claim 1, however fail to expressly disclose: wherein the first layer further includes fluorine or chlorine.
In the same field of endeavor, Min discloses a method of depositing a tungsten nitride layer utilizing WF6 as a feed gas in a CVD process is well-known and conventional in the art (col. 1, l. 10-20). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the conventional method as disclosed by Min, to form the first layer containing tungsten and nitride of the device of Toda, Lim, and Komori, for the purpose of utilizing an art-recognized method with readily available materials to form the first layer. One of ordinary skill in the art would appreciate that the use of WF6 in the CVD process results in some small amount of fluorine remaining in the deposited layer as a contaminant, thus, resulting in the deposited first layer further including fluorine as recited.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Toda, Lim, and Komori as applied to claim 1 above, and further in view of US 6,245,673 B1 to Okubo et al. (hereinafter “Okubo”).
Regarding claim 6, as best understood, Toda, Lim, and Komori disclose the semiconductor device according to claim 1, wherein the at least one electrode layer further includes a third layer, the third layer is a polycrystalline layer including tungsten, and the second layer is provided between the first layer and the third layer.
In the same field of endeavor, Okubo discloses a semiconductor device including an electrode layer including a polycrystalline layer including tungsten (col. 4, l. 40-51). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the material of Okubo as an additional layer in the device of Toda, Lim, and Komori for the purpose of providing an electrode material allowing control of resistance to migration and reduced resistance (col. 4, l. 40-51; col. 1, l. 10-39). All the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Claims 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Toda, Lim, and Komori as applied to claim 1 above, and further in view of US 2006/0244084 A1 to Lee et al. (hereinafter “Lee”).
Regarding claim 7, Toda, Lim, and Komori disclose the semiconductor device according to claim 1, however fail to expressly disclose wherein the at least one electrode layer further includes a fourth layer including tungsten, silicon, and nitrogen, and the fourth layer is provided between the first layer and the second layer.
In the same field of endeavor, Lee discloses a semiconductor device including an electrode layer including a layer including tungsten, silicon, and nitrogen (¶ 0004). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the material of Lee in a layer of the device of Toda, Lim, and Komori for the purpose of providing an art-recognized material known to be suitable for use in semiconductor device electrode barrier layers, as exemplified by Lee. All the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Regarding claim 8, Toda, Lim, Komori, and Lee disclose the semiconductor device according to claim 7, however fail to expressly disclose: wherein a nitrogen concentration in the fourth layer is higher than a nitrogen concentration in the first layer. However, it would have been obvious to one of ordinary skill in the art at the time the invention was made to provide the above relationship between the nitrogen concentrations, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F .2d 272, 205 USPQ 215 (CCPA 1980). Here, the nitrogen concentrations of the first and fourth layers are considered result effective variables because they affect the diffusion blocking characteristics of the layers. Thus the ordinary artisan would have been motivated to modify the concentrations for the purpose of adjusting the performance of the first and fourth layers.
Regarding claim 9, Toda, Lim, Komori, and Lee disclose the semiconductor device according to claim 7, however fail to expressly disclose: wherein a thickness of the fourth layer is thinner than a thickness of the first layer. However, it would have been obvious to one of ordinary skill in the art at the time the invention was made to provide the above relationship between the thicknesses of the first and fourth layers, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F .2d 272, 205 USPQ 215 (CCPA 1980). Here, the thicknesses of the first and fourth layers are considered result effective variables because they affect the diffusion blocking characteristics of the layers and overall device dimensions. Thus the ordinary artisan would have been motivated to modify the thickness and thickness relationship for the purpose of adjusting the performance of the first and fourth layers and overall device dimensions.
Claims 10, 12, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Toda in view of Okubo.
Regarding independent claim 10, Toda (Fig. 5) discloses a semiconductor device comprising:
a film stack 16 (¶ 0033) including a plurality of electrode layers 7 (¶ 0033) and a plurality of first insulating films 14 (¶ 0033) alternately stacked on top of one another (Fig. 5);
a charge storage layer 4 (¶ 0018) provided between a side face (side) of the electrode layers 7 through a second insulating film 5a (¶ 0048); and
a semiconductor layer 2 (¶ 0018) provided between a side face (side) of the charge storage layer 4 through a third insulating film 3 (¶ 0018), wherein at least one of the plurality of electrode layers 7 includes a first layer 7a (¶ 0027), a second layer 7b (¶ 0027), the first layer includes tungsten and nitrogen (¶ 0027), and the second layer includes tungsten (¶ 0027).
Toda does not expressly disclose: wherein at least one of the plurality of electrode layers includes a third layer, the third layer includes multiple crystal grains having an average grain diameter equal to or larger than about 50 nanometers (nm), and the second layer is provided between the first layer and the third layer.
In the same field of endeavor, Okubo discloses a semiconductor device including an electrode layer including multiple crystal grains having an average grain diameter equal to or larger than about 50 nanometers (nm) (col. 4, l. 40-51). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a layer with multiple crystal grains as taught by Okubo as an additional layer in the device of Toda for the purpose of providing an electrode material allowing control of resistance to migration and reduced resistance (col. 4, l. 40-51; col. 1, l. 10-39). All the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Regarding claim 12, Toda and Okubo disclose the semiconductor device according to claim 10, wherein the third layer includes tungsten and is a polycrystalline layer including the multiple crystal grains having an average grain diameter equal to or larger than about 50 nm (Okubo, col. 4, l. 40-51 - tungsten silicide).
Regarding claim 13, as best understood, Toda and Okubo disclose the semiconductor device according to claim 10, wherein the average grain diameter of the multiple crystal grains in the third layer have an average grain diameter (Okubo, col. 4, l. 40-51).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Toda and Okubo as applied to claim 10 above, and further in view of Komori.
Regarding claim 11, Toda and Okubo disclose the semiconductor device according to claim 10, however fail to expressly disclose: wherein the second layer is an amorphous layer including tungsten and silicon or a polycrystalline layer including tungsten and silicon.
In the same field of endeavor, Komori discloses an electrode including an amorphous layer including tungsten and silicon (¶ 0111). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the material of Komori in the device of Toda and Okubo for the purpose of providing an art-recognized material known to be suitable for use in semiconductor device electrodes, as exemplified by Komori.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Tod and Okubo as applied to claim 10 above, and further in view of Lee.
Regarding claim 14, Toda and Okubo disclose the semiconductor device according to claim 10, however fail to expressly disclose: wherein the at least one electrode layer further includes a fourth layer including tungsten, silicon, and nitrogen, and the fourth layer is provided between the first layer and the second layer.
In the same field of endeavor, Lee discloses a semiconductor device including an electrode layer including a layer including tungsten, silicon, and nitrogen (¶ 0004). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the material of Lee in a layer of the device of Toda and Okubo for the purpose of providing an art-recognized material known to be suitable for use in semiconductor device electrode barrier layers, as exemplified by Lee. All the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Candice Y. Chan whose telephone number is (571)272-9013. The examiner can normally be reached 8:30 am - 5 pm ET.
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CANDICE Y. CHAN
Examiner
Art Unit 2813
27 June 2026
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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