Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2 and 4-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wu (U. S. Patent 6,872,583).
As for claim 1, Wu discloses (see Figs. 2A, 2B, 3A and 3B; col. 3, line 1—col. 4, line 20) a capacitance measurement method for a capacitive device (114), comprising:
providing a wafer (205), wherein the wafer is formed with the capacitive device (114), and the wafer (205) is provided with a set of calibration test pads (dummy pads 122, 123) and a set of test pads (pads 112, 113);
applying a test signal (using probe card 230) to the set of calibration test pads (122, 123) through a first test path to measure a first capacitance between two calibration test pads (122, 123) in the set of calibration test pads (see col. 3, lines 40-50);
applying the test signal (using the probe card 230) to the set of test pads (112, 113) through a second test path to measure a second capacitance between two test pads in the set of test pads (see col. 3, line 63—col. 4, line 9), wherein the capacitive device (114) is coupled between the two test pads (112, 113); and
obtaining a capacitance of the capacitive device (114) based on a difference between the first
capacitance and the second capacitance (i.e., by subtract the parasitic capacitance or zeroing-out the effect of the parasitic capacitance, see col. 3, line 1—col. 4, line 9).
wherein a connection line between a center point of a first calibration test pad (122)of the two calibration test pads and a center point of a first test pad (112) of the two test pads is a first connection line, a connection line between a center point of a second calibration test pad (123) of the two calibration test pads and a center point of a second test pad (113) of the two test pads is a second connection line, the first connection line and the second connection line are parallel with each other, and
a distance between the center point of the first calibration test pad (122)of the two calibration test pads and the center point of the first test pad (112) of the two test pads is equal to a distance between the center point of the second calibration test pad (123) of the two calibration test pads and the center point of the second test pad (113) of the two test pads (see Figs. 2A, 2B and 3A, 3B, wherein the dummy structure 120 is identical to the test structure 110; col. 3, lines 29—40).
As for claim 2, Wu discloses the capacitance measurement method according to claim 1, further comprising:
measuring a voltage value between the two calibration test pads (122, 123) and a current value flowing between the two calibration test pads (122, 123) based on the test signal, and calculating the first capacitance based on a time variation rate of the voltage value and the current value; and
measuring a voltage value between the two test pads (112, 113) and a current value flowing between the two test pads (112, 113) based on the test signal, and calculating the second capacitance based on a time variation rate of the voltage value and the current value (col. 3, line 1—col. 4, line 9).
As for claim 4, Wu discloses the capacitance measurement method according to claim 1, a distance between respective center points of the two calibration test pads (122, 123) in the set of calibration test pads is equal to a distance between respective center points of the two test pads (112, 113) in the set of test pads (see Figs. 2A, 2B, 3A, 3B wherein the dummy structure 120 is identical to the test structure 110; col. 3, lines 29—40).
As for claim 5, Wu discloses the capacitance measurement method according to claim 1, wherein a size of each of the two calibration test pads in the set of calibration test pads (122, 123) is the same as a size of each of the two test pads in the set of test pads (112, 113) (see col. 3, lines 29-40).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6-8 and 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over Wu (U. S. Patent 6,872,583).
As for claims 7, 12 and 13, Wu discloses (see Figs. 2A, 2B, 3A and 3B; col. 3, line 1—col. 4, line 20) a capacitance measurement method for a capacitive device (114), comprising:
providing a wafer (205), wherein the wafer is formed with the capacitive device (114), and the wafer (205) is provided with a set of calibration test pads (122, 123) and a set of test pads (112, 113);
providing a test probe card (probe card 230);
applying a test signal (by using the probe card 230) to the set of calibration test pads (122, 123) to make the test probe card (230) be coupled to the set of calibration test pads (122, 123), so as to measure a first capacitance between the two calibration test pads in the set of calibration test pads (see col. 3, lines 40-50);
applying the test signal (by using the probe card 230) to the set of test pads (112, 113) to make the test probe card (230) be coupled to the set of test pads, so as to measure a second capacitance between the two test pads in the set of test pads (see col. 3, line 63—col. 4, line 9), wherein the capacitive device (114) is coupled between the two test pads (112, 113);
obtaining a capacitance of the capacitive device based on a difference between the first
capacitance and the second capacitance (i.e., by subtract the parasitic capacitance or zeroing-out the effect of the parasitic capacitance, see col. 3, line 1—col. 4, line 9);
wherein a distance between respective center points of the two calibration test pads (122, 123) in the set of calibration test pads is equal to a distance between respective center points of the two test pads (112, 113) in the set of test pads (see Figs. 2A, 2B, 3A, 3B wherein the dummy structure 120 is identical to the test structure 110; col. 3, lines 29—40).
Still referring to claims 7, 12 and 13, Wu does not explicitly disclose using a switch device provided on the test probe card, for selectively applying the test signal to either the set of calibration test pads or to the set of test pads; wherein the switch device is a relay switch or a transistor switch.
It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to modify Wu to disclose using a conventional switch device, such as a relay switch or a transistor switch, to apply the test signal to either the set of calibration test pads or the set of test pads, for the purpose of automatically and selectively connecting and applying the test signals to the dummy test structure or the test structure in Wu, or the probe card having a plurality of probes can be selectively coupled to all of the dummy and test pads for simultaneously measuring all the capacitance measurements (see col. 4, lines 15-21).
As for claim 8, Wu discloses the capacitance measurement method according to claim 7, further comprising: measuring a voltage value between the two calibration test pads (122, 123) and a current value flowing between the two calibration test pads (122, 123) based on the test signal, and calculating the first capacitance based on a time variation rate of the voltage value and the current value; and
measuring a voltage value between the two test pads (112, 113) and a current value flowing between the two test pads (112, 113) based on the test signal, and calculating the second capacitance based on a time variation rate of the voltage value and the current value (col. 3, line 1—col. 4, line 9).
As for claim 10, Wu discloses the capacitance measurement method according to claim 7, wherein a size of each of the two calibration test pads in the set of calibration test pads (122, 123) is the same as a size of each of the two test pads in the set of test pads (112, 113) (see col. 3, lines 29-40).
As for claim 11, Wu discloses the capacitance measurement method according to claim 7, wherein providing the test probe card (230) further comprises:
providing a first set of test probes and a second set of test probes on the test probe card (col. 4, lines 18-21);
switching to the first set of test probes by operating the switch device so that the first set of test probes (232, 233) is coupled to the set of calibration test pads (122, 123); and
switching to the second set of test probes by operating the switch device so that the second
set of test probes (232, 233) is coupled to the set of test pads (112, 113).
As for claims 6 and 14, Wu discloses the capacitance measurement method according to claims 1 and 7, wherein the capacitive device (114, transistor) is tested.
Wu does not explicitly disclose that the capacitive device tested is a deep trench capacitor.
It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to modify Wu to disclose that the capacitive device is a deep trench capacitor, for the purpose of accurately testing the deep trench capacitor, or any other desired types of capacitive device by cancelling out the effect of the parasitic capacitance in the capacitive measurement result (see Wu, col. 2, lines 48-67).
Response to Arguments
Applicant's arguments filed on May 22, 2026 have been fully considered but they are not persuasive.
In response to applicant’s argument that Wu fails to teach a distance between the center point of one test pad and one corresponding dummy test pad is equal to the distance between the center point of another test pad and another corresponding dummy test pad, the examiner asserts that it is clear from Fig. 2A/2B that the two distance are equal to each other.
Wu’s Fig. 2A is reproduced below.
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It is clearly shown in Fig. 2A and in Wu’s specification that the test structure 110 and the dummy test structure 120 have identical structure, and:
the distance between the two dummy/calibration test pads (122 and 123) is equal to the distance between the two test pads (112 and 113); and
a distance between the center point of the first dummy/calibration test pad (122) and the center point of the first test pad (112) is equal to a distance between the center point of the second dummy/calibration test pad (123) and the center point of the second test pad (113).
Therefore, by teaching the test structure 110 and the dummy test structure 120 have identical structure, Wu not only discloses that the distance between the two test pads (112 and 113) is equal to the distance between the two dummy/calibration test pads (122 and 123). It also discloses as shown in Fig. 2A that the distance between the center point of the first dummy/calibration test pad (122) and the center point of the first test pad (112) is equal to the distance between the two test pads (112 and 113) plus the distance between pads 113 and 122. And the distance between the center point of the second dummy/calibration test pad (123) and the center point of the second test pad (113) is equal to the distance between the two dummy/calibration test pads (122 and 123) plus the same distance between pads 113 and 122.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMY HE whose telephone number is (571)272-2230. The examiner can normally be reached 9:00am--5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at (571) 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AMY HE/Primary Examiner, Art Unit 2858
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