DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-20 are pending in this application.
Foreign Priority
Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
Acknowledgment is made that the information disclosure statement has been received and considered by the examiner. If the applicant is aware of any prior art or any other co-pending applications not already of record, he/she is reminded of his/her duty under 37 CFR 1.56 to disclose the same.
Drawings
There are no objections or rejections to the drawings.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 13 recites the limitation “The semiconductor package of claim 12, wherein the second thickness is 1 to 3 times the first thickness.”. It is unclear what is meant by 1 to 3 times the first thickness. Claim 13 depends on claim 12 which requires that the dummy chip has a second thickness which is greater than the first thickness. If the second thickness is greater than the first thickness, then the limitations of claim 13 are in conflict with those of claim 12 which states that the second thickness can be 1 times the first thickness. That would be equivalent, not greater than. One of ordinary skill in the relevant art would not know what structures/steps are covered by the limitation. For these reasons, the claim is indefinite.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 6 are rejected under pre-AIA 35 U.S.C. 102(a)(1) as being anticipated by You et al. (US Patent Application Publication No 2021/0167040) hereinafter referred to as You.
Per Claim 1 You discloses a semiconductor package device, (see figures 6A-C) comprising
a first semiconductor chip (320);
a plurality of second semiconductor chips (310) on the first semiconductor chip; The examiner notes that the term "on" includes "directly on" (no intermediate materials, elements or space disposed therebetween) and "indirectly on" (intermediate materials, elements or space disposed therebetween) and
a dummy chip (220) on the plurality of second semiconductor chips,
wherein each of the plurality of second semiconductor chips has a same first width (as shown in figure 6C), and
wherein the dummy chip (220) has a second width which is smaller than the first width (as shown in figure 6C).
Per Claim 6 You discloses the device of claim 1 (see figures 6A-C) including where the dummy chip (220) comprises a silicon substrate. [0029]
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under pre-AIA 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 12-16 are rejected under pre-AIA 35 U.S.C. 103 as being unpatentable over You.
Per Claim 12-13 You discloses a semiconductor package device, (figs 6A-C) comprising
a first semiconductor chip (320);
a plurality of second semiconductor chips (310) on the first semiconductor chip; and
a dummy chip (220) on the plurality of second semiconductor chips,
wherein each of the plurality of second semiconductor chips has a same first thickness (as shown in figure 6C), and
wherein the dummy chip (220) has a second thickness (as shown in figure 6C).
You does not teach where the dummy chip has a second thickness which is greater than the first thickness.
Notwithstanding, one of ordinary skill in the art would have been led to the relative thicknesses through routine experimentation and optimization. Applicant has not disclosed that the relative thicknesses are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(IV)(B).
Per Claim 14 You teaches the device of claim 12 (see figures 6A-C) including where each of the plurality of second semiconductor chips (310) has a same first width (as shown in figure 6C), and wherein the dummy chip (220) has a second width which is smaller than the first width (as shown in figure 6C).
Per Claim 15 You teaches the device of claim 14 (see figures 6A-C) including where the second width is 0.1 to 0.9 times the first width. (as shown in figure 6C)
Per Claim 16 You teaches the device of claim 12 (see figures 6A-C) including where the dummy chip comprises a silicon substrate. [0039]
Allowable Subject Matter
Claims 2-5, 7-11 and 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 20 is allowed.
Cited Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicants are directed to consider additional pertinent prior art included on the Notice of References Cited (PTOL 892) attached herewith.
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMI VALENTINE MILLER whose telephone number is (571)272-9786. The examiner can normally be reached on Monday-Thursday 7am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached on (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Jami Valentine Miller/Primary Examiner, Art Unit 2818
Prosecution Insights