Last updated: July 05, 2026

Application No. 18/433,622

FINFET WITH GATE-ALL-AROUND STRUCTURE INCLUDING GATE DIELECTRIC LAYER THICKER IN BURIED GATE REGION THAN IN OUTER GATE REGION

Non-Final OA

Filed

Feb 06, 2024

Examiner

CHIU, TSZ K

Art Unit

2898

Tech Center

2800 — Semiconductors & Electrical Systems

Assignee

Globalfoundries U.s. Inc.

OA Round

1 (Non-Final)

Interview Optional

— +10.4% interview lift. Interview already conducted in this application's prosecution history. This examiner has a 79% grant rate with +10.4% interview lift. Since an interview has already been tried, recommend written response with narrowed claims based on precedent claim evolution patterns.

Based on 675 resolved cases, 2023–2026

Examiner Intelligence

CHIU, TSZ K View full profile →

Grants 79% — above average

Career Allowance Rate

535 granted / 675 resolved

+11.3% vs TC avg

Moderate +10% lift

Without

With

+10.4%

Interview Lift

resolved cases with interview

Typical timeline

3y 4m

Avg Prosecution

42 currently pending

Career history

708

Total Applications

across all art units

Statute-Specific Performance

§101

0.2%

-39.8% vs TC avg

§103

69.6%

+29.6% vs TC avg

§102

21.4%

-18.6% vs TC avg

§112

2.1%

-37.9% vs TC avg

Black line = Tech Center average estimate • Based on career data from 675 resolved cases

Prosecution Timeline

Feb 06, 2024

Application Filed

Apr 01, 2026

Non-Final Rejection mailed

Jun 18, 2026

Interview Requested

Jun 29, 2026

Examiner Interview Summary

Jun 29, 2026

Applicant Interview (Telephonic)

Precedent Cases

Applications granted by this same examiner with similar technology

17/829,961

Patent 12666895

METHOD FOR FORMING SEMICONDUCTOR DEVICES USING A GLASS STRUCTURE ATTACHED TO A WIDE BAND-GAP SEMICONDUCTOR WAFER

4y 0m to grant Granted Jun 23, 2026

17/839,675

Patent 12666930

Semiconductor package with Planar surfaces recess structure and lower dielectric isolation

4y 0m to grant Granted Jun 23, 2026

17/316,207

Patent 12653031

Dummy Dies for Reducing Warpage in Packages

5y 1m to grant Granted Jun 09, 2026

17/130,086

Patent 12642095

Method for Substrate Moisture NCF Voiding Elimination

5y 5m to grant Granted May 26, 2026

17/941,257

Patent 12641832

THIN FILM TRANSISTOR WITH FLOURINE GRADIENT ACTIVE LAYER AND FABRICATING METHOD THEREOF

3y 8m to grant Granted May 26, 2026

Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.

Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2

Expected OA Rounds

79%

Grant Probability

90%

With Interview (+10.4%)

3y 4m (~11m remaining)

Median Time to Grant

Low

PTA Risk

Based on 675 resolved cases by this examiner. Grant probability derived from career allowance rate.