DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I, claims 1-18, in the reply filed on 05/26/2026 is acknowledged.
Status of the Application
Claims 1-20 remain pending in this application. Acknowledgement is made of the amendment received 05/26/2026. Claims 19 and 20 are withdrawn.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 7 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 7, it recites the limitation "the width of the first portion at an upper end of the interlayer insulating film" in line 5. There is insufficient antecedent basis for this limitation in the claim. The examiner interprets the claim to have intended to state “a width of the first portion at an upper end of the interlayer insulating film”, in which case proper antecedent basis is established. The claim will be examined on the basis of this interpretation hereafter. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 7, 10, 11, and 14-18 rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nishiguchi (US 20190245036 A1, hereafter Nishiguchi).
Regarding claim 1, Nishiguchi discloses: A semiconductor device (Nishiguchi 100, fig 1, 2, ¶0017) comprising:
a first electrode (Nishiguchi 31);
a first semiconductor region (Nishiguchi 1, 5, ¶0017) of a first conductive type (Nishiguchi ¶0017, n-type) provided on the first electrode (Nishiguchi fig 1);
a second semiconductor region (Nishiguchi 2, ¶0017) of a second conductive type (Nishiguchi ¶0017, p-type) provided on the first semiconductor region (Nishiguchi fig 1, 2);
a third semiconductor region (Nishiguchi 3, ¶0017) of a first conductive type (Nishiguchi ¶0017, n-type) provided on the second semiconductor region (Nishiguchi fig 1, 2);
a gate electrode (Nishiguchi 20, ¶0017) provided in the second semiconductor region via a gate insulating film (Nishiguchi 21, ¶0017)(Nishiguchi fig 1);
a contact portion (Nishiguchi 10, ¶0017, 0023) having a first portion (Nishiguchi 12, 14) aligned with the third semiconductor region and a part of the second semiconductor region (Nishiguchi fig 2, under a broadest reasonable interpretation (BRI) of “aligned”, 14 is at least aligned with a surface of 2 and both 12 and 14 are aligned with 3), and a second portion (Nishiguchi 11) provided at a lower end of the first portion (Nishiguchi fig 2) and having a width (Nishiguchi L1, ¶0025) larger than a width of the first portion at an upper end of the third semiconductor region (Nishiguchi L2, ¶0025)(Nishiguchi fig 2, ¶0025, L1 being larger than L2); and
a second electrode (Nishiguchi 32, ¶0017) electrically connected to the contact portion (Nishiguchi fig 1, ¶0021).
Regarding claim 7, Nishiguchi discloses: The semiconductor device according to claim 1, further comprising
an interlayer insulating film (Nishiguchi 25, ¶0020-0021) provided between the third semiconductor region (Nishiguchi 3) and the second electrode (Nishiguchi 32)(Nishiguchi fig 1, ¶0021),
wherein the first portion (Nishiguchi 12, 14) is aligned with the interlayer insulating film (Nishiguchi fig 2, under a BRI of “aligned”, 12 is at least aligned with a surface of 25), and
the width of the second portion (Nishiguchi L1) is larger than the width (as best understood to mean “a width”) of the first portion at an upper end of the interlayer insulating film (Nishiguchi L2)(Nishiguchi fig 2, ¶0025, L1 being larger than L2).
Regarding claim 10, Nishiguchi discloses: The semiconductor device according to claim 7, wherein the second portion (Nishiguchi 11) of the contact portion (Nishiguchi 10) contains a metal material (Nishiguchi ¶0034, “titanium, tungsten”).
Regarding claim 11, Nishiguchi discloses: The semiconductor device according to claim 10, wherein the metal material is titanium (Nishiguchi ¶0034, “titanium”), chromium, zirconium, molybdenum, tungsten (Nishiguchi ¶0034, “tungsten”), or hafnium.
Regarding claim 14, Nishiguchi discloses: The semiconductor device according to claim 1, wherein the second portion (Nishiguchi 11) of the contact portion (Nishiguchi 10) contains a metal material (Nishiguchi ¶0034, “titanium, tungsten”).
Regarding claim 15, Nishiguchi discloses: The semiconductor device according to claim 14, wherein the metal material is titanium (Nishiguchi ¶0034, “titanium”), chromium, zirconium, molybdenum, tungsten (Nishiguchi ¶0034, “tungsten”), or hafnium.
Regarding claim 16, Nishiguchi discloses: The semiconductor device according to claim 1, further comprising a fourth semiconductor region (Nishiguchi 4, ¶0017) provided to surround the second portion (Nishiguchi 11)(Nishiguchi fig 2, ¶0021) and having an impurity concentration of a second conductive type (Nishiguchi ¶0017, p+, p-type) higher than an impurity concentration of a second conductive type of the second semiconductor region (Nishiguchi 2, ¶0017, p, p-type)(Nishiguchi, ¶0017, 2 is p, 4 is p+, therefore 4 has a higher p-type impurity concentration than 2).
Regarding claim 17, Nishiguchi discloses: The semiconductor device according to claim 1, wherein the first electrode (Nishiguchi 31) is a drain electrode (Nishiguchi ¶0017), the second electrode (Nishiguchi 32) is a source electrode (Nishiguchi ¶0017), the first semiconductor region (Nishiguchi 1, 5) is a drift region (Nishiguchi ¶0017) and a drain region (Nishiguchi ¶0017), the second semiconductor region (Nishiguchi 2) is a base region (Nishiguchi ¶0017), and the third semiconductor region (Nishiguchi 3) is a source region (Nishiguchi ¶0017).
Regarding claim 18, Nishiguchi discloses: The semiconductor device according to claim 1, wherein the first conductive type is an n-type (Nishiguchi ¶0017, n-type), and the second conductive type is a p-type (Nishiguchi ¶0017, p-type).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 5, and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Nishiguchi (US 20190245036 A1, hereafter Nishiguchi), as applied to claim 1 above, and further in view of Aida et al (US 20210296456 A1, hereafter Aida).
Regarding claim 2, Nishiguchi teaches: The semiconductor device according to claim 1, including a thickness of the second portion (Nishiguchi 11)(Nishiguchi L1, ¶0026) in a second direction (Nishiguchi X) orthogonal to a first direction (Nishiguchi Z)(Nishiguchi fig 2) from the first electrode (Nishiguchi 31) toward the second electrode (Nishiguchi 32) and a thickness of the second portion in the first direction (Nishiguchi L6, ¶0027)(Nishiguchi fig 2).
Nishiguchi does not explicitly teach: a thickness of the second portion in a second direction is larger than a thickness of the second portion in the first direction.
Aida, in the same field of endeavor of semiconductor device manufacturing, teaches: adjusting a thickness (Aida WC1, ¶0032) of a contact portion (Aida 30P, ¶0021) in a second direction (Aida X) orthogonal to a first direction (Aida Z) from a first electrode (Aida 20, ¶0016) toward a second electrode (Aida 30, 35, ¶0021)(Aida fig 1).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to adjust a thickness of the second portion in the first direction of Nishiguchi, as taught by Aida, such that “a thickness of the second portion in a second direction orthogonal to a first direction from the first electrode toward the second electrode is larger than a thickness of the second portion in the first direction”, in order to increase the surface area of the contact portion without reducing an avalanche resistance and/or without reducing a channel density, thereby improving on-resistance (Aida ¶0040-0041).
Further, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Applicant has not disclosed that the thickness is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, and it appears prima facie that the device would possess utility using another thickness. It has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical (MPEP 2144.04).
Regarding claim 5, Nishiguchi in view of Aida teaches: The semiconductor device according to claim 2, wherein the second portion (Nishiguchi 11) of the contact portion (Nishiguchi 10) contains a metal material (Nishiguchi ¶0034, “titanium, tungsten”).
Regarding claim 6, Nishiguchi in view of Aida teaches: The semiconductor device according to claim 5, wherein the metal material is titanium (Nishiguchi ¶0034, “titanium”), chromium, zirconium, molybdenum, tungsten (Nishiguchi ¶0034, “tungsten”), or hafnium.
Claims 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Nishiguchi (US 20190245036 A1, hereafter Nishiguchi) in view of Aida et al (US 20210296456 A1, hereafter Aida), as applied to claim 2 above, and further in view of Hsieh (US 20130168764 A1, hereafter Hsieh).
Regarding claim 3, Nishiguchi in view of Aida teaches: The semiconductor device according to claim 2.
Nishiguchi in view of Aida does not explicitly teach wherein the second portion of the contact portion contains metal silicide.
Hsieh, in the same field of endeavor of semiconductor device manufacturing, teaches: a contact portion (Hsieh 703) contains metal silicide (Hsieh ¶0038, 0040).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the contact portion of Nishiguchi in view of Aida to contain a metal silicide, such that “the second portion of the contact portion contains metal silicide”, in order to form a barrier layer, thereby improving contact performance (Hsieh ¶0027).
Further, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include metal silicide, which is known and commonly used as contact barrier layer within semiconductor devices, and that use of conventional materials to perform their known function is prima-facie obvious (See MPEP 2144.07).
Regarding claim 4, Nishiguchi in view of Aida and Hsieh teaches: The semiconductor device according to claim 3, wherein the metal silicide is titanium silicide (Hsieh ¶0040), chromium silicide, zirconium silicide, molybdenum silicide, tungsten silicide, or hafnium silicide.
Claims 8, 9, 12, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Nishiguchi (US 20190245036 A1, hereafter Nishiguchi), as applied to claims 1 or 7 above, and further in view of Hsieh (US 20130168764 A1, hereafter Hsieh).
Regarding claim 8, Nishiguchi teaches: The semiconductor device according to claim 7, wherein the second portion (Nishiguchi 11) of the contact portion (Nishiguchi 10) contains a metal material (Nishiguchi ¶0034, “titanium, tungsten”).
Nishiguchi does not explicitly teach wherein the second portion of the contact portion contains metal silicide.
Hsieh, in the same field of endeavor of semiconductor device manufacturing, teaches: a contact portion (Hsieh 703) contains metal silicide (Hsieh ¶0038, 0040).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the contact portion of Nishiguchi to contain a metal silicide, such that “the second portion of the contact portion contains metal silicide”, in order to form a barrier layer, thereby improving contact performance (Hsieh ¶0027).
Further, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include metal silicide, which is known and commonly used as contact barrier layer within semiconductor devices, and that use of conventional materials to perform their known function is prima-facie obvious (See MPEP 2144.07).
Regarding claim 9, Nishiguchi in view of Hsieh teaches: The semiconductor device according to claim 8, wherein the metal silicide is titanium silicide (Hsieh ¶0040), chromium silicide, zirconium silicide, molybdenum silicide, tungsten silicide, or hafnium silicide.
Regarding claim 12, Nishiguchi teaches: The semiconductor device according to claim 1, wherein the second portion (Nishiguchi 11) of the contact portion (Nishiguchi 10) contains a metal material (Nishiguchi ¶0034, “titanium, tungsten”).
Nishiguchi does not explicitly teach wherein the second portion of the contact portion contains metal silicide.
Hsieh, in the same field of endeavor of semiconductor device manufacturing, teaches: a contact portion (Hsieh 703) contains metal silicide (Hsieh ¶0038, 0040).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the contact portion of Nishiguchi to contain a metal silicide, such that “the second portion of the contact portion contains metal silicide”, in order to form a barrier layer, thereby improving contact performance (Hsieh ¶0027).
Further, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include metal silicide, which is known and commonly used as contact barrier layer within semiconductor devices, and that use of conventional materials to perform their known function is prima-facie obvious (See MPEP 2144.07).
Regarding claim 13, Nishiguchi in view of Hsieh teaches: The semiconductor device according to claim 12, wherein the metal silicide is titanium silicide (Hsieh ¶0040), chromium silicide, zirconium silicide, molybdenum silicide, tungsten silicide, or hafnium silicide.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS B. MICHAUD whose telephone number is (703)756-1796. The examiner can normally be reached Monday-Friday, 0800-1700 Eastern Time.
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/NICHOLAS B. MICHAUD/
EXAMINER
Art Unit 2818
/Mounir S Amer/Primary Examiner, Art Unit 2818
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