Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “Semiconductor Power Device Including Trench gate and Trench Field Electrode With Thicker Bottom Dielectric Layer”.
Election/Restrictions
Applicant’s election without traverse of invention I drawn to claims 1-14 in the reply filed on 04/27/2026 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 7 and 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over Nagata et al. (US 2017/0062574 A1) in view of Hurst et al. (US 2002/0153557 A1).
Regarding independent claim 1: Nagata teaches (e.g., Figs. 1-5; [0006]-[0010] and [0042]) a semiconductor device, comprising:
a semiconductor substrate ([0046]: 2); and
a plurality of transistor cells (Fig. 4; [0044] and [0046]; 10) formed in the semiconductor substrate (2) and electrically coupled in parallel ([0043]-[0045]; Fig. 2, shows the trench gates being connected in parallel) to form a power transistor,
wherein the plurality of transistor cells comprises:
a plurality of trenches ([0045]: trenches 13) extending in a vertical direction from a first main surface of the semiconductor substrate (top surface of semiconductor substrate 2) into the semiconductor substrate,
wherein each transistor of the plurality of trenches comprises:
a gate electrode ([0048]: 21);
a field electrode ([0061]: 33) below the gate electrode; and
at least one dielectric material ([0058]: 23) separating the gate electrode (21) and the field electrode (33) from one another and from the semiconductor substrate (2),
wherein the at least one dielectric material (23) is thicker between the field electrode (33) and a bottom of the trenches ([0052]: 13) than between the field electrode (33) and upper sidewall of the trenches ([0053]: 30).
Nagata does not expressly teach that the at least one dielectric material wherein is thicker at the bottom of the trenches than each sidewall of the trenches;
wherein each trench has a tapered width that decreases over a depth of the trench in the vertical direction.
Hurst teaches (e.g., Figs. 2-15) a semiconductor device comprising at least one dielectric material ([0015]-[0016]: 21/17) in at least a trench (Fig. 2 and Fig. 4-9; [0016] and [0019]-[0021]: 41/42);
Hurst further teaches that the at least one dielectric material ([0015]-[0016]: 21/17) is thicker at the bottom of the trench ([0015]-[0017] and [0019]-[0021]: 42) than each sidewall of the trench ([0015]-[0017] and [0019]-[0021]: 41);
wherein each trench (Fig. 2 and Fig. 4-9; [0016] and [0019]-[0021]: 41/42) has a tapered width that decreases over a depth of the trench (Fig. 2 and Fig. 4-9; [0016] and [0019]-[0021]: 41/42) in the vertical direction (in the depth of the trench).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Nagata, the at least one dielectric material being thicker at the bottom of the trenches than each sidewall of the trenches; wherein each trench has a tapered width that decreases over a depth of the trench in the vertical direction, as taught by Hurst, for the following benefits: the electric field across the dielectric material at the bottom of the trench is reduced. The reduced electric field in turn reduces stress on the dielectric layer. Etch defects in the bottom of the trench can be isolated more effectively by a thicker isolation layer at the bottom of the trench. Further, effects of a higher electric field at the rounded corners at the bottom of the trench are offset by a thicker dielectric layer at the bottom of the trench (Hurst: [0017]).
Regarding claim 2: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
Nagata as modified by Hurst teaches that the at least one dielectric material (Hurst: [0015]-[0016]: 21/17) is 1.5 to 10 times thicker (Hurst: [0019]) between the field electrode and the bottom of the trenches (Hurst: 42) than between the field electrode and each sidewall of the trenches (Hurst: 41).
Regarding claim 3: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 2, on which this claim depends,
Nagata as modified by Hurst teaches that the at least one dielectric material (Hurst: [0015]-[0016]: 21/17) is about 3.6 times thicker (Hurst: [0019]) between the field electrode and the bottom of the trenches (Hurst: 42) than between the field electrode and each sidewall of the trenches (Hurst: 41).
Note that 3.6 times thicker is overlapping with 4 to 10 times.
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the thickness ratio such that the at least one dielectric material is 4 to 10 times thicker at the bottom than at each sidewall of the trenches, so as to meet the desired isolation effect at the bottom of the trench.
Regarding claim 4: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein between the field electrode (Nagata: 33) and the bottom of the trenches (Nagata: [0024], [0043]-[0046]), the at least one dielectric material (Nagata: [0048]: 23) traverses at least 10% to less than 100% of the trench depth.
It is noted that 10% to less than 100% includes an overlapping range with 10% to 67% of the trench depth.
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the trench depth of Nagata as modified by Hurst, such that is in the range of 10% to 67% of the trench depth, so as to meet the desired electrical characteristics and overvoltage protection strength of the power device.
Regarding claim 7: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein in the vertical direction, the trenches (Nagata: [0043]-[0046]) terminate in a drift region (Nagata: [0046]: 18) of the semiconductor device, and
wherein the drift region has a doping concentration in a range of 2e16 cm⁻³ to 2e17 cm⁻³ ([0047]: in the range of about 1×10.sup.16 cm.sup.−3 to 1×10.sup.18 cm.sup.−3).
Note that 1×10.sup.16 cm.sup.−3 to 1×10.sup.18 cm.sup.−3) is in a range that is overlapping with 2e16 cm⁻³ to 2e17 cm⁻³ .
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Nagata as modified by Hurst, the doping concentration in a range of 2e16 cm⁻³ to 2e17 cm⁻³ , so as to meet the desired device electrical characteristics based on device requirements.
Regarding claim 9: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the field electrode terminates at a depth of 33% to 90% of the trench depth (Nagata: Fig. 4 shows field electrode 33 terminates at a depth of more than 50% to less than 100%, which is an overlapping range of a depth of 33% to 90%).
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the trench depth of Nagata as modified by Hurst, such that is in the range of 33% to 90% of the trench depth, so as to meet the desired electrical characteristics and overvoltage protection strength of the power device.
Regarding claim 10: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the power transistor has a nominal voltage rating of 40V or less (Nagata: [0039]).
Regarding claim 11: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the field electrode has a thickness in the vertical direction that ranges from 100nm to 1200nm (Hurst: [0019]: 1100 Angstroms corresponds to 110 nanometers, nm), and
wherein the gate electrode has a thickness in the vertical direction that ranges from 400nm to 2000 nm (Nagata: [0045]: 0.4 µm and not more than 2.0 µm, which corresponds to 400 nm to 2000 nm being an overlapping range of a thickness in the vertical direction that ranges from 100nm to 500nm).
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the thickness in the vertical direction such that it ranges from 100nm to 500nm, so as to meet the desired electrical characteristics and meet the overvoltage protection strength of the power device in operation in the specified regime.
Regarding claim 12: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein between the field electrode (Nagata: 33) and the bottom of the trenches, the at least one dielectric material (Nagata: [0057]: 24) has a thickness in the vertical direction that ranges from 50nm to 200nm (Nagata: [0057]: 500 Å and not more than 2000 Å, which corresponds to 50 nm to 200 nm; an overlapping range from 100nm to 600nm), and
wherein between the gate electrode (Nagata: 21) and the field electrode (Nagata: 33), the at least one dielectric material (Nagata: [0057]: 23) has a thickness in the vertical direction that ranges from 25nm to 80nm (Nagata: [0057]: 250 Å and not more than 800 Å, which corresponds to 25 nm to 80 nm an overlapping range from 50nm to 300nm).
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the thickness in the vertical direction of the dielectric materials such that “between the field electrode and the bottom of the trenches, the at least one dielectric material has a thickness in the vertical direction that ranges from 100nm to 600nm, and wherein between the gate electrode and the field electrode, the at least one dielectric material has a thickness in the vertical direction that ranges from 50nm to 300nm, based on the desired functioning of the power device and control the protection capacity of the field plate and thus improve device reliability.
Claims 5 and 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Nagata et al. (US 2017/0062574 A1) in view of Hurst et al. (US 2002/0153557 A1) as applied above and further in view Kampen et al. (US 2016/0181417 A1).
Regarding claim 5: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends.
wherein between the field electrode and the bottom of the trenches, the at least one dielectric material has a thickness in the vertical direction that ranges from 100nm to 600nm (Hurst: [0019]: 1100 Angstroms corresponds to 110 nanometers, nm).
Nagata as modified by Hurst does not expressly teach the field electrode has a thickness in the vertical direction that ranges from 100nm to 600nm.
Kampen teaches (e.g., Fig. 1) a semiconductor device comprising a field electrode ([0014]: 31);
Kampen further teaches that the field electrode has a thickness in the vertical direction that ranges from several 10 nanometers or several 100 nanometers ([0033]; the thickness of one field electrode 31 is, for example, several 10 nanometers or several 100 nanometers).
Note that this range is an overlapping range of a thickness in the vertical direction that ranges from 100nm to 600nm.
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the thickness in the vertical direction such that it ranges from 100nm to 600nm, so as to meet the desired electrical characteristics and meet the overvoltage protection strength of the power device in operation.
Regarding claim 13: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the semiconductor device has a nominal voltage rating of 25V or less (Nagata: [0039]),
wherein the field electrode has a thickness in the vertical direction that ranges from 100nm to 600nm, and
wherein between the field electrode and the bottom of the trench, the at least one dielectric material has a thickness in the vertical direction that ranges from 100nm to 600nm.
Kampen teaches (e.g., Fig. 1) a semiconductor device comprising a field electrode ([0014]: 31);
Kampen further teaches that the field electrode has a thickness in the vertical direction that ranges from several 10 nanometers or several 100 nanometers ([0033]; the thickness of one field electrode 31 is, for example, several 10 nanometers or several 100 nanometers).
Note that this range is an overlapping range of a thickness in the vertical direction that ranges from 100nm to 600nm.
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the thickness in the vertical direction such that it ranges from 100nm to 600nm, so as to meet the desired electrical characteristics and meet the overvoltage protection strength of the power device in operation.
Regarding claim 14: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the semiconductor device has a nominal voltage rating of 40V or less (Nagata: [0039]), and
wherein between the field electrode (Nagata: 33) and the bottom of the trench (Nagata: 13), the at least one dielectric material (Nagata: 24) has a thickness in the vertical direction that ranges from 100nm to 600nm (Nagata: [0057]: be not less than 500 Å and not more than 2000 Å, which corresponds to 50 nm to 200 nm).
Note that this range is an overlapping range of a thickness in the vertical direction that ranges from 100nm to 600nm.
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the thickness in the vertical direction such that it ranges from 100nm to 600nm, so as to meet the desired electrical characteristics and meet the overvoltage protection strength of the power device in operation.
Nagata as modified by Hurst does not expressly teach that the field electrode has a thickness in the vertical direction that ranges from 100nm to 1200nm.
Kampen teaches (e.g., Fig. 1) a semiconductor device comprising a field electrode ([0014]: 31);
Kampen further teaches that the field electrode has a thickness in the vertical direction that ranges from several 10 nanometers or several 100 nanometers ([0033]; the thickness of one field electrode 31 is, for example, several 10 nanometers or several 100 nanometers).
Note that this range is an overlapping range of a thickness in the vertical direction that ranges from 100nm to 1200nm.
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the thickness in the vertical direction such that it ranges from 100nm to 1200nm, so as to meet the desired electrical characteristics and meet the overvoltage protection strength of the power device in operation.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Nagata et al. (US 2017/0062574 A1) in view of Hurst et al. (US 2002/0153557 A1) as applied above and further in view Yilmaz et al. (US 2012/0104490 A1).
Regarding claim 6: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
Nagata as modified by Hurst does not teach that each sidewall of the trenches has a step profile in a vicinity of a bottom of the field electrode.
Yilmaz teaches (e.g., Figs. 13A13L) a semiconductor device comprising at least a trench ([0037]: 1308) and a field electrode ([0038]-[0039]: 1312);
Yilmaz further teaches that each sidewall of the trenches ([0037]: 1308) has a step profile in a vicinity of a bottom of the field electrode ([0038]-[0039]: 1312).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Nagata as modified by Hurst, the device, wherein each sidewall of the trenches has a step profile in a vicinity of a bottom of the field electrode, for the benefits of controlling with more precision the capacity to reduce the effect of overvoltage during operation.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Nagata et al. (US 2017/0062574 A1) in view of Hurst et al. (US 2002/0153557 A1) as applied above and further in view Kondo (US 2022/0216310 A1).
Regarding claim 8: Nagata and Hurst teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
Nagata as modified by Hurst does not teach that in the vertical direction, the trenches extend through a drift region of the semiconductor device and into a transition region that has a higher average doping concentration than the drift region,
wherein the transition region is vertically interposed between the drift region and a substrate region that has a higher average doping concentration than the transition region, and
wherein the drift region, the transition region and the substrate region have a same conductivity type.
Kondo teaches (e.g., Fig. 1) a semiconductor device comprising: in a vertical direction, trenches ([0017]: 121) extend through a drift region ([0018]: 103B) of a semiconductor device and into a transition region ([0018]: 103A; this region represents a transition between the substrate and the part or the drift region near the source region) that has a higher average doping concentration than the drift region ([0018]),
wherein the transition region (103A) is vertically interposed between the drift region (103B) and a substrate region (101) that has a higher average doping concentration than the transition region ([0018]), and
wherein the drift region (103B), the transition region (103A) and the substrate region (101) have a same conductivity type ([0018]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Nagata as modified by Hurst, the structure wherein in the vertical direction, the trenches extend through a drift region of the semiconductor device and into a transition region that has a higher average doping concentration than the drift region, wherein the transition region is vertically interposed between the drift region and a substrate region that has a higher average doping concentration than the transition region, and wherein the drift region, the transition region and the substrate region have a same conductivity type, as taught by Kondo, for the benefits of achieving a soft recovery (lowering a peak of a reverse recovery current If) and suppression of a waveform oscillation (lowering a peak of a voltage surge Vak) during the reverse recovery.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HERVE-LOUIS Y ASSOUMAN whose telephone number is (571)272-2606. The examiner can normally be reached M-F: 08:30 AM-5:30 PM.
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/HERVE-LOUIS Y ASSOUMAN/Examiner, Art Unit 2812
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