DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 12 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Allowable Subject Matter
Claims 1, 4, 5, and 7 – 11 are allowed.
The following is an examiner’s statement of reasons for allowance: the prior art taken either singularly or in combination fails to anticipate or fairly suggest the limitations of the independent claim 1, in such a manner that a rejection under 35 U.S.C. 102 or 103 would be improper.
The prior art fails to teach a combination of all the claimed features as presented in independent claim 1 with the allowable feature being: a printed circuit board comprising: a glass layer having a first region having first transmittance and a second region having second transmittance; wherein the second region is positioned on each of an upper side and a lower side of the glass layer, at least a portion of the first region is positioned on a central side between the upper side and the lower side of the glass layer, and wherein the second transmittance is lower than the first transmittance, and wherein the second region is disposed in at least a portion of the glass layer in which the first wiring layer is not disposed.
One close prior art Suga (US 2024/0407089 A1) teaches of a printed circuit board comprising: a glass layer having a first region having first transmittance and a second region having second transmittance, different from the first transmittance; and a first wiring layer disposed on the glass layer, wherein the second region is positioned on each of an upper side and a lower side of the glass layer, at least a portion of the first region is positioned on a central side between the upper side and the lower side of the glass layer, and wherein the second transmittance is lower than the first transmittance; however Suga does not teach wherein the second region is disposed in at least a portion of the glass layer in which the first wiring layer is not disposed.
Therefore claims 1, 4, 5, and 7 – 11 are allowed.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 12 and 14 – 17 are rejected under 35 U.S.C. 103 as being unpatentable over Suga (US 2024/0407089 A1) in view of Taguchi (US 5,468,694).
Regarding Claim 12, Suga discloses a printed circuit board (Fig 3) comprising: a glass layer (10) having a first region (area or portion about 13; note that the structural limits and boundary of this claimed region have not been structurally claimed) internally positioned (towards the middle of 10) and a second region (about 102,104; with 14; note that the structural limits and boundary of this claimed region have not been structurally claimed) externally positioned (externally away from 13) with respect to a stacking direction; and a first wiring layer ([0074] “a conductor layer on at least one of the first main surface 11 and the second main surface 12 and forming a circuit pattern”) disposed on the glass layer (10), wherein transmittance ([0024] “opaque to visible light“) of the second region is lower than transmittance ([0024] “transparent to visible light”) of the first region.
Suga does not disclose wherein the first region of the glass layer includes colored glass.
Taguchi (US 5,468,694) teaches of a glass substrate (Column 3, line 29-Column 6, line 15; “glass”) wherein a region (note that the structural limits and boundary of this claimed region have not been structurally claimed; the claim does not preclude color in all regions) of the glass layer includes colored glass (Column 3, line 29-Column 6, line 15; “coloring”, “white”, “colored”).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the board with glass layer as disclosed by Suga, wherein the first region of the glass layer includes colored glass as taught by Taguchi, in order to provide a level of shielding of components from light and facilitation of assembly (Taguchi, Column 3, line 29-Column 6, line 15). Note that the Applicant has not disclosed any criticality in the Applicant’s Specification for this claimed subject matter.
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Annotated Fig 3 from Suga (US 2024/0407089 A1)
Regarding Claim 14, Suga further discloses the printed circuit board (Fig 3) of claim 12, wherein a portion of the first region (area or portion about 13; note that the structural limits and boundary of this claimed region have not been structurally claimed) is in contact with the first wiring layer (wiring formed on 11 or 12 would contact the first region; [0074] “a conductor layer on at least one of the first main surface 11 and the second main surface 12 and forming a circuit pattern”).
Regarding Claim 15, Suga further discloses the printed circuit board (Fig 3) of claim 12, wherein the first region (area or portion about 13; note that the structural limits and boundary of this claimed region have not been structurally claimed) is spaced apart (portion about 13 is away from 11 or 12) from the first wiring layer ([0074] “a conductor layer on at least one of the first main surface 11 and the second main surface 12 and forming a circuit pattern”).
Regarding Claim 16, Suga further discloses the printed circuit board (Fig 3) of claim 12, wherein a thickness ([0062] a thickness; e.g. a region or portion about the thickness of the region spanning at callout 102 as seen in Fig 3 is less than a region or portion about the thickness of 13 between the regions called out at 102 and 104) of the first region (area or portion about 13; note that the structural limits and boundary of this claimed region have not been structurally claimed) is greater than a thickness of the second region (about 102,104; with 14; note that the structural limits and boundary of this claimed region have not been structurally claimed).
Regarding Claim 17, Suga further discloses the printed circuit board (Fig 3) of claim 12, wherein the second region (about 102,104; with 14; note that the structural limits and boundary of this claimed region have not been structurally claimed) is positioned on at least a portion of each of an upper surface (region is away from 13 and towards 11) and a lower surface (region is away from 13 and towards 12) of the glass layer (10), and extends to the inside of the glass layer (10).
Claim(s) 13 is rejected under 35 U.S.C. 103 as being unpatentable over Suga (US 2024/0407089 A1) in view of Taguchi (US 5,468,694) as applied to claim 12 above, and further in view of Inagaki (US 2015/0327363 A1).
Regarding Claim 13, Suga in view of Taguchi teaches the limitations of the preceding claim including the glass layer.
Suga also discloses (Fig 3) the second region (region about 102,104) shown spanning across the whole substrate and so a wiring layer or additional layers atop 11 or 12 would be formed on the second region (the region with 14; note that the structural limits and boundary of this claimed region have not been structurally claimed).
Suga does not explicitly disclose the printed circuit board of claim 12, further comprising: a first insulating layer disposed on the glass layer, and covering the first wiring layer, wherein at least a portion of the second region is in contact with the first insulating layer.
Inagaki (US 2015/0327363 A1) teaches of a printed circuit board (Fig 1-9), comprising: a first insulating layer (50F,50S; [0046-0051]) disposed on a layer (30), and covering a first wiring layer (22,24,26).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the board with glass layer as taught by Suga in view of Taguchi, further comprising: a first insulating layer disposed on the layer, and covering the first wiring layer as taught by Inagaki, in order to provide functions and dedicated wirings for electronic components mounted on the board (Inagaki, [0024-0037]). This would also provide for additional densely formed wiring layers, further improves mounting density, improves miniaturization, and allows for front and rear surface wirings capable of mounting various electronic parts. The combination of Suga in view of Inagaki would teach the printed circuit board comprising a glass layer, further comprising: a first insulating layer disposed on the glass layer, and covering the first wiring layer as taught by Inagaki, wherein at least a portion of the second region (the region show in Fig 3 of Suga spans across the entire substrate and would contact any additional layer atop 11 or 12) is in contact with the first insulating layer (an additional insulating layer as taught by Inagaki formed contacting the core).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Riezman (US 2013/0280449 A1) teaches of coloring regions of a glass component ([0001-0023]) using a laser process ([0026-0034]). This could be used in a 103 Rejection.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROSHN K VARGHESE whose telephone number is (571)270-7975. The examiner can normally be reached M-Th: 900 am-300 pm.
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/ROSHN K VARGHESE/ Primary Examiner, Art Unit 2847
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