Prosecution Insights
Last updated: October 01, 2026
Application No. 18/438,263

SEMICONDUCTOR DEVICE

Non-Final OA §112
Filed
Feb 09, 2024
Priority
Feb 10, 2023 — JP 2023-019481
Examiner
NGUYEN, CUONG B
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
KIOXIA Corporation
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
865 granted / 980 resolved
+20.3% vs TC avg
Strong +15% interview lift
Without
With
+15.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
46 currently pending
Career history
1022
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
45.8%
+5.8% vs TC avg
§102
32.2%
-7.8% vs TC avg
§112
18.5%
-21.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 980 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Election/Restrictions Applicant's election without traverse of Species I directed to Figs. 7-9 (Claims 1-3 and 6-20) in the reply filed on May 27th, 2026 is acknowledged. Claim Objections Claims 9 and 20 are objected to because of the following informalities: Claim 9 recites “the portion” in line 11 which referring back to “a portion of the second conductive region” in line 10-11 and should be amended to “the portion of the second conductive region” for avoiding confusion. Appropriate correction is required. Claim 20 recites “the portion” in line 11 which referring back to “a portion of the second conductive region” in line 10-11 and should be amended to “the portion of the second conductive region” for avoiding confusion. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 4, 6, 8, 14-15 and 18-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 4 recites the limitation “the other side” in line 5. There is insufficient antecedent basis for this limitation in the claim. Claim 6 recites the limitation “the other side” in line 6. There is insufficient antecedent basis for this limitation in the claim. Claim 8 recites the limitation “the other side” in line 5. There is insufficient antecedent basis for this limitation in the claim. Claim 14 recites a redundant “a side of the first wiring” in line 3 because claim 1 already recites the same limitation in line 7. Claim 15 recites the limitation “the other side” in line 22. There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites the limitation “the other side” in line 5. There is insufficient antecedent basis for this limitation in the claim. Claim 19 recites the limitation “the other side” in line 5. There is insufficient antecedent basis for this limitation in the claim. Allowable Subject Matter Claims 1-3, 5, 7, 10-13 and 16-17 are allowed over prior art of record. Claims 4, 6, 8, 9, 14-15, and 18-20 will be allowed over prior art of record if rewritten or amend to overcome either objections or 112 rejections as set forth in the office action above. The following is an examiner' s statement of reason for allowance: the prior art made of record does not teach or fairly suggest the following: Regarding claims 1 and 15, Lim et al. (Patent No.: US 9,711,603 B2) discloses a semiconductor device in Fig. 1B comprising: a substrate (substrate 110); a via contact electrode (plug 160) that extends in a first direction (downward vertical direction) intersecting a surface of the substrate; a first wiring (conductive pattern 130) that is connected to the via contact electrode and extends in a second direction (horizontal direction) intersecting the first direction; and an insulating layer (layer 120) that is provided on a side of the first wiring opposite to the via contact electrode in the first direction, wherein the first wiring includes a first conductive member (conductive material of pattern 130) that extends in the second direction, and the via contact electrode includes a first electrode region (body 162) that extends in the first direction, and a second electrode region (plate 161) that is provided on the side of the insulating layer in the first direction with respect to the first electrode region and has a length (W1) in the second direction larger than a length of the first electrode region (W2) in the second direction (see column 7, line 60 through column 8, line 64). Lim et al. fails to disclose a first barrier conductive film that covers a surface of the first conductive member, that is on a side of the insulating layer in the first direction, a surface of the second electrode region on the side of the insulating layer in the first direction is in contact with the first barrier conductive film and is entirely covered with the first barrier conductive film as recited in claim 1. Lim et al. fails to disclose the first barrier conductive film includes a first portion that is in contact with a surface of the second electrode region on one side in a third direction intersecting the first direction and the second direction, and a second portion that is in contact with a surface of the second electrode region on the other side in the third direction as recited in claim 15. Claims 2-4, and 16-20 depend on claims 1 and 15, and therefore also include said claimed limitation. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CUONG B NGUYEN whose telephone number is (571)270-1509 (Email: CuongB.Nguyen@uspto.gov). The examiner can normally be reached Monday-Friday, 8:30 AM-5:00 PM Eastern Standard Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven H. Loke can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CUONG B NGUYEN/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Feb 09, 2024
Application Filed
Aug 11, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12745433
SEMICONDUCTOR DEVICE
3y 7m to grant Granted Sep 22, 2026
Patent 12745438
SEMICONDUCTOR DEVICE
2y 9m to grant Granted Sep 22, 2026
Patent 12745399
METHOD OF FORMING MEMORY STRUCTURE
2y 11m to grant Granted Sep 22, 2026
Patent 12740385
PACKAGE AND FABRICATION METHOD THEREOF
4y 1m to grant Granted Sep 15, 2026
Patent 12720739
THREE-DIMENSIONAL MEMORY DEVICES AND METHODS FOR FORMING THE SAME
4y 3m to grant Granted Aug 25, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+15.4%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 980 resolved cases by this examiner. Grant probability derived from career allowance rate.

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