Prosecution Insights
Last updated: October 02, 2026
Application No. 18/439,381

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Non-Final OA §102
Filed
Feb 12, 2024
Priority
Jul 19, 2023 — RE 10-2023-0094117 +1 more
Examiner
SMITH, SAMUEL JONATHAN
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
41 granted / 49 resolved
+15.7% vs TC avg
Moderate +6% lift
Without
With
+5.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
22 currently pending
Career history
66
Total Applications
across all art units

Statute-Specific Performance

§103
60.9%
+20.9% vs TC avg
§102
30.7%
-9.3% vs TC avg
§112
8.1%
-31.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 49 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-5 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Kim (US 20130009286 A1). Regarding claim 1, Kim discloses a semiconductor package (Fig. 10), comprising: a substrate (110); a seed layer (142) on the substrate; and a wiring pad (comprises 144d, 150d, and 160) on the seed layer, wherein the wiring pad includes: a pad portion (150d); and a capping layer (144d) on the seed layer and covering the pad portion, wherein a bottom surface of the pad portion is in contact with a top surface of the seed layer, and wherein a width of a top surface of the pad portion is greater than a width of the bottom surface of the pad portion (Shown). Regarding claim 2, Kim discloses wherein the capping layer is in contact with the top surface of the seed layer (Shown in Fig. 10), and a width of a top surface of the wiring pad is greater than a width of a bottom surface of the wiring pad (Fig. 10 shows top surface of 160 having a width greater than bottom surface of 150d). PNG media_image1.png 434 562 media_image1.png Greyscale Regarding claim 3, Kim discloses wherein the pad portion has a first lateral surface and a second lateral surface that are opposite to each other, wherein the capping layer has: a first width in a horizontal direction on the first lateral surface of the pad portion, the horizontal direction being parallel to a top surface of the substrate; and a second width in the horizontal direction on the second lateral surface of the pad portion, wherein the first width and the second width are the same as each other at the same height in a vertical direction from the top surface of the substrate, the vertical direction being perpendicular to the top surface of the substrate (See attached figure). PNG media_image2.png 143 269 media_image2.png Greyscale Regarding claim 4, Kim discloses wherein a lateral surface of the pad portion is inclined at a first angle with respect to the top surface of the seed layer, wherein the first angle is an acute angle (See attached figure). Regarding claim 5, Kim discloses wherein the capping layer has: an inner lateral surface in contact with the lateral surface of the pad portion; and an outer lateral surface opposite the inner lateral surface with a thickness of the capping layer therebetween, wherein the outer lateral surface of the capping layer is inclined at a second angle with respect to the top surface of the seed layer, wherein PNG media_image3.png 434 562 media_image3.png Greyscale the second angle is an acute angle (See attached figure). Allowable Subject Matter Claims 6-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 6, the prior art of record fails to disclose wherein the first angle and the second angle are each in a range of about 45 degrees to about 90 degrees. Regarding claim 7, the prior art of record fails to disclose wherein the first angle and the second angle are different from each other. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL J SMITH whose telephone number is (703)756-5706. The examiner can normally be reached M-F 8-5 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at (571) 272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /S.J.S./Examiner, Art Unit 2817 /MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Feb 12, 2024
Application Filed
Aug 20, 2026
Non-Final Rejection mailed — §102
Sep 19, 2026
Interview Requested

Precedent Cases

Applications granted by this same examiner with similar technology

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Patent 12740116
JUNCTION FIELD EFFECT TRANSISTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
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Patent 12733338
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Patent 12733298
DISPLAY DEVICE
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
89%
With Interview (+5.7%)
3y 5m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 49 resolved cases by this examiner. Grant probability derived from career allowance rate.

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