Prosecution Insights
Last updated: August 17, 2026
Application No. 18/440,907

PARALLEL LINES FORMED BY ISOLATION CUT

Non-Final OA §102§103
Filed
Feb 13, 2024
Examiner
KHALIFA, MOATAZ
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
International Business Machines Corporation
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
57 granted / 62 resolved
+23.9% vs TC avg
Minimal +0% lift
Without
With
+0.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
41 currently pending
Career history
110
Total Applications
across all art units

Statute-Specific Performance

§103
75.1%
+35.1% vs TC avg
§102
18.5%
-21.5% vs TC avg
§112
4.4%
-35.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 62 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Invention I in the reply filed on 06/05/2026 is acknowledged. Claims 8-14 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 06/05/2026. Information Disclosure Statement The information disclosure statement (IDS) submitted on 02/13/2024 was filed after the mailing date of the application on 02/13/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification The disclosure is objected to because of the following informalities: In paragraph [0044] line 4, the following limitations are described: “… balk end of line (BEOL) processing” (emphasis added). The examiner believes that this is a misspelled word and that the correct format should be "… back end of line (BEOL) processing.". Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-5, 7 and 15-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wu, US 20230335407 A1 (Wu ‘407). Regarding claim 1; Wu teaches a semiconductor device (Wu ‘407: Annotated Fig (7) shared in this OA: 200), comprising: a first metal line (210); and a second metal line (210) adjacent and coplanar to the first metal line (210), wherein: the first metal line (210) and the second metal line (210) have a common patterning level; and the first metal line (210) and the second metal line (210) are separated by a cut region (First Cut Region) parallel to a length of the first metal line (210) and the second metal line (210). PNG media_image1.png 989 776 media_image1.png Greyscale Regarding claim 2; Wu ‘407 teaches all the limitations of the semiconductor device of claim 1. Further, Wu ‘407 teaches wherein the cut region (Wu ‘407: Annotated Fig (7) shared in this OA: First Cut Region)along the first metal line (210) and the second metal line (210) form two line features from a same mask ([0062]: Referring to FIG. 8, a first photomask (not shown in the figure) is formed on a top surface of the first dielectric layer. A part of the first dielectric layer is removed through etching based on the first photomask, and the independently disposed first line structures 210 are formed in the reserved first dielectric layer.”). Regarding claim 3; Wu ‘407 teaches all the limitations of the semiconductor device of claim 1. Further, Wu ‘407 teaches wherein the cut region (Wu ‘407: Annotated Fig (7) shared in this OA: First Cut Region) isolates the first (210) and second (210) metal lines. Regarding claim 4; Wu ‘407 teaches all the limitations of the semiconductor device of claim 1. Further, Wu ‘407 teaches wherein the cut region (Wu ‘407: Annotated Fig (7) shared in this OA: First Cut Region) is parallel to the first metal line (210). Regarding claim 5; Wu ‘407 teaches all the limitations of the semiconductor device of claim 1. Further, Wu ‘407 teaches wherein the cut region (Wu ‘407: Annotated Fig (7) shared in this OA: First Cut Region) isolates one or more line segments between the first (210) and second (210) metal lines. Regarding claim 7; Wu ‘407 teaches all the limitations of the semiconductor device of claim 1. Further, Wu ‘407 teaches wherein the cut region (Wu: Annotated Fig (7) shared in this OA: First Cut Region) has a rectangular shape. Regarding claim 15; Wu ‘407 teaches a semiconductor device (Wu: Annotated Fig (7) shared in this OA: 200), comprising: a first metal line (210), the first metal line (210) comprising a first part (210) and a second part (210), wherein the first part (210) is separated from the second part (210) by a first cut region (First Cut Region); and a second metal line (220), wherein the second metal line (220) changes level to extend around the second part of the first metal line (210, as can be seen in Fig (7) the second line extends above the second parts of the first line 210 which meets the limitations recited in the instant claim). Regarding claim 16; Wu ‘407 teaches all the limitations of the semiconductor device of claim 15. Further, Wu ‘407 teaches wherein the first cut region (Wu ‘407: Annotated Fig (7) shared in this OA: First Cut Region) is parallel with the first part (210) and the second part (210) of the first metal line (210). Regarding claim 17; Wu ‘407 teaches all the limitations of the semiconductor device of claim 15. Further, Wu ‘407 teaches wherein the first cut region (Wu ‘407: Annotated Fig (7) shared in this OA: First Cut Region) is located between the first part (210) and the second part (210). Regarding claim 18; Wu ‘407 teaches all the limitations of the semiconductor device of claim 15 Wu ‘407 teaches further comprising a second cut region (Wu ‘407: Annotated Fig (7) shared in this OA: Second Cut Region) in the second metal line (220), wherein the second cut region (Second Cut Region) is perpendicular to the first cut region (First Cut Region). Regarding claim 19; Wu ‘407 teaches all the limitations of the semiconductor device of claim 18 Further, Wu ‘407 teaches wherein the first cut region (Wu ‘407: Annotated Fig (7) shared in this OA: First Cut Region) and the second cut region (Second Cut Region) have a rectangular shape. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Wu, US 20230335407 A1 (Wu ‘407) in view of Lee, US 20090104768 A1 (Lee). Regarding claim 6; Wu ‘407 teaches all the limitations of the semiconductor device of claim 1 However, Wu ‘407 does not teach wherein a width of the cut region is smaller than a width of the first metal line prior to being cut by the cut region. Lee teaches wherein a width of the cut region (Lee: Figs (2A) to (2E): 72) is smaller than a width of the first metal line (64) prior to being cut by the cut region (72, paragraphs [0012] – [0017] describe the process by which a metal layer/line 64 get separated into line segments by the cut region 72 which is visibly smaller than the original width of the metal layer/line 64 prior to being cut as can be seen in Fig (2A). Wu ‘407 and Lee are considered analogous art. Thus, it would have been obvious, prior to the effective filing date of the instant application, to a persona having ordinary skill int e art, to modify Wu ‘407 by introducing the smaller width of the cut region as disclosed by Lee to improve the ability to connect different parts of the circuits while protecting against the possibilities of short circuits. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Wu, US 20230335407 A1 (Wu ‘407) in view of Wu, CN 117410268 A (Wu ‘268). Regarding claim 20; Wu ‘407 teaches all the limitations of the semiconductor device of claim 15. However, Wu ‘407 does not teach wherein at least one of the first cut region or the second cut region has an L-shape. Wu ‘268 teaches wherein at least one of the first cut region (Wu ‘268: Annotated Fig (2) shared in this OA: 120) or the second cut region has an L-shape. Wu ‘407 and Wu ‘268 are considered analogous art. Thus, it would have been obvious prior to the effective filing date of the instant application, to a person having ordinary skill in the art, to modify Wu ‘407 by constructing the cut to have an L-shape as disclosed in Wu ‘268 to create more line segments using the same cut which improves the density of conductive lines in the circuit and improves the efficiency of making them. PNG media_image2.png 796 744 media_image2.png Greyscale Conclusion Prior art made of record but not relied upon is considered pertinent to applicant’s disclosure: Kuo et al, US 20230352404 A1 (Kuo); discloses metal lines and cuts between them. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Moataz Khalifa whose telephone number is (703)756-1770. The examiner can normally be reached Monday - Friday (8:30 am - 5:00). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /M.K./Examiner, Art Unit 2817 /Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Feb 13, 2024
Application Filed
Jul 23, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
92%
With Interview (+0.1%)
3y 5m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 62 resolved cases by this examiner. Grant probability derived from career allowance rate.

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