Prosecution Insights
Last updated: August 17, 2026
Application No. 18/446,608

INDUCTIVE SENSOR ASSEMBLY

Final Rejection §103
Filed
Aug 09, 2023
Priority
Aug 09, 2022 — provisional 63/396,314 +1 more
Examiner
YENINAS, STEVEN LEE
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Renesas Electronics America Inc.
OA Round
4 (Final)
73%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
78%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
351 granted / 478 resolved
+5.4% vs TC avg
Minimal +5% lift
Without
With
+4.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
26 currently pending
Career history
499
Total Applications
across all art units

Statute-Specific Performance

§101
3.3%
-36.7% vs TC avg
§103
57.6%
+17.6% vs TC avg
§102
15.9%
-24.1% vs TC avg
§112
22.1%
-17.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 478 resolved cases

Office Action

§103
DETAILED ACTION Priority Acknowledgment is made of applicant's claim for foreign priority based on an application filed in DE on 3/21/2023. It is noted, however, that applicant has not filed a certified copy of the DE 102023202516.7 application as required by 37 CFR 1.55. An attempt to retrieve the priority documents failed as identified in the notice filed 8/21/2024. Response to Amendment Receipt is acknowledged of the amendment filed 3/18/2026. Claims 1, 6, 11-13, 16 and 20 are pending. Claims 2-5,7-10, 14-15, and 17-19 were canceled. Claims 1, 6, 11, 13, 16, and 20 were amended. The Applicant’s response fails to address that the priority documents have not been received. Please provide a certified copy of the priority documents. The applicant has failed to address the issue. Response to Arguments Applicant’s arguments with respect to claim(s) 1, 6, 11-13, 16 and 20 have been considered but are moot in view of new grounds of rejection. The pending rejection of claims 1 and 13 are made over US 2021/0348910 (Wood) in view of US 2022/0178672 (Heinemann). Therefore, claims 1, 6, 11-13, 16 and 20 are rejected as outlined below. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 4, 6, 8-10, 12-14, 16-17, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0348910 (Wood) in view of US 2022/0178672 (Heinemann). Regarding claim 1, wood teaches an inductive sensor (inductive sensor 800 of Figs. 22-23) assembly comprising: a printed circuit board, PCB, arrangement comprising a first layer-stacked PCB and a second layer-stacked PCB stacked together each having a first layer and a second layer (a circuit board 810 comprises first layers 820 and second layers 830 stacked together in a manner equivalent to the limitations as claimed; see Figs. 22-23), wherein: the first layer-stacked PCB comprises a plurality of sensor chip components (second layers 230 comprise processing circuitry 130; see Fig. 22); the second layer-stacked PCB comprising a coil system comprising one or more sensor coils corresponding to the plurality of sensor chip components (first layers 820 comprise a sensor element 110 comprising receive coils and transmit coils; see Figs. 22-23; see [0051]); the coil system is provided only on the second layer-stacked PCB (the sensor elements 110 are provided only on the first layers 820; see Fig. 22); and the layer-stacked PCBs are ring or arc shaped (one of ordinary skill in the art would reasonably understand the circuit boards 820 and 830 would be ring shaped in an equivalent manner as circuit boards 220 and 240 of Fig. 2; see Fig. 2; see Figs. 22-23). Wood fails to teach the first layer of the first layer-stacked PCB comprises a plurality of sensor chip components; the second layer of the first layer-stacked PCB comprising a fully filled copper shield configured to be used as digital ground; the first layer of the first layer-stacked PCB is separated from the second layer- stacked PCB by the second layer of the first layer-stacked PCB: the first layer and second layer of the second layer-stacked PCB comprising a coil system comprising one or more sensor coils corresponding to the plurality of sensor chip components; the plurality of sensor chip components is provided only on an outer surface of the first layer facing away from the coil system. Heinemann teaches the first layer of the first layer-stacked PCB comprises a plurality of sensor chip components (a first layer F of a PCB comprises a plurality of electronic components 1.2; see Fig. 4); the second layer of the first layer-stacked PCB comprising a fully filled copper shield configured to be used as digital ground (a second layer D of a first layer-stacked PCB comprises a copper shield; see [0052], further, Heinemann teaches wherein “The electromagnetic interruption of detector units 1.11, 1.12 by electronic components 1.2 or from external sources is inhibited in addition.” It would be obvious to one of ordinary skill in the art to form the copper shield as a digital ground in order to shield the detector units 1.11 from interference from the electronic components.; see Fig. 6; see [0068]); the first layer of the first layer-stacked PCB is separated from the second layer- stacked PCB by the second layer of the first layer-stacked PCB (layer F comprising the electronic components 1.2 is separated from the coils of the first detector unit 1.11 by the copper shield 1.13 in layer D; see Fig. 6); the first layer and second layer of the second layer-stacked PCB comprising a coil system comprising one or more sensor coils corresponding to the plurality of sensor chip components (layers A and B comprise detector unit 1.11 having excitation tracks 1.111, 1.113, 1.115 and excitation tracks 1.112, 1.114; see Fig. 6); the plurality of sensor chip components is provided only on an outer surface of the first layer facing away from the coil system (see Fig. 6). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the features of Heinemann into Wood in order to gain the advantage of forming the coils in multiple layers, wherein it is well-known in the art to form coils in multiple layers such that a transmitter coil is in a first layer and receivers coil in a second layer, or receiver coils are interleaved between two layers, wherein such arrangements provide known benefits including maximizing coupling/signal intensity, ease of manufacturing, and/or allowing compact coil sizes. The configuration as claimed would be obvious to one of ordinary skill in the art in order to separate the electronic components and the detector coils while also providing shielding allowing for a compact design without the electronic components interfering with the detector coils which may degrade sensitivity of the encoder. Alternatively, the claim would be obvious to one of ordinary skill in the art by simply removing the second detector unit 1.12 from Heinemann. One of ordinary skill in the art would reasonably be able to make a determination, as a matter of common sense, as to whether it is necessary to detect the position of two scales arranged on opposite sides of the circuit board. If only one scale is arranged for detection, it would be obvious to one of ordinary skill in the art that the second detector unit 1.12 may be removed, which would result in a detector 1.11, shield 1.13, and electronic components 1.2 arranged in a manner substantially identical to the detector as claimed. Regarding claim 13, the claim recites similar subject matter as claim 1 and is rejected in an equivalent manner as claim 1 above. Regarding claims 6 and 16, Wood teaches wherein: the inductive sensor assembly further comprises at least one conductive and rotatory sensor target; the sensor target is arranged on the same side of the PCB arrangement as the coil system, away from the sensor chip component element (the target 120 is an object that includes metal and moves relative to the sensor element 110, with the target 120 arranged on the same side of the PCB arrangement the coils of the sensor element 110 arranged in the first layers 820; see Figs. 22-23; see [0053]). Regarding claim 12, Heinemann teaches an inductive position sensor comprising the inductive sensor assembly according to claim 1 (see rejection of claim 1; see [0053]; see Figs. 22-23). Claim(s) 11 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0348910 (Wood) in view of US 2022/0178672 (Heinemann), and in further view of US 2014/06327432 (Elliott). Regarding claims 11 and 20, Heinemann fails to teach wherein the PCB arrangement further comprises a conducting shield comprising a ferrite sheet, arranged between the two separate layer-stacked PCBs. Elliott teaches wherein the PCB arrangement further comprises a conducting shield comprising a ferrite sheet, arranged between the two separate layer-stacked PCBs (a sensor package 10 is made from printed circuit boards and a ferrite layer is arranged between coils 32, 36, 22 and a layer comprising the signal processor 14 and a shield in the form of an integrated capacitor 16; see [0007], [0026], [0028]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the features of Elliott into Heinemann in order to gain the advantage of ferrite shields which is particularly advantageous as it is a high permeability material at nominal operating frequency of sensors and functions as an effective equivalent air gap and allows the size of the coils to be significantly reduced relative to conventional inductive sensors. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN LEE YENINAS whose telephone number is (571)270-0372. The examiner can normally be reached M - F 10 - 6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached on (571) 272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STEVEN L YENINAS/Primary Examiner, Art Unit 2858
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Prosecution Timeline

Show 2 earlier events
Jun 20, 2025
Response Filed
Jul 29, 2025
Final Rejection mailed — §103
Oct 29, 2025
Response after Non-Final Action
Nov 25, 2025
Request for Continued Examination
Dec 03, 2025
Response after Non-Final Action
Dec 18, 2025
Non-Final Rejection mailed — §103
Mar 18, 2026
Response Filed
May 26, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
73%
Grant Probability
78%
With Interview (+4.7%)
2y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 478 resolved cases by this examiner. Grant probability derived from career allowance rate.

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