DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 9-10 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 9, lines 5-6 recites “the second portion has a p-type impurity profile varying continuously in a direction from the fourth silicon carbide layer toward the third region, a concentration of p-type impurity contained in the second portion is higher than a concentration of p-type impurity contained in the first portion”. The “second portion” is a portion of the second region which is a region of the first silicon carbide semiconductor region which has “a first conductivity type” (see claim 1) and that first conductivity type is n-type, as recited in line 2 of this claim. There is no support in the applicant’s disclosure for this region having a p-type dopant profile. It is described as n-type in the applicants claims, specification, and drawings. The applicant defines, in paragraph 23 that:
-in the present specification, the “p-type impurity concentration” of a p-type silicon carbide region means the net p-type impurity concentration obtained by subtracting the n-type impurity concentration of the region from the p-type impurity concentration of the region. Furthermore, the “n-type impurity concentration” of an n-type silicon carbide region means the net n-type impurity concentration obtained by subtracting the p-type impurity concentration of the region from the n-type impurity concentration of the region”-
This means that n-type or p-type as used in the spec are the net doping, and so a region that has an n-type doping cannot also have a p-type doping, since n-type requires that there be more donors than acceptors and p-type means more acceptors than donors and both cannot simultaneously be true. Additionally, there is no support in the applicants disclosure for the portion having any sort of varying impurity profile, regardless of doping type. These issues mean that the claim is new matter.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9, lines 5-6 recites “the second portion has a p-type impurity profile varying continuously in a direction from the fourth silicon carbide layer toward the third region, a concentration of p-type impurity contained in the second portion is higher than a concentration of p-type impurity contained in the first portion”. The “second portion” is a portion of the second region which is a region of the first silicon carbide semiconductor region which has “a first conductivity type” (see claim 1) and that first conductivity type is n-type, as recited in line 2 of this claim. The applicant defines, in paragraph 23 that:
-in the present specification, the “p-type impurity concentration” of a p-type silicon carbide region means the net p-type impurity concentration obtained by subtracting the n-type impurity concentration of the region from the p-type impurity concentration of the region. Furthermore, the “n-type impurity concentration” of an n-type silicon carbide region means the net n-type impurity concentration obtained by subtracting the p-type impurity concentration of the region from the n-type impurity concentration of the region”.
This means that n-type or p-type as used in the spec are the net doping, and so a region that has an n-type doping cannot also have a p-type doping, since n-type requires that there be more donors than acceptors and p-type means more acceptors than donors and both cannot simultaneously be true. It is thus unclear how it is possible that the second portion can have both n-type and p-type conductivity. This issue renders the claim indefinite.
Note that dependent claims necessarily inherit any indefiniteness from the claims on which they depend.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by KOBOYASHI (US 20190074373).
Regarding claim 1, KOBOYASHI discloses a semiconductor device comprising:
a first electrode (source electrode 12, see fig 34, para 91);
a second electrode (drain electrode 13, see fig 34, para 91);
a silicon carbide layer (10 can be SiC, and is between 12 and 13, see fig 34, para 76) provided between the first electrode and the second electrode, the silicon carbide layer including
a first silicon carbide region of a first conductive type (the n-type layer 31 including 2, 3, 25 and 3c, see fig 34, para 213, 75 and 78) including a first region (fig 34, 2, para 75 and see figure I below), a second region (the n-doped region comprising the parts of 3, 3c and 25 below the top surface of 25 and above the bottom surface of 21, see fig 34, para 213 and figure I below), and a third region (the n-doped region comprising the parts of 3 and 3c above the upper surface of 25, see fig 34, para 213 and figure I below), the second region provided between the first region and the first electrode (the lower parts of 3 are between 2 and 12, see fig 34), a first-conductive-type impurity concentration of the second region being higher than a first-conductive-type impurity concentration of the first region (3 is an "n" region and 2 is an "n-" region, see fig 34), and the third region provided between the second region and the first electrode (the upper parts of 3 are between the lower parts of 3 and 12, see fig 34),
a second silicon carbide region of a second conductive type (p-type base region 4, see fig 34, para 76) provided between the first silicon carbide region and the first electrode (4 is between 3 and 12, see fig 34),
a third silicon carbide region of the first conductive type provided between the second silicon carbide region and the first electrode (n-type source region 5 is between 4 and 12, see fig 34), and
a fourth silicon carbide region of the second conductive type (p-type region 21, see fig 34, para 79) provided between the first region and the second region (a line can be drawn from 2 to 3c that passes through 21, see fig 34);
a gate electrode (fig 34, 9, para 83) provided in the silicon carbide layer and facing the first silicon carbide region, the second silicon carbide region, the third silicon carbide region, and the fourth silicon carbide region (portions of 9 face 2, 3, 4, 5, and 21, see fig 34); and
a gate insulating layer (fig 34, 8, para 77) provided between the first silicon carbide region and the gate electrode (8 is between 2 and 9, see fig 34), between the second silicon carbide region and the gate electrode (8 is between 9 and 4, see fig 34), between the third silicon carbide region and the gate electrode (8 is between 9 and 5, see fig 34), and between the fourth silicon carbide region and the gate electrode (8 is between 21 and 9, see fig 34),
wherein
the second region includes a first portion (fig 4, 25, para 193) and a second portion (fig 4, 3c, para 213), the second portion is provided between the first portion and the gate insulating layer (3c is between 25 and 8, see fig 34) and between the fourth silicon carbide region and the third region (3c is between 21 and 4, see fig 34),
the first portion is in contact with the first region and the third region (25 is in at least indirect contact with the first region 2 and the upper parts of 3, and is in electrical contact with them since they are all n-type regions, see fig 34 and figure I below), and
a first-conductive-type impurity concentration of the second portion is lower than a first-conductive-type impurity concentration of the first portion (25 is more highly doped than 3, of which 3c is a part, see fig 34, para 193 and 213).
Regarding claim 2, KOBOYASHI discloses the semiconductor device according to claim 1, wherein a first- conductive-type impurity concentration of the third region is lower than the first- conductive-type impurity concentration of the second region (the doping concentration of 25 in the second region is higher than the doping concentration of 3 in the third region, see fig 34, para 193).
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Figure I: KOBOYASHI figure 34 with added annotations.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over KOBOYASHI (US 20190074373) in view of KOBOYASHI ‘698 (US 20180040698).
Regarding claim 3, KOBOYASHI discloses the semiconductor device according to claim 1, wherein the first conductive type is an n-type (2, 3, 25 and 5 are n-type, see fig 34), and the second conductive type is a p-type (4 and 21 are p-type, see fig 34).
KOBOYASHI fails to explicitly disclose a device wherein a concentration of aluminum contained in the second portion is higher than a concentration of aluminum contained in the first portion.
KOBOYASHI ‘698 teaches a device wherein a concentration of aluminum contained in the second portion is higher than a concentration of aluminum contained in the first portion (there is more Al in a region of 15b near the trench at the bottom of 15b in a second region than in a region of 15b far away from the trench at the top of 15b, see fig 12 and 17 and para 82).
KOBOYASHI and KOBOYASHI ‘698 are analogous art because they both are directed towards trench gate semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of KOBOYASHI with the aluminum concentration of KOBOYASHI ‘698 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of KOBOYASHI with the aluminum concentration of KOBOYASHI ‘698 in order to lower the ON resistance (see KOBAYASHI '698 para 85).
Regarding claim 4, KOBOYASHI and KOBOYASHI ‘698 disclose the semiconductor device according to claim 3.
KOBOYASHI fails to explicitly disclose a device, wherein the concentration of aluminum contained in the second portion becomes lower from the fourth silicon carbide region toward the third region.
KOBOYASHI ‘698 teaches a device, wherein the concentration of aluminum contained in the second portion becomes lower from the fourth silicon carbide region toward the third region (there is a concentration of Al in 15b in the second region, and there is not one in the fourth source region 17, see fig 12, para 62-64 and 82).
KOBOYASHI and KOBOYASHI ‘698 are analogous art because they both are directed towards trench gate semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of KOBOYASHI with the aluminum concentrations of KOBOYASHI ‘698 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of KOBOYASHI with the aluminum concentrations of KOBOYASHI ‘698in order to lower the ON resistance (see KOBAYASHI '698 para 85).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over KOBOYASHI (US 20190074373) in view of KOBOYASHI ‘884 (US 20180182884).
Regarding claim 5, KOBOYASHI discloses the semiconductor device according to claim 1.
KOBOYASHI fails to explicitly disclose a device, wherein a first- conductive-type impurity concentration of the third region is higher than the first- conductive-type impurity concentration of the second region.
KOBOYASHI ‘884 teaches a device, wherein a first- conductive-type impurity concentration of the third region is higher than the first- conductive-type impurity concentration of the second region (upper region of 2 2c is n+ doped and middle region of 2 2b is n-type, see fig 1, para 57).
KOBOYASHI and KOBOYASHI’884 are analogous art because they both are directed towards trench gate semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of KOBOYASHI with the doping of KOBOYASHI ‘884 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of KOBOYASHI with the doping of KOBOYASHI ‘884 in order to improve device characteristics (see KOBOYASHI '884 para 86).
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over KOBOYASHI (US 20190074373) in view of KIM (US 20220149196).
Regarding claim 9, as best as the examiner is able to ascertain the claimed invention, KOBOYASHI discloses the semiconductor device according to claim 1, wherein
the first conductive type is an n-type (the first conductivity type of regions 2, 3, 25, 3c, and 5 is n-type, see fig 34), and the second conductive type is a p-type (the second conductivity type of 21, 22, 4 and 23 is p-type, see fig 34), and
a concentration of p-type impurity contained in the second portion is lower than a concentration of p-type impurity contained in the fourth silicon carbide layer (second portion 25 is an n region and fourth silicon carbide layer 21 is a p+ region, and doping concentration as established in paragraph 25 of the specification is net, therefore the p-type concentration of p+ region 21 is larger than that of the n region 25, see fig 34).
KOBOYASHI fails to explicitly disclose a device wherein the second portion has a p-type impurity profile varying continuously in a direction from the fourth silicon carbide layer toward the third region, and
a concentration of p-type impurity contained in the second portion is higher than a concentration of p-type impurity contained in the first portion.
KIM teaches a device wherein the second portion has a p-type impurity profile varying continuously in a direction from the fourth silicon carbide layer toward the third region (the impurity concentration of p-type dopant Al varies continuously in the vertical direction along a-a;' in the n-doped region near the gate trench below 1 micron in depth, see fig 4, para 86-88, and
a concentration of p-type impurity contained in the second portion is higher than a concentration of p-type impurity contained in the first portion (the impurity concentration of p-type dopant Al can be higher at portions of the device in contact with the left side of the gate than at the portion to the left and below the gate, see fig 4A).
KOBOYASHI and KIM are analogous art because they both are directed towards trench gate semiconductor transistor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of KOBOYASHI with the doping profiles of KIM because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of KOBOYASHI with the doping profiles of KIM in order to improve reliability (see KIM para 127).
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over KOBOYASHI (US 20190074373) in view of KIM (US 20220149196) and further in view of KYOGOKU (US 20210083101).
Regarding claim 10, as best as the examiner is able to ascertain the claimed invention, KOBOYASHI and KIM disclose the semiconductor device according to claim 9.
KOBOYASHI and KIM fail to explicitly disclose a device, wherein
a first-conductive- type impurity concentration of the second portion is equal to or less than one-half of the first- conductive-type impurity concentration of the first portion.
KYOGOKU teaches a device, wherein
a first-conductive- type impurity concentration of the second portion is equal to or less than one-half of the first- conductive-type impurity concentration of the first portion (the concentration of the second portion which can be the n- region 26b near the gate 21 can be 4E14 per cc which is less than half the concentration of the first portion which can be n region 33 farther from the gate, that concentration being 1E16 or more, see fig 27, para 104 and 81) .
KOBOYASHI, KYOGOKU and KIM are analogous art because they both are directed towards trench gate semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the device of KOBOYASHI and KIM with the specific doping concentrations of KYOGOKU because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the device of KOBOYASHI and KIM with the specific doping concentrations of KYOGOKU in order to increase channel area per unit area (see KYOGOKU para 140).
Additionally, parameters such as specific doping concentrations in the art of semiconductor devices are subject to routine experimentation and optimization to achieve the desired device characteristics during fabrication. It would have been obvious to one of ordinary skill in the art at the time the invention was made to adjust the doping levels in the device of KOBOYASHI in order to reduce the ON resistance (see KOBOYASHI para 72).
Response to Arguments
Applicant's arguments filed 3/17/2026 have been fully considered but they are not persuasive.
Regarding claim 1, the applicant argues that KOBOYASHI does not disclose a device wherein “the first portion is in contact with the first region and the third region” because 25 (used by the examiner as the first portion) is not in direct contact with 2 (the first region) or the upper portion of 3 above 25 (the third region). This may be true, but the claim does not require direct contact, only “contact”. This includes the possibility of indirect physical contact or of electrical contact. KOBOYASHI, in figure 34, shows the first portion 25 which is in at least indirect physical contact with 2 and all portions of 3, and is also in electrical contact with 2 and all portions of 3 since it is connected to them by entirely n-type regions. Therefore, as further discussed in the rejection above, KOBOYASHI does disclose every element of claim 1, which is not patentable over KOBOYASHI.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONAS TYLER BEARDSLEY whose telephone number is (571)272-3227. The examiner can normally be reached 930-600 M-F.
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/JONAS T BEARDSLEY/Examiner, Art Unit 2811
/SAMUEL A GEBREMARIAM/Primary Examiner, Art Unit 2811
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