DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
Receipt is acknowledged of a request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e) and a submission, filed on 02/13/2026.
Response to Arguments
Applicant's arguments filed 02/09/2026 have been fully considered but they are not persuasive.
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Fig. 5 of Barth discloses a first interconnect structure 206/208 formed of a first metal (conductive liner 206 typically comprises Ta, TaN, WN, TiN – Ta, W and Ti are metal) and having a first horizontal top surface (as labeled by examiner above – top surface of 206), wherein the first interconnect structure includes a region 208 disposed only along the first horizontal top surface and contains copper, although aluminum, other metals and combinations thereof may also be used;
Clevenger teaches germanium as suitable material for an interconnect structure 110 serving the same purpose as Barth’s first interconnection structure 208 (See FIG. 6; “..Alternative materials for the interconnect 110 include any suitable conductive material, such as polycrystalline or amorphous silicon, germanium, silicon germanium, a metal..”).
Note germanium as the material for the interconnect structure is interchangeable with copper, or aluminum.
The resulting structure would have been one meeting the claimed invention.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Barth (US 6,613,664) in view of Clevenger (US 9,786,603).
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Regarding Claim 1, fig. 5 of Barth discloses a semiconductor device comprising:
a first interconnect structure 206/208 formed of a first metal (conductive liner 206 typically comprises Ta, TaN, WN, TiN – Ta, W and Ti are metal) and having a first horizontal top surface (as labeled by examiner above – top surface of 206), wherein the first interconnect structure includes a region 208 disposed only along the first horizontal top surface and contains copper, although aluminum, other metals and combinations thereof may also be used; and
a second interconnect structure 227 (“via 227”) formed of a second metal and in contact with the first interconnect structure (note the “contact” is an electrical contact), the second interconnect structure 227 comprising:
a first portion 224 (“cylindrical portion 224”) disposed above the horizontal top surface of the first interconnect structure 208; and
a second portion 226 (“barbed portion 226”) disposed below the horizontal top surface and laterally extending beyond sidewalls of the first portion (FIG. 5).
Barth does not disclose that the region 208 contains germanium.
Clevenger teaches germanium as suitable material for an interconnect structure 110 serving the same purpose as Barth’s first interconnection structure 208 (See FIG. 6; “..Alternative materials for the interconnect 110 include any suitable conductive material, such as polycrystalline or amorphous silicon, germanium, silicon germanium, a metal..”).
Note germanium as the material for the interconnect structure is interchangeable with copper, or aluminum.
It would have been prima facie obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Barth to includes geranium based on the teachings of Clevenger noted above, because he motivation to do so would have been to try germanium as a known suitable material for Barth’s first interconnection structure, with a reasonable expectation of success. (It has been held that mere selection of a material suitable for an intended use is a matter of obvious design choice when such suitability is known in the art; In re Leshin, 125 USPQ 416).
Regarding Claim 2, Barth in view of Clevenger discloses the semiconductor device of claim 1, wherein the first metal is cobalt (Co) and the second metal is tungsten (W) (Clevenger, Column 2, line 61 - 67 teaches both cobalt and tungsten as suitable metal materials. As such claim 2 would be prima facie obvious as a matter of selection of known suitable materials, with a reasonable expectation of success).
Regarding Claim 3, Barth in view of Clevenger discloses the semiconductor device of claim 1, further comprising a dielectric layer 210, 212 around the first portion 224 of the second interconnect structure 227. (Barth “An optional dielectric cap layer 210 preferably comprising SiN,..”; and “Alternatively, the dielectric layer 212 may comprise conventional dielectrics such as silicon dioxide and/or silicon nitride, for example.”)
Regarding Claim 4, Barth in view of Clevenger discloses the semiconductor device of claim 3, wherein the dielectric layer 210, 212 comprises silicon nitride (Si3N4) (Barth; “An optional dielectric cap layer 210 preferably comprising SiN,..”; and “Alternatively, the dielectric layer 212 may comprise conventional dielectrics such as silicon dioxide and/or silicon nitride, for example.”).
Regarding Claim 5, Barth in view of Clevenger discloses the semiconductor device of claim 3, wherein the dielectric layer 210, 212 is disposed above the germanium (ie located in top surface of 208) and the second portion 226 of the second interconnect structure 227 (Barth, FIG. 5).
Regarding Claim 6, Barth in view of Clevenger discloses the semiconductor device of claim 1. However wherein the second portion laterally extends to a width of about 9 to 11 nanometers (nm) -- Barth in view of Clevenger is silent.
Barth teaches, more broadly, the second portion 226 serves to provide a larger surface area for contact between the first interconnect structure 208 and second interconnect structure 227, thereby stabilizing thermal expansion effects and improving their electrical reliability (Barth; See para beginning in Column 8, line 52 “The novel circuit and method disclosed herein…”).
It would have been prima facie obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Barth in view of Clevenger to achieve Claim 6, based on the teachings of Barth, because an artisan would have known to use routine experimentation to discover optimum or workable ranges of the laterally extending width of the second portion, since it has been held that the discovery of optimum or workable ranges is prima facie obvious for one of ordinary skill in the art.
Regarding Claim 7, Barth in view of Clevenger discloses the semiconductor device of claim 1. Regarding further wherein the second portion vertically extends to a depth of about 7 to 9 nanometers (nm) -- Barth in view of Clevenger is silent.
Barth teaches, more broadly, the second portion 226 serves to provide a larger surface area for contact between the first interconnect structure 208 and second interconnect structure 227, thereby stabilizing thermal expansion effects and improving their electrical reliability (Barth; See para beginning in Column 8, line 52 “The novel circuit and method disclosed herein…”).
It would have been prima facie obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Barth in view of Clevenger discloses to achieve Claim 7, based on the teachings of Barth, because an artisan understands that using routine experimentation to discover optimum or workable ranges of the vertically extending depth of the second portion, since it has been held that the discovery of optimum or workable ranges is prima facie obvious for one of ordinary skill in the art.
Regarding Claim 8, Barth discloses a semiconductor device (See FIG. 5 above), comprising:
a first interconnect structure 206/208 formed of a first metal;
a second interconnect structure 227 formed of a second metal and comprising:
a first portion 224 (“substantially cylindrical portion 224”) vertically extending into the first interconnect structure; and
a second portion 226 (“barbed portion 226”) disposed above and vertically extending away from the first portion;
a non-germanium region 208 (contains copper, although aluminum, other metals and combinations thereof may also be used) disposed only along a top of the first interconnect structure and around the first portion 226 of the second interconnect structure 227
Barth does not disclose a germanium region disposed only along a top of the first interconnect structure and around the first portion of the second interconnect structure.
However, Clevenger teaches germanium as suitable material for an interconnect structure 110 serving the same purpose as Barth’s first interconnection structure (See Clevenger, FIG. 6 noted above in rejection of Claim 1; “..Alternative materials for the interconnect 110 include any suitable conductive material, such as polycrystalline or amorphous silicon, germanium, silicon germanium, a metal..”). Selection of germanium as the conductive material for Barth’s structure 208 would result in a germanium region disposed on top of the first interconnect structure 208 and around the first portion 226 of the second interconnect structure 227.
It would have been prima facie obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Barth to achieve claim 8 based on the teachings of Clevenger noted above, because an artisan of ordinary skill would have known to try germanium as a known suitable material for Barth’s first interconnection structure, with a reasonable expectation of success (It has been held that mere selection of a material suitable for an intended use is a matter of obvious design choice when such suitability is known in the art; In re Leshin, 125 USPQ 416).
Regarding Claim 9, Barth in view of Clevenger discloses the semiconductor device of claim 8, wherein the first metal is cobalt (Co) and the second metal is tungsten (W) (Clevenger, Column 2, line 61 - 67 teaches both cobalt and tungsten as suitable metal materials; As such claim 9 would be prima facie obvious as a matter of selection of known suitable materials, with a reasonable expectation of success).
Regarding Claim 10, Barth in view of Clevenger discloses the semiconductor device of claim 8, further comprising a dielectric layer 204, 210, 212, 228 around the first portion 224 of the second interconnect structure 227 (BARTH ‘664, FIG. 5).
Regarding Claim 11, Barth in view of Clevenger discloses the semiconductor device of claim 10, wherein the dielectric layer 204, 210, 212, 228 comprises silicon nitride (Si3N4) (Barth; “An optional dielectric cap layer 210 preferably comprising SiN,..”; and “Alternatively, the dielectric layer 212 may comprise conventional dielectrics such as silicon dioxide and/or silicon nitride, for example.”).
Regarding Claim 12, Barth in view of Clevenger discloses and/or teaches the semiconductor device of claim 10, wherein the dielectric layer 204, 210, 212, 228 is disposed above the germanium and the second portion 224 of the second interconnect structure 227 (Barth; Note portion 228 is located above top surface of 224; See para beginning “A third dielectric layer 228, preferably….”).
Regarding Claim 13, Barth in view of Clevenger discloses the semiconductor device of claim 8. Regarding further wherein the second portion laterally extends to a width of about 9 to 11 nanometers (nm) -- Barth in view of Clevenger is silent.
Barth teaches, more broadly, the second portion 226 serves to provide a larger surface area for contact between the first interconnect structure 208 and second interconnect structure 227, thereby stabilizing thermal expansion effects and improving their electrical reliability (Barth; See para beginning in Column 8, line 52 “The novel circuit and method disclosed herein…”).
It would have been prima facie obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Barth in view of Clevenger to achieve Claim 13, based on the teachings of Barth, because the motivation to do so would have been to use routine experimentation to discover optimum or workable ranges of the laterally extending width of the second portion, since it has been held that the discovery of optimum or workable ranges is prima facie obvious for one of ordinary skill in the art.
Regarding Claim 14, Barth in view of Clevenger discloses the semiconductor device of claim 8. Regarding further wherein the second portion vertically extends to a depth of about 7 to 9 nanometers (nm) -- Barth in view of Clevenger is silent.
Barth teaches, more broadly, the second portion 226 serves to provide a larger surface area for contact between the first interconnect structure 208 and second interconnect structure 227, thereby stabilizing thermal expansion effects and improving their electrical reliability (Barth; See para beginning in Column 8, line 52 “The novel circuit and method disclosed herein…”).
It would have been prima facie obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Barth in view of Clevenger to achieve Claim 14, based on the teachings of Barth, because an artisan would have known to use routine experimentation to discover optimum or workable ranges of the laterally extending width of the second portion, since it has been held that the discovery of optimum or workable ranges is prima facie obvious for one of ordinary skill in the art.
Regarding independent Claim 15, Barth discloses a semiconductor device (See FIG. 5 noted in rejection above), comprising:
a first interconnect structure 206/208 formed of a first metal (conductive liner 206 typically comprises Ta, TaN, WN, TiN – Ta, W and Ti are metal) and having a top surface (as labeled by examiner above in rejection of claim 1), wherein the first interconnect structure includes a region 208 disposed only along the first horizontal top surface and contains copper, although aluminum, other metals and combinations thereof may also be used; and
a second interconnect structure 227 formed of a second metal and comprising:
a first portion 226 vertically extending a first distance and laterally extending a second distance in the first interconnect structure; and
a second portion 224 disposed above and vertically extending away from the first portion 226.
Barth does not disclose that the region 208 contains germanium.
Clevenger teaches germanium as suitable material for an interconnect structure 110 serving the same purpose as Barth’s first interconnection structure (See Clevenger, FIG. 6 noted above in the rejection; “..Alternative materials for the interconnect 110 include any suitable conductive material, such as polycrystalline or amorphous silicon, germanium, silicon germanium, a metal..”).
Note selection of germanium as the material for the interconnect structure would result in -- Barth’s interconnect structure having a top surface along which germanium is distributed -- as recited by instant Claim 15.
It would have been prima facie obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Barth to achieve claim 15 based on the teachings of Clevenger noted above, because an artisan of ordinary skill would have known to try germanium as a known suitable material for Barth’s first interconnection structure, with a reasonable expectation of success (It has been held that mere selection of a material suitable for an intended use is a matter of obvious design choice when such suitability is known in the art; In re Leshin, 125 USPQ 416).
Regarding Claim 16, Barth in view of Clevenger discloses the semiconductor device of claim 15, further comprising a dielectric layer 210, 212, 228 disposed above a top surface of the first interconnect structure 208, the dielectric layer comprising Si3N4 (Barth; “An optional dielectric cap layer 210 preferably comprising SiN,..”; and “Alternatively, the dielectric layer 212 may comprise conventional dielectrics such as silicon dioxide and/or silicon nitride, for example.”).
Regarding Claim 17, Barth in view of Clevenger discloses the semiconductor device of claim 16, wherein the dielectric layer 210, 212, 228 is disposed above the top surface comprising the germanium and the second portion 224 of the second interconnect structure 227 (Barth, FIG. 5).
Regarding Claim 18, Barth in view of Clevenger discloses the semiconductor device of claim 15, wherein the first metal is cobalt (Co) and the second metal is tungsten (W) (Clevenger, Column 2, line 61 - 67 teaches both cobalt and tungsten as suitable metal materials. It would within the purview of one of ordinary skill in the art to select suitable materials, with a reasonable expectation of success).
Regarding Claim 19, Barth in view of Clevenger discloses the semiconductor device of claim 15. Regarding further wherein the second portion laterally extends to a width of about 9 to 11 nanometers (nm) -- Barth in view of Clevenger is silent. Barth teaches, more broadly, the second portion 226 serves to provide a larger surface area for contact between the first interconnect structure 208 and second interconnect structure 227, thereby stabilizing thermal expansion effects and improving their electrical reliability (Barth; See para beginning in Column 8, line 52 “The novel circuit and method disclosed herein…”).
It would have been prima facie obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Barth in view of Clevenger to achieve Claim 19, based on the teachings of Barth. The motivation to do so would have been to use routine experimentation to discover optimum or workable ranges of the laterally extending width of the second portion, since it has been held that the discovery of optimum or workable ranges is prima facie obvious for one of ordinary skill in the art.
Regarding Claim 20, Barth in view of Clevenger discloses the semiconductor device of claim 15. Regarding further wherein the second portion vertically extends to a depth of about 7 to 9 nanometers (nm) -- Barth in view of Clevenger is silent. However, note Barth teaches, more broadly, the second portion 226 serves to provide a larger surface area for contact between the first interconnect structure 208 and second interconnect structure 227, thereby stabilizing thermal expansion effects and improving their electrical reliability (Barth; See para beginning in Column 8, line 52 “The novel circuit and method disclosed herein…”).
It would have been prima facie obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Barth in view of Clevenger to achieve Claim 20, based on the teachings of Barth. The motivation to do so would have been to use routine experimentation to discover optimum or workable ranges of the vertically extending depth of the second portion, since it has been held that the discovery of optimum or workable ranges is prima facie obvious for one of ordinary skill in the art.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VONGSAVANH SENGDARA whose telephone number is (571)270-5770. The examiner can normally be reached M-F 9AM-6PM EST.
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/VONGSAVANH SENGDARA/Primary Examiner, Art Unit 2893
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