DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement filed on August 10, 2023 and November 14, 2024 have been considered by the Examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 7-11, 14-17 and 20 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Zte Corp (CN 115315059; cited in the IDS; hereinafter Zte).
Regarding claim 1, Zte discloses a printed circuit board connector structure (see figure 1), comprising: an outer ground (230) defining a receiving area; and a pair of traces (210,220) located in the receiving area, the pair of traces (210,220) collectively having a first side, a second side, a third side, and a fourth side (see figure 1), wherein the outer ground (230) extends around each of the first side, the second side, and the third side of the pair of traces (see figure 1).
Regarding claim 2, Zte discloses the printed circuit board connector structure (see figure 1), wherein the outer ground (230) extends only around the first side, the second side, and the third side of the traces (210,220; see figure 1).
Regarding claim 3, Zte discloses the printed circuit board connector structure (see figure 1), wherein the outer ground (230) has a first end and a second end opposite its first end, the first end having a curved configuration (see figure 1), the second end having a curved configuration, and each of the first end and the second end reduces any signal from either of the traces from leaving the receiving area (see figure 1).
Regarding claim 4, Zte discloses the printed circuit board connector structure (see figure 1), wherein the first end of the outer ground (230) extends in a direction toward the second end of the outer ground (see figure 1).
Regarding claim 7, Zte discloses the printed circuit board connector structure (see figure 1), wherein each trace (210,220) carries a different signal (paragraph 0045-0046).
Regarding claim 8, Zte discloses the printed circuit board connector structure (see figure 1), wherein each trace (210,220) carries a power signal (paragraph 0045-0046).
Regarding claim 9, Zte discloses a printed circuit board connector structure (see figure 1), comprising: an outer ground defining a receiving area; a first trace (210) located in the receiving area, the first trace (210) having a first side and a second side opposite to the first side (see figure 1); and a second trace (220) spaced apart from the first trace (210), the second trace (220) located in the receiving area, the second trace (220) having a third side and a fourth side opposite to the third side, the fourth side of the second trace (220) being proximate to the second side of the first trace (see figure 1), wherein the outer ground extends around the first side of the first trace and around the third side of the second trace (see figure 1).
Regarding claim 10, Zte discloses the printed circuit board connector structure (see figure 1), wherein the outer ground has a first curved end and a second curved end opposite its first curved end (see figure 1), and each of the first curved end and the second curved end reduces any signal from either of the first trace or the second trace from leaving the receiving area (see figure 1).
Regarding claim 11, Zte discloses the printed circuit board connector structure (see figure 1), wherein the first curved end of the outer ground extends in a direction toward the second curved end of the outer ground (see figure 1).
Regarding claim 14, Zte discloses the printed circuit board connector structure (see figure 1), wherein the first trace (210) and the second trace (220) carry different signals (see figure 1; paragraph 0045-0046).
Regarding claim 15, Zte discloses a printed circuit board, comprising: a first connector structure (see figure 1) including: a first outer ground defining a first receiving area; and a first pair of vertical traces (210, 220) located in the first receiving area, the first pair of vertical traces (210,220) collectively having a first side, a second side, a third side, and a fourth side (see figure 1), wherein the first outer ground extends around each of the first side, the second side, and the third side of the first pair of vertical traces; and a second connector structure (paragraph 0045; S410) including: a second outer ground defining a second receiving area; and a second pair of vertical traces located in the second receiving area, the second pair of vertical traces collectively having a fifth side, a sixth side, a seventh side, and an eighth side, wherein the second outer ground (paragraph 0045) extends around each of the fifth side, the sixth side, and the seventh side of the second pair of vertical traces, wherein the first outer ground and the second outer ground reduce any signals leaving the first receiving area and the second receiving area, respectively (paragraph 0045; S410).
Regarding claim 16, Zte discloses the printed circuit board (see figure 1), wherein the first outer ground extends only around the first side, the second side, and the third side of the first pair of vertical traces (210, 220), and the second outer ground extends only around the fifth side, the sixth side, and the seventh side of the second pair of vertical traces (see figure 1).
Regarding claim 17, Zte discloses the printed circuit board (see figure 1), wherein the first outer ground has a first curved end and a second curved end opposite its first curved end (see figure 1), the second outer ground has a third curved end and a fourth curved end opposite its third curved end, and each of the second curved end and the third curved end extending between the first pair of vertical traces and the second pair of vertical traces (see figure 1).
Regarding claim 20, Zte discloses the printed circuit board (see figure 1), wherein each of the vertical traces carries a different signal (see figure 1; paragraph 0045-0046).
4. Claims 1, 5, 6, 9, 12, 13, 18 and 19 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Takeda (US 2010/012366; cited in the IDS).
Regarding claim 1, Takeda discloses a printed circuit board connector structure (see figure 6a), comprising: an outer ground (302) defining a receiving area; and a pair of traces (102a,102b) located in the receiving area, the pair of traces (102a,102b) collectively having a first side, a second side, a third side, and a fourth side (see figure 6a-6c), wherein the outer ground (302) extends around each of the first side, the second side, and the third side of the pair of traces (see figure 6a-6c).
Regarding claim 5, Takeda discloses the printed circuit board connector structure (see figure 6a), wherein the outer ground (302) extends around each of the first side, the second side, the third side and the fourth side of the traces (see figures 6a-6c).
Regarding claim 6, Takeda discloses the printed circuit board connector structure (see figure 6a), wherein each of the pair of traces (102a,102b) extends vertically, and a bottom of each of the pair of traces (102a,102b) connects with a horizontal trace such that the pair of traces do not extend beyond a horizontal trace connected thereto in a vertical direction (see figure 10; paragraph 0091).
Regarding claim 9, Takeda discloses a printed circuit board connector structure (see figure 6a), comprising: an outer ground defining a receiving area; a first trace (102a) located in the receiving area, the first trace (102a) having a first side and a second side opposite to the first side (see figure 6a); and a second trace (102b) spaced apart from the first trace (102a), the second trace (102b) located in the receiving area, the second trace (102b) having a third side and a fourth side opposite to the third side, the fourth side of the second trace (102b) being proximate to the second side of the first trace (see figure 6a), wherein the outer ground extends around the first side of the first trace and around the third side of the second trace (see figure 6a).
Regarding claim 12, Takeda discloses the printed circuit board connector structure (see figure 6a), wherein the outer ground (302) extends continuously around the first trace and the second trace (102a,102b; see figures 6a-6c).
Regarding claim 13, Takeda discloses the printed circuit board connector structure (see figure 6a), wherein each of the first trace and the second trace (102a,102b) extends vertically, a bottom of each of the first trace and the second trace (102a,102b) connects with a horizontal trace such that the first trace and the second trace (102a,102b) do not extend beyond a horizontal trace connected thereto in a vertical direction (see figure 10; paragraph 0091).
Regarding claim 15, Takeda discloses a printed circuit board, comprising: a first connector structure (see figure 6a) including: a first outer ground (302) defining a first receiving area; and a first pair of vertical traces (102a,102b) located in the first receiving area, the first pair of vertical traces (102a,102b) collectively having a first side, a second side, a third side, and a fourth side (see figure 6a), wherein the first outer ground (302) extends around each of the first side, the second side, and the third side of the first pair of vertical traces; and a second connector structure (see figure 6a) including: a second outer ground (well known in the art; printed circuit board have a multiples connectors structures) defining a second receiving area; and a second pair of vertical traces located in the second receiving area, the second pair of vertical traces collectively having a fifth side, a sixth side, a seventh side, and an eighth side, wherein the second outer ground extends around each of the fifth side, the sixth side, and the seventh side of the second pair of vertical traces, wherein the first outer ground and the second outer ground reduce any signals leaving the first receiving arca and the second receiving area, respectively (well known in the art)
Regarding claim 18, Takeda discloses the printed circuit board (see figure 6a), wherein the first outer ground (302) extends around each of the first side, the second side, the third side and the fourth side of the first pair of vertical traces (102a,102b; see figures 6a-6c).
Regarding claim 19, Taneka discloses the printed circuit board (see figure 6a), wherein a bottom of each trace of the first pair of vertical traces (102a, 102b) connects with a horizontal trace such that each trace of the first pair of vertical traces does not extend beyond its connected horizontal trace in a vertical direction (see figure 10; paragraph 0091).
Conclusion
5. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Rose et al (US 9,560,741), Champion (US 8,610,000), Pepe et al (US 7,658,651), Nakamura (US 7,549,222), Farnworth et al (US 7,316,063), Imamura et al (US 7,242,591), Uematsu et al (US 6,787,710) and Chang et al (US 6,717,071) disclose a connector structure.
6. Any inquiry concerning this communication should be directed to Angel R. Estrada at telephone number (571) 272-1973. The Examiner can normally be reached on Monday-Friday (8:30am -5:00pm).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Imani N. Hayman can be reached on (571) 270-5528. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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May 26, 2026
/ANGEL R ESTRADA/Primary Examiner, Art Unit 2841
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