Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 16-17 and 19-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Che (US 20240274580 A1).
Regarding independent claim 16, Che discloses a method of assembling a memory device (Fig. 1), the method comprising:
printing a support structure (145; [0083]: “a three-dimensional printing operation”) onto a substrate (110, indirectly on);
stacking a plurality of silicon dies (115; [0021]: “through-silicon vias” requires these dies to include silicon) on the substrate (stacked in the y direction), the stack of silicon dies including
a first silicon die (115-1) contacting the substrate and
a second silicon die (115-3) situated above the first silicon die (above in the y direction) and offset from the first silicon die in a lateral direction (offset in the x direction) to form an offset portion (155-3),
wherein the offset portion of the second silicon die is supported (supported in the y direction) by the support structure;
and electrically connecting each silicon die included in the stack of silicon dies to the substrate with one or more bond wires (not shown; [0025]: “wire bonding”).
Illustrated below is Fig. 1 of Che.
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Regarding claim 17, Che discloses the method of claim 16 (Fig. 1), further comprising: attaching a controller die (105-1; [0064]: “a microcontroller”) to the substrate, wherein the controller die is in electrical communication with each silicon die included in the stack of silicon dies by way of the substrate ([0046]: “integrated circuit 105-1 is communicatively coupled to the integrated circuits 105-2 and 105-3 through the substrate 110”).
Regarding claim 19, Che discloses the method of claim 16 (Fig. 1), wherein the stack of silicon dies includes a third silicon die (115-2) situated between (between in the y direction) the first silicon die and the second silicon die, and wherein the third silicon die is supported (supported in the y direction) by the support structure.
Regarding claim 20, Che discloses the method of claim 16 (Fig. 1), further comprising printing a second support structure onto the substrate (a portion of 145), wherein the stack of silicon dies includes a third silicon die (115-2) situated between (between in the y direction) the first silicon die and the second silicon die, and wherein the third silicon die is supported by the second support structure (supported in the y direction).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s).
Claims 1-6, 8-15 are rejected under 35 U.S.C. 103 as being unpatentable over Song (US 20110079890 A1) in view of Che.
Regarding claim 1, Song discloses a memory device (Fig. 12) comprising:
a substrate (111);
a memory die stack including:
a first silicon die (136) having a first contact pad surface (See annotated figure) and a bottom surface (See annotated figure) attached to the substrate (attached by 133); and
a second silicon die (196) stacked on the first silicon die (stacked in the z direction, indirectly on through intervening dies), the second silicon die including a second contact pad surface (See annotated figure), wherein an overhang portion of the second silicon die (See annotated figure) extends beyond the first silicon die (extends beyond in the x direction);
a printed support structure (a portion of 123, See reference lines in annotated figure) attached to that the substrate, the printed support structure supporting the overhang portion of the second silicon die (supporting in the z direction); and
one or more bond wires (175) that electrically connect the first and second contact pad surfaces to the substrate (connected at 114/118), thereby electrically connecting the first and second silicon dies to a controller die ([0245]: “a non-memory device and/or a memory device in order to perform a storage function”) by way of the substrate (there are no other electrical connections for the dies, thus connection to the controller must be “by way of the substrate”),
wherein the printed support structure is printed directly onto the substrate (structure 123 is illustrated directly on substrate 111; [0169]: “filling auxiliary structure 123 may be formed on the substrate 111” teaches the structure is formed on the substrate instead of some other place such as a carrier. Thus, the support structure 123 is formed directly on the substrate.).
Illustrated below is a marked and annotated figure of Fig. 12 of Song.
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Song fails to teach the specific process of forming the support structure. Thus, Song fails to teach “a printed support structure”.
Che teaches a process of forming a support structure ([0083]: “forming the terraced support structure comprises”) includes printing ([0083]: “a three-dimensional printing operation”).
The process of Che is relevant to the support structure of Song because in each situation the process forms a support structure (Che: [0083]: “terraced support structure”; Song: [0154]: “physically supported by the first auxiliary structure 123”). Thus, a person of ordinary skill in the art before the effective filing date would have had predictable results incorporating the printing process of Che to print the support structure of Song, because in each situation a support structure is formed. Doing so would arrive at the claimed printed support structure. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed printed support structure because it is formed using a known technique in a similar way. MPEP 2143 (I)(C).
Song in view of Che as applied above fails to teach specific materials useful for the first and second dies. Thus, Song and Che fail to teach “a first silicon die” and “a second silicon die”.
However, Che discloses first and second dies (Fig. 1: 115-1, 115-3), and teaches these dies may include silicon ([0021]: “through-silicon vias” requires these dies to include silicon).
Che and Song are related because each discloses stacked memory dies (Che: [0033]: “non-volatile memory”; Song: [0137]: “a non-volatile memory device”). A person of ordinary skill in the art before the effective filing date could have modified the material of the first and second dies (of Song) to include silicon (as taught by Che), and would have had a reasonable expectation of success because in each situation the dies comprise a similar memory stack. Doing so would arrive at the claimed die material configuration. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed material configuration of the first and second dies because it is a configuration known suitable for memory dies. MPEP 2143 (I)(E).
Regarding claim 2, Song in view of Che discloses the memory device of claim 1 (Song: Fig. 12), wherein the first and second silicon dies comprise memory dies ([0137]: “a non-volatile memory device”).
Regarding claim 3, Song in view of Che discloses the memory device of claim 2 (Song: Fig. 12), wherein the first and second silicon dies comprise NAND dies (Che: [0033]: “non-volatile memory 205 may include NAND memory”).
Regarding claim 4, Song in view of Che discloses the memory device of claim 1 (Song: Fig. 12), wherein the memory die stack includes: a third silicon die (146) including a third contact pad surface (See annotated figure), the third silicon die situated between the first silicon die and the second silicon die, wherein the third silicon die is supported by the printed support structure.
Regarding claim 5, Song in view of Che discloses the memory device of claim 1 (Song: Fig. 12), wherein the memory die stack includes:
a third silicon die (146) including a third contact pad surface (See annotated figure), the third silicon die situated between the first silicon die and the second silicon die (between in the z direction),
wherein the third silicon die is supported by a second printed support structure (a different portion and shape of 123, See reference lines in annotated figure).
Regarding claim 6, Song in view of Che discloses the memory device of claim 1 (Song: Fig. 12), wherein the printed support structure is composed of an elastomeric material (Song: [0169]: “a sol or gel type insulating material”; Che: [0043]: “a compliant material”).
Regarding claim 8, Song in view of Che discloses the memory device of claim 1 (Song: Fig. 12), wherein the first silicon die and the second silicon die each have a thickness (thickness in the z direction) of less than 40 microns.
Song in view of Che fails to teach a specific thickness range for the first and second silicon dies. Thus, Song in view of Che as applied above fails to teach “the first silicon die and the second silicon die each have a thickness of less than 40 microns”.
Che teaches a thickness range for the first and second silicon dies ([0022]: “less than approximately 40 microns”). The thickness range of Che is relevant to the first and second silicon dies of Song because in each case the dies are memory dies (Song: [0137]: “a non-volatile memory device”; Che: [0033]: “non-volatile memory 205 may include NAND memory”). Modifying the thicknesses of the first and second silicon dies of Song and Che by incorporating the thickness range of Che would arrive at the claimed thickness configuration (a size). A person of ordinary skill in the art before the effective filing date would have been motivated to do so to produce a memory die. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed thickness configuration because it is a memory die size configuration known within prior art. MPEP 2144.04 (IV)(A).
Regarding claim 9, Song in view of Che discloses the memory device of claim 8 (Song: Fig. 12), wherein the first silicon die and the second silicon die each have a thickness of less than 36 microns (Che: [0022]: “less than approximately 40 microns”).
Regarding claim 10, Song in view of Che discloses the memory device of claim 1, further comprising: the controller die ([0245]: “a non-memory device and/or a memory device in order to perform a storage function”) mounted on the substrate adjacent to the memory die stack; a plurality of solder bumps that attach and electrically connect the controller die to the substrate; and underfill disposed beneath the controller die.
Song fails to teach the structural configuration of the controller die. Thus, Song in view of Che as applied above fails to teach “a controller die mounted on the substrate adjacent to the memory die stack; a plurality of solder bumps that attach and electrically connect the controller die to the substrate; and underfill disposed beneath the controller die”.
However, Che teaches a controller die (Fig. 1: 105-1; [0064]: “a microcontroller”) mounted on the substrate (110) adjacent to the memory die stack (105-2); a plurality of solder bumps ([0046]: “a bumped die that is joined to the substrate 110 using a surface mount (SMT) process”) that attach and electrically connect the controller die to the substrate; and underfill ([0046]: “an underfill material 305 (e.g., an epoxy polymer) may be between the integrated circuit 105-1 and the substrate 110”) disposed beneath the controller die.
Modifying the structural configuration of Song’s controller die by incorporating the structural configuration disclosed by Che would arrive at the claimed controller die configuration, and the results would have been predictable to one of ordinary skill in the art before the effective filing date because in each situation a controller die and memory stack are functionally configured together (Song: [0245]: “a non-memory device and/or a memory device in order to perform a storage function” and [0137]: “memory”; Che: [0064]: “a microcontroller” and [0019]: “memory”). One of ordinary skill in the art before the effective filing date would have been motivated to do so because Che teaches this configuration having the design incentive of enabling communication between the controller die and the memory die stack ([0046]: “integrated circuit 105-1 is communicatively coupled to the integrated circuits 105-2 and 105-3 through the substrate 110”). This design incentive is consistent with the required controller die functionality of Song ([0245]: “to perform a storage function”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed controller die configuration because it would enable functionally configuring the controller die with the memory stack. MPEP 2143 (I)(F).
Regarding independent claim 11, Song discloses a memory device (Fig. 12), comprising:
a substrate (111);
a plurality of silicon dies (136/146/156/166/196/206/216/226) attached one atop another (atop in the z direction) in an offset manner (offset in the x direction), wherein a bottom one of the silicon dies (136) is attached to the substrate,
wherein a second one of the silicon dies (196) is situated above the bottom one of the silicon dies (above in the z direction), the second one of the silicon dies including an overhang portion (See annotated figure) that hangs beyond (beyond in the x direction) each other silicon die included in the plurality of silicon dies; and
a printed support structure (a portion of 123, See reference lines in annotated figure) that is printed directly onto the substrate (structure 123 is illustrated directly on substrate 111; [0169]: “filling auxiliary structure 123 may be formed on the substrate 111” teaches the structure is formed on the substrate instead of some other place such as a carrier. Thus, the support structure 123 is formed directly on the substrate.), the printed support structure supporting the overhang portion of the second one of the silicon dies (supporting in the z direction).
Song fails to teach the specific process of forming the support structure. Thus, Song fails to teach “a printed support structure”.
Che teaches a process of forming a support structure ([0083]: “forming the terraced support structure comprises”) includes printing ([0083]: “a three-dimensional printing operation”).
The process of Che is relevant to the support structure of Song because in each situation the process forms a support structure (Che: [0083]: “terraced support structure”; Song: [0154]: “physically supported by the first auxiliary structure 123”). Thus, a person of ordinary skill in the art before the effective filing date would have had predictable results incorporating the printing process of Che to print the support structure of Song, because in each situation a support structure is formed. Doing so would arrive at the claimed printed support structure. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed printed support structure because it is formed using a known technique in a similar way. MPEP 2143 (I)(C).
Song in view of Che as applied above fails to teach specific materials useful for the plurality of dies. Thus, Song and Che fail to teach “a plurality of silicon dies”.
However, Che discloses a plurality of dies (Fig. 1: 115), and teaches these dies may include silicon ([0021]: “through-silicon vias” requires these dies to include silicon).
Che and Song are related because each discloses stacked memory dies (Che: [0033]: “non-volatile memory”; Song: [0137]: “a non-volatile memory device”). A person of ordinary skill in the art before the effective filing date could have modified the material of the plurality of dies (of Song) to include silicon (as taught by Che) , and would have had a reasonable expectation of success because in each situation the dies comprise a similar memory stack. Doing so would arrive at the claimed die material configuration. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed material configuration of the plurality of dies because it is a configuration known suitable for memory dies. MPEP 2143 (I)(E).
Regarding claim 12, Song in view of Che discloses the memory device of claim 11 (Song: Fig. 12), wherein a third one of the silicon dies (146; “silicon” for the same reasons here as the bottom and second dies, as reasoned in the claim 1 rejection) is situated between (between in the z direction) the bottom one of the silicon dies and the second one of the silicon dies, and wherein the printed support structure supports a second overhang portion of the third one of the silicon dies (supporting in the z direction).
Regarding claim 13, Song in view of Che discloses the memory device of claim 11 (Song: Fig. 12), wherein a third one of the silicon dies (146; “silicon” for the same reasons here as the bottom and second dies, as reasoned in the claim 1 rejection) is situated between (between in the z direction) the bottom one of the silicon dies and the second one of the silicon dies, and wherein a second printed support structure (a different portion and shape of 123, See reference lines in annotated figure) supports the third one of the silicon dies (supporting in the z direction).
Regarding claim 14, Song in view of Che discloses the memory device of claim 11 (Song: Fig. 12), wherein the printed support structure is composed of an elastomeric material (Song: [0169]: “a sol or gel type insulating material”; Che: [0043]: “a compliant material”).
Regarding claim 15, Song in view of Che discloses the memory device of claim 11 (Song: Fig. 12), wherein the plurality of silicon dies includes at least eight silicon dies (eight are shown), and wherein the printed support structure supports half of the plurality of silicon dies (half of the dies, i.e., 4 dies, are inclusive within the number of dies supported by 123).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Che as applied to claim 16 above, and further in view of Song and Benrashid (US 20050022697 A1).
Regarding claim 18, Che discloses the method of claim 16, however, fails to teach the method “further comprising: curing the support structure with an ultraviolet light source”.
Song teaches a support structure (Fig. 12: 123) and teaches the material of the support structure may include sol gel ([0169]: “structure 123 may include a sol or gel type insulating material”). Song fails to teach a method of curing the sol gel.
Benrashid discloses a method of curing sol gel comprising: curing the material with an ultraviolet light source ([0025]: “UV curable”). Incorporating the teachings of Benrashid (UV curing) and Song (a sol gel material) when forming the support structure of Che would arrive at the claimed support structure. The method of Benrashid is relevant to the method of Song because in each situation a sol gel material is formed on a substrate (Benrashid: [0025]: “useful for printing different structures on top of electronic and/or optoelectronic wafers”; Song: [0153]: “auxiliary structure 123 may be adhered to the substrate”). Thus, a person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success doing so because it is applying a known technique to a similar material used in a similar situation. Benrashid provides a teaching to motivate one to cure the support structure with an ultraviolet light source in that it would produce a support structure having improved cracking characteristics (Benrashid: [0025]: “improved cracking”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed support structure method because it would improve cracking characteristics. MPEP 2143 (I)(G); MPEP 2143 (I)(C).
Response to Arguments
Applicant's arguments filed 3/26/2026 have been fully considered but they are not persuasive.
Applicant argues:
Applicant argues with respect to amended claim 11 that “Che requires the presence of an intervening adhesive layer and focuses on a transfer-based assembly, and thus fails to teach the structural relationship where the printed material is in direct contact with the substrate surface as a result of the printing process”.
Examiner’s reply:
Applicant’s arguments with respect to claim(s) 11 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Applicant argues:
Applicant argues with respect to claim 16 that “Che is silent on printing a support structure onto a substrate, as required by independent claim 16. Instead, as explained above with respect to independent claim 11, Che focuses on a transfer-based manufacturing flow where the support structures are pre-fabricated on a separate carrier.”. Remarks at pg. 8.
Examiner’s reply:
The examiner disagrees and points to MPEP 2111: Broadest Reasonable Interpretation as it is applied to “printing…onto a substrate”. Che teaches the “support structure” is formed by “printing” and teaches this structure going “onto a substrate”. Thus, it is indirectly printed onto the substrate.
Applicant argues:
Applicant argues with respect to claim 1 that “Song discloses a “first filling auxiliary structure 123” that is formed by filling a space with a sol or gel type insulating material after the semiconductor chips have already been stacked in a cascade shape. See Paragraph [0103 of Song. Song explicitly states that the auxiliary structure is created by “filling the first and second grooves 121 and 122 with a first insulating material... in a liquid state." This liquid-fill principle of operation is structurally and functionally distinct from the claimed "printed support structure.””. Remarks at pg. 10. Additional remarks regarding are provided at pg. 11.
Examiner’s reply:
The examiner does not find Applicant’s remarks persuasive for the reasons below:
Firstly, Applicant has cited/quoted [0103] of Song, but this quote was not found at [0103] or anywhere else in Song. The examiner has searched for terms from this quote (i.e., “groove”, “121”, “liquid”, and “filling”) but was unable to find this specific teaching. Nevertheless, the examiner finds language describing the contended structure (Song: Fig. 12: structure 123) in terms of the shape and position ([0152]: “may be formed…may be disposed…”), but finds this language lacking any specific process description of this structure filling a space after assembly (i.e., as if produced by injection or molding). Rather, the examiner finds Song teaching the opposite process sequence from Applicant’s remarks: Song teaches the structure is firstly formed ([0169]: “filling auxiliary structure 123 may be formed on the substrate 111”) and then the dies are disposed among this structure ([0170]: “a first-step semiconductor chip 136 may be sequentially formed around the first filling auxiliary structure 123”).
Secondly, the examiner finds the contended limitation “printed directly onto the substrate” rendering a “product by process” claim and points to MPEP 2113 (I) and (II): “ “[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985)”. The claim is directed to the product per se, no matter how actually made. In reference to the claimed process step “printed directly onto the substrate” this is considered an intermediate method step that does not affect the structure of the final device. Applicant has not provided persuasive evidence establishing a difference between the claimed product and the prior art product as required by MPEP 2113 (II).
Accordingly, the examiner maintains the rejection in the same way as applied in the prior Office action to claim 7, which includes a substantially similar combination of limitations.
Applicant argues:
Applicant argues with respect to claim 1 that “the Office's mapping of the “first silicon die” in Applicant's claim 1 to die 196 is physically impossible as die 196 is part of an upper stack and is not attached to the substrate 111”. Remarks at pg. 10.
Examiner’s reply:
The examiner disagrees and points to MPEP 2111: Broadest Reasonable Interpretation. The examiner notes Applicant’s recitation of the examiner’s cited structures is inconsistent with the prior Office action. Accordingly, the examiner believes Applicant’s remarks are directed to the second silicon die, mapped to Song: Fig. 12: die 196. The examiner finds Applicant’s remarks directed to potential differences in arrangement between the disclosed die arrangement and that of the prior art. However, the examiner finds the breadth of the claim as written reasonably including arrangements beyond Applicant’s disclosure. For example: “stacked on the first silicon die” could reasonably include: directly on with no adhesives; directly on by way of adhesive; or indirectly on through intervening dies. Accordingly, the rejection is maintained in substantially the same way as before. However, adjustments have been made in the instant Office action to matters of form, to promote clarity of the record.
Applicant argues:
Applicant argues with respect to claim 18 that “One of ordinary skill in the art would not be motivated to combine Benrashid’s spin-on glass patterning with Che's transfer-molding or adhesive layer assembly because the materials and objectives are fundamentally different”. Remarks at pg. 12.
Examiner’s reply:
The examiner does not find Applicant’s remarks persuasive and notes the new grounds of rejection in the instant Office action has been necessitated by claim amendment. In the instant Office action, the examiner is relying upon Song to substantially teach a method producing a similar structure to the claim, and these similarities include materials. The examiner finds Song lacking specific details regarding the method of forming the contended structure, and is relying upon Che to teach details useful for producing a substantially similar structure (i.e., “printing”). This combination is not a literal substitution of all related aspects of Che, but rather is limited to the similar structures cited. The examiner finds Song and Che lacking specific details regarding the method of forming the contended structure, and is relying upon Benrashid to teach details useful for a similar material when used in a similar way. The examiner believes MPEP 2143 (I)(G) is the strongest rationale for including Benrashid, however, points to MPEP 2143 (I)(C) because the examiner finds this rationale aligned with Applicant’s remarks. Accordingly, the rejection is maintained in substantially the same way as before. However, adjustments have been made in the instant Office action to matters of form, to promote clarity of the record.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM H ANDERSON whose telephone number is (571)272-2534. The examiner can normally be reached Monday-Friday, 8:00-5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WILLIAM H ANDERSON/ Examiner, Art Unit 2817
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