Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/11/2026 has been entered.
Response to Amendment
The amendment filed 6/11/2026 has been entered. Claims 1-9 remain
pending in the application.
Response to Arguments
Applicant’s arguments with respect to claims 1 and 7 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over JP2016092346A (Seiji) in view of US20030094682A1 (Shinohara).
Regarding Claim 1, Seiji discloses a semiconductor device (Fig. 1, el. 100, Para. [0010] comprising: a semiconductor element (Fig. 1, el. 2b, Para. [0012]) on an insulating substrate (Fig. 1, el. 1, Para. [0011]); a case (Fig. 1, el. 7, Para. [0026]) having an opening (Fig. 1) and accommodating the semiconductor element and the insulating substrate (Fig. 1); a signal terminal (Fig. 1, el. 7b, Para. [0022]) provided on an inner wall of the case (Fig. 1, Para. [0022]); a printed board (Fig. 1, el. 5, Para. [0010]) disposed above the semiconductor element in the case by the signal terminal (Para. [0013]); and a lid (Fig. 1, el. 6, Para. [0010]) that closes the opening of the case (Para. [0026]), wherein the semiconductor element and the signal terminal are electrically connected by a conductive plate (Fig. 1, el. 4, Para. [0022]), the conductive plate is curved upward (Fig. 2, el. 4a, Para. [0017]), and a top portion of the conductive plate is in contact with a back surface of the printed board (Fig. 1, Para. [0015]).
Seiji does not disclose that the signal terminal is provided on a protruding portion protruding from the inner wall of the case above an end portion of the insulating substrate, the protruding portion being spaced from the insulating substrate, and does not disclose that the semiconductor element and the signal terminal are electrically connected by a wire, the wire is curved upward, and a top portion of the wire is in contact with a back surface of the printed board.
Shinohara discloses a semiconductor device (Fig. 5, el. 18a, Para. [0060]) comprising a semiconductor element (Fig. 5, el. 5, Para. [0042]), an insulating substrate (Fig. 5, el. 17a, Para. [0061]), a case (Fig. 5, el. 4, Para. [0042]), and a signal terminal (Fig. 5, el. 9, Para. [0042]), where the signal terminal is provided on a protruding portion protruding from the inner wall of the case above an end portion of the insulating substrate, the protruding portion being spaced from the insulating substrate (Fig. 5, Para. [0060 – 0061]).
It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Seiji by having the case protrude over an end portion of the insulating substrate, the protruding portion being spaced from the insulating substrate as in Sinohara. As disclosed by Sinohara, this has the benefit of allowing the metal and insulating material of the substrate to be the same length while allowing the protruding portion to better hold the insulating substrate against an external heat sink (Para. [0061]). Further, it would have been obvious to substitute a plurality of wires for the conductive plate in Seiji. This would have the benefit of using a lighter material (the material to make the wire) than the one used to make a conductive plate, resulting in a lighter overall package.
Regarding Claim 2, Seiji in view of Shinohara discloses the semiconductor device of Claim 1, wherein the semiconductor device comprises a plurality of wires (see analysis of claim 1 above), and the top portion of each of the wires is in contact with the back surface of the printed board (see analysis of claim 1 above – when a plurality of wires replace the conductive plate, they will all touch the back surface of the printed board).
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Regarding Claim 3, Seiji in view of Shinohara discloses the semiconductor device according to claim 1, wherein the wire is curved in a corrugated shape (Para. [0014] – the conductive plate of Seiji is in a corrugated shape, and when this is replaced by a wire, the wire will be as well), and a plurality of the top portions of the wire is in contact with the back surface of the printed board (see annotated Fig. 1 above).
Regarding Claim 5, Seiji in view of Shinohara discloses the semiconductor device according to claim 1, wherein a portion of the printed board with which the top portion of the wire is in contact has a same potential as the wire (Fig. 1, Para. [0024], wire 4 is electrically connected to the back of printed board 5, and so they have the same potential).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Seiji in view of Shinohara and US8680660B1 (Law).
Regarding Claim 4, Seiji in view of Shinohara discloses the semiconductor device according to claim 1.
Seiji in view of Shinohara does not disclose a support wire that supports the top portion of the wire from below.
Law discloses a semiconductor device (Figs. 2A and 2B, el. 30, Col. 2, ll. 52-56) with a support wire (Figs. 2A and 2B, el. 54, Col. 3, ll. 60-64) that supports another wire (Figs. 2A and 2B, el. 50, Col. 3, ll. 60-65).
It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to add a support wire as disclosed by Law to support the wire disclosed by Seiji. As disclosed by Law, this has the advantage of preventing sagging of the supported wire and potentially contacting another wire, causing a short (Col. 3, ll. 60-65).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Seiji in view of Shinohara and US20190131210A1 (Hino).
Regarding Claim 6, Seiji in view of Shinohara discloses the semiconductor device according to claim 1.
Seiji in view of Shinohara does not disclose that the wire includes a ribbon wire.
Hino discloses a semiconductor device (Fig. 1, Para. [0018])) with semiconductor elements (Fig. 1, els. 2 and 3, Para. [0019]) connected by ribbon wires (Fig. 1, els. 17, 18, and 19, Para. [0021]).
it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to use the ribbon wires of Hino in place of the wire of Seiji. As disclosed by Hino, ribbon wires can carry a higher current with a lower resistance, and the amount of self-heating can be reduced (Para. [0021]).
Claims 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over US20170301603A1 (Murakami) in view of Shinohara.
Regarding Claim 7, Murakami discloses a semiconductor device (Fig. 1, el. 100, Para. [0023]) comprising: a semiconductor element (Fig. 1, el. 5, Para. [0023]) on an insulating substrate (Fig. 1, el. 10, Para. [0028]); a case (Fig. 1, el. 3, Para. [0023]) having an opening and accommodating the semiconductor element and the insulating substrate (Fig. 1, Para. [0027]); a signal terminal (Fig. 1, el. 15, Para. [0042]) provided on an inner wall of the case (Fig. 1, Para. [0042]); a printed board (Fig. 1, el. 9, Para. [0032]) disposed above the semiconductor element in the case by the signal terminal (Fig. 1); a sealing material (Fig. 1, el. 35, Para. [0049]) that seals the semiconductor element in the case (Para. [0049]); and a lid (Fig. 4, el. 23, Para. [0052] – this is the same device as Fig. 1, except the lid completely covers the opening) that closes the opening of the case (Para. [0052]), wherein the sealing material is in contact with the printed board (Fig. 1, Para. [0050]).
Murakami does not disclose that the signal terminal is provided on a protruding portion protruding from the inner wall of the case above an end portion of the insulating substrate, the protruding portion being spaced from the insulating substrate.
Shinohara discloses a semiconductor device (Fig. 5, el. 18a, Para. [0060]) comprising a semiconductor element (Fig. 5, el. 5, Para. [0042]), an insulating substrate (Fig. 5, el. 17a, Para. [0061]), a case (Fig. 5, el. 4, Para. [0042]), and a signal terminal (Fig. 5, el. 9, Para. [0042]), where the signal terminal is provided on a protruding portion protruding from the inner wall of the case above an end portion of the insulating substrate, the protruding portion being spaced from the insulating substrate (Fig. 5, Para. [0060 – 0061]).
It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Murakami by having the case protrude over an end portion of the insulating substrate, the protruding portion being spaced from the insulating substrate as in Sinohara. As disclosed by Sinohara, this has the benefit of allowing the metal and insulating material of the substrate to be the same length while allowing the protruding portion to better hold the insulating substrate against an external heat sink (Para. [0061]).
Regarding Claim 8, Murakami in view of Shinohara discloses a semiconductor device according to claim 7, wherein the sealing material is in contact with only a back surface side of the printed board (Murakami, Fig. 1, Para. [0050])
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Murakami in view of Shinohara and JP2003243609A (Kimoto).
Regarding Claim 9, Murakami in view of Shinohara discloses the semiconductor device according to claim 7.
Murakami in view of Shinohara does not disclose a method of manufacturing the semiconductor device according to claim 7, the method comprising mounting the printed board above the semiconductor element in the case and then filling the case with the sealing material.
Kimoto discloses a method of manufacturing a semiconductor device (Para. [0025]) that comprises mounting a printed circuit board above a semiconductor element (Para. [0025]) and then filling a case with the sealing material (Para. [0025]).
it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to use the method disclosed by Kimoto to make the semiconductor device disclosed by Murakami in view of Shinohara. This would combine prior art elements (the method of Kimoto with the semiconductor device of Murakami in view of Shinohara) according to known methods (the method of Kimoto, used to make a semiconductor device) to yield a predictable result (the semiconductor device disclosed by Murakami in view of Shinohara).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROHIT PARTHASARATHY whose telephone number is (571)272-2572. The examiner can normally be reached Monday-Friday 8:30a-5p.
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/ROHIT PARTHASARATHY/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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