DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions Applicant’s election without traverse of species 1 corresponding to claims 1-14 in the reply filed on 20 January 2026 is acknowledged. Claims 15-20 (drawn to non-elected species 2) are withdrawn from consideration. Drawings The drawings are objected to because of a lack of consistency in labelling “end portions” in the drawings. A majority of the drawings (FIG. 8B, 9B, 10B, 11B, 11C, 12B, 12C, 13B, 13C, 14B, 15B, 15C, 18B, 19B, 20B, 21B, 21C, 22B, 23B, 24B) label the portion s of nanosheet channels between inner spacers 404 using a reference numeral designated for “end portions” ( el. 810(B, C), 1110C, 1810(A, B, C), 2110(A, B, C); para. 67, 70, 77, 80), for channels of which the centers have been narrowed or removed. The drawings of FIG. 14C, 22C, 23C, 24C label the portion of nanosheet channels between inner spacers 404, for channels of which the centers have been narrowed or removed, using a reference numeral designated for a “semiconductor layer” (el. 110(A, B, C); para. 57). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The disclosure is objected to because of the following informalities: reference character 120 is referred to as “scarification layers” in paragraph 61 while it is referred to as “ sacrificial layers” in other sections of the specification (para. 59, 60, 65, etc.). Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim s 1- 14 are rejected under 35 U.S.C. 103 as being unpatentable over Sung et al. ( US 10170484 B1 ; hereinafter referred to as “ Sung”) in view of Bao et al. ( US PGPub 20180114833 A1 ; hereinafter referred to as “ Bao ”) . Re claim 1: Sung teaches a semiconductor structure (FIG. 14A; col. 1: line 43-64; col. 15: line 51-60 ) comprising: a first transistor (FIG. 14E: el. 250c; col. 15: line 65 – col. 16: line 8 ) having first nanosheets as first channel regions (FIG. 14E: el. 244c; col. 16: line 46-67 ), a second transistor (FIG. 14D: el. 250b; col. 15: line 65 – col. 16: line 8 ) having second nanosheets as second channel regions (FIG. 14D: el. 244; col. 16: line: 25-45 |second nanosheets labelled 244b in specification but have the label 244 in figure 14D ), and a third transistor (FIG. 14C: el. 250a; col. 15: line 65 – col. 16: line 8 ) having third nanosheets as third channel regions (FIG. 14C: el. 244a; col. 16: line: 9-24 ), the first, second, and third nanosheets being formed of a nanosheet material ( col 13: line 57 - col. 14: line 16 |nanosheets 244 formed of the material of the first semiconductor material 204), wherein the first nanosheets are fewer in number than the second nanosheets (FIG. 14E, 14D: el. 244c, 244; col. 16: line 50-55 ) . Sung fails to teach first end portions formed of the nanosheet material between first inner spacers in the first transistor, the first end portions being opposite one another and discontinuous in the first transistor. In a similar field of endeavor, Bao teaches first end portions (FIG. 7 , as labelled below by examiner: el. END PORTION ; para. 39 ) formed of the nanosheet material between first inner spacers (FIG. 7 , as labelled below by examine r: el. INNER SPACER ) in the first transistor, the first end portions being opposite one another and discontinuous in the first transistor (FIG. 7; para. 39-40 |end portions are formed by etching the nanosheet channel layer only in the region between horizontally spaced inner spacers so as to leave remaining end portions between vertically spaced inner spacers ( horizontal/vertical directions as shown in FIG. 7 ) ; e nd portions are opposite one another , d iscontinuous , and formed of the nanosheet material ). Bao also teaches a benefit of the first end portions is t hat they provide a surface for epitaxial growth of the source/drain regions (para. 39). Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Sung and Bao , to enable using the inner spacers and end portions of Bao in the semiconductor structure of Sung , for the benefit of improving a growth characteristic of the source/drain regions by providing a surface for epitaxial growth and the benefit of increasing process uniformity for transistors with different number s of nanosheet channels. Re claim 2 : The combination of Sung and Bao teaches the semiconductor structure of claim 1 , wherein the second nanosheets are fewer in number than the third nanosheets ( Sung - FIG. 14D, 14C: el. 244, 244a; c ol. 16: line: 25-45 | second nanosheets labelled 244b in specification but have the label 244 in figure 14D ). Re claim 3 : The combination of Sung and Bao teaches t he semiconductor structure of claim 1, wherein the first end portions are adjacent to epitaxial source/drain regions ( Bao - FIG. 7, as labelled above by examiner: el. END PORTION , 704; para. 39). Re claim 4 : The combination of Sung and Bao teaches th e semiconductor structure of claim 1, wherein second end portions ( Bao - FIG. 7, as labelled above by examiner: el. END PORTION) are formed of the nanosheet material between second inner spacers ( Bao - FIG. 7, as labelled above by examiner: el. INNER SPACE R ) in the second transistor, the second end portions being opposite one another and discontinuous in the second transistor ( Bao - FIG. 7; para. 39-40 |end portions are formed by etching the nanosheet channel layer only in the region between horizontally spaced inner spacers so as to leave remaining end portions between vertically spaced inner spacers (horizontal/vertical directions as shown in FIG. 7) ; e nd portions are opposite one another, discontinuous, and formed of the nanosheet material). Re claim 5 : The combination of Sung and Bao teaches t he semiconductor structure of claim 4, wherein the second end portions are adjacent to epitaxial source/drain regions ( Bao - FIG. 7, as labelled above by examiner: el. END PORTION , 704; para. 39) and fewer in number than the first end portions ( Bao teaches end portions formed from remaining portions of etched away nanosheets wherein the remaining portion s are a pair of opposite and discontinuous end portions of the nanosheet layer ( Bao - FIG. 7; para. 39-40 ) ; Sung teaches etching away fewer top nanosheets to form the second transistor (Sung – FIG. 4: el. 207a; col. 8: line 29-39; FIG. 6B: el. 212; col. 9: line 26-41) than are etched away to form the first transistor (Sung – FIG. 4: el. 207b; col. 8: line 29-39; FIG. 6B: el. 213; col. 9: line 26-41) , and thus the combination of Sung and Bao teach fewer second end portions of the second transistor than first end portions of the first transistor ). Re claim 6 : The combination of Sung and Bao teaches t he semiconductor structure of claim 1, wherein epitaxial source/drain regions are substantially identical in the first, second, and third transistors ( Sung - FIG. 14C, 14D, 14E: el. 241a, 241b, 241c; col. 12: line 19-40 ). Re claim 7 : The combination of Sung and Bao teaches t he semiconductor structure of claim 1, wherein the first, second, and third transistors are formed to utilize different electrical current drive strengths ( Sung - col. 2: line 27-30) . Re claim 8 : Sung teaches a method (col. 2: line 27-30) comprising: providing a first transistor (FIG. 14E: el. 250c; col. 15: line 65 – col. 16: line 8 ) having first nanosheets as first channel regions (FIG. 14E: el. 244c; col. 16: line 46-67 ), a second transistor (FIG. 14D: el. 250b; col. 15: line 65 – col. 16: line 8 ) having second nanosheets as second channel regions (FIG. 14D: el. 244; col. 16: line: 25-45 |second nanosheets labelled 244b in specification but have the label 244 in figure 14D ), and a third transistor (FIG. 14C: el. 250a; col. 15: line 65 – col. 16: line 8 ) having third nanosheets as third channel regions (FIG. 14C: el. 244a; col. 16: line: 9-24 ), the first, second, and third nanosheets being formed of a nanosheet material ( col 13: line 57 - col. 14: line 16 |nanosheets 244 formed of the material of the first semiconductor material 204), wherein the first nanosheets are fewer in number than the second nanosheets (FIG. 14E, 14D: el. 244c, 244; col. 16: line 50-55 ) . Sung fails to teach providing first end portions formed of the nanosheet material between first inner spacers in the first transistor, the first end portions being opposite one another and discontinuous in the first transistor. In a similar field of endeavor, Bao teaches providing first end portions (FIG. 7, as labelled above by examiner: el. END PORTION ; para. 39 ) formed of the nanosheet material between first inner spacers (FIG. 7, as labelled above by examiner: el. INNER SPACER) in the first transistor, the first end portions being opposite one another and discontinuous in the first transistor (FIG. 7; para. 39-40 |end portions are formed by etching the nanosheet channel layer only in the region between horizontally spaced inner spacers so as to leave remaining end portions between vertically spaced inner spacers (horizontal/vertical directions as shown in FIG. 7 ); e nd portions are opposite one another, discontinuous, and formed of the nanosheet material ) . Bao also teaches a benefit of the first end portions is that they provide a surface for epitaxial growth of the source/drain regions (para. 39). Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Sung and Bao , to enable using the inner spacers and end portions of Bao in the method of providing transistors of Sung , for the benefit of improving a growth characteristic of the source/drain regions by providing a surface for epitaxial growth and the benefit of increasing process uniformity for transistors with different numbers of nanosheet channels. Re claim 9: The combination of Sung and Bao teaches the method of claim 8, wherein the second nanosheets are fewer in number than the third nanosheets ( Sung - FIG. 14D, 14C: el. 244, 244a; c ol. 16: line: 25-45 | second nanosheets labelled 244b in specification but have the label 244 in figure 14D ). Re claim 10: The combination of Sung and Bao teaches the method of claim 8 , wherein the first end portions are adjacent to epitaxial source/drain regions ( Bao - FIG. 7, as labelled above by examiner: el. END PORTION , 704; para. 39). Re claim 11: The combination of Sung and Bao teaches the method of claim 8 , wherein second end portions (Bao - FIG. 7, as labelled above by examiner: el. END PORTION) are formed of the nanosheet material between second inner spacers (Bao - FIG. 7, as labelled above by examiner: el. INNER SPACER) in the second transistor, the second end portions being opposite one another and discontinuous in the second transistor (Bao - FIG. 7; para. 39-40|end portions are formed by etching the nanosheet channel layer only in the region between horizontally spaced inner spacers so as to leave remaining end portions between vertically spaced inner spacers (horizontal/vertical directions as shown in FIG. 7) ; e nd portions are opposite one another, discontinuous, and formed of the nanosheet material). Re claim 12: The combination of Sung and Bao teaches t he method of claim 11 , wherein the second end portions are adjacent to epitaxial source/drain regions ( Bao - FIG. 7, as labelled above by examiner: el. END PORTION , 704; para. 39) and fewer in number than the first end portions (Bao teaches end portions formed from remaining portions of etched away nanosheets wherein the remaining portions are a pair of opposite and discontinuous end portions of the nanosheet layer (Bao - FIG. 7; para. 39-40 ) ; Sung teaches etching away fewer top nanosheets to form the second transistor (Sung – FIG. 4: el. 207a; col. 8: line 29-39; FIG. 6B: el. 212; col. 9: line 26-41) than are etched away to form the first transistor (Sung – FIG. 4: el. 207b; col. 8: line 29-39; FIG. 6B: el. 213; col. 9: line 26-41) , and thus the combination of Sung and Bao teach fewer second end portions of the second transistor than first end portions of the first transistor ). Re claim 13: The combination of Sung and Bao teaches the method of claim 8 , wherein epitaxial source/drain regions are substantially identical in the first, second, and third transistors ( Sung - FIG. 14C, 14D, 14E: el. 241a, 241b, 241c; col. 12: line 19-40 ). Re claim 14: The combination of Sung and Bao teaches the method of claim 8 , wherein the first, second, and third transistors are formed to utilize different electrical current drive strengths ( Sung - col. 2: line 27-30). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The prior art made of record and not relied upon utilizes transistor inner spacers and end portions in a manner that is similar to the relied upon prior art and the applicant’s disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT DEVIN GOODLING whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)272-2552 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT M-F 7:30am - 5:00pm . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, FILLIN "SPE Name?" \* MERGEFORMAT Julio Maldonado can be reached at FILLIN "SPE Phone?" \* MERGEFORMAT (571) 272-1864 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /D.G./ Examiner, Art Unit 2898 /JULIO J MALDONADO/ Supervisory Patent Examiner, Art Unit 2898