DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-10, 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tu et al (US Publication No. 2015/0243766).
Regarding claim 1, Tu discloses a semiconductor device comprising: a semiconductor substrate Fig 1a, 102; a first region Fig 1a, 106 of first conductive type formed on a surface layer on one main surface side of the semiconductor substrate ¶0026; a second region Fig 1a, 112 of second conductive type formed in a different region of the surface layer from the first region¶0027; a third region Fig 1a, 104 formed between the first region and the second region on the surface layer Fig 1a ¶0026-0028, the third region having a predetermined impurity concentration distribution ¶0026-0028; and a gate region Fig 1a, 116 formed at one end of the third region through a gate oxide layer Fig 1a, 114, wherein the third region includes a first change region of the impurity concentration distribution corresponding to a position of the gate region Fig 1a, 132/134/136/138 ¶0027-0033.
Regarding claim 2, Tu discloses wherein the third region includes a plurality of change regions of the impurity concentration distribution based on an electric field formed in the third region Fig 1a, 132/134/136/138 ¶0027-0033.
Regarding claim 3, Tu discloses wherein there are three or more change regions of the impurity concentration distribution Fig 1a, 132/134/136/138 ¶0027-0033.
Regarding claim 4, Tu discloses wherein the impurity concentration distribution increases from the one end of the third region toward the other end thereof Fig 1b.
Regarding claim 5, Tu discloses wherein the impurity concentration distribution monotonically increases from the one end of the third region toward the other end thereof Fig 1a-1b ¶0027-0033.
Regarding claim 6, Tu discloses wherein the change regions of the impurity concentration distribution are formed in such a manner that equipotential lines of an electric field formed in the third region are evenly spaced ¶0027-0033.
Regarding claim 7, Tu discloses a first electric field generator capable of generating an electric field in the third region, wherein a second change region of the impurity concentration distribution is formed corresponding to a position of an end portion of the first electric field generator ¶0029-0033.
Regarding claim 8, Tu discloses a second electric field generator capable of generating an electric field in the third region, wherein a third change region of the impurity concentration distribution is formed corresponding to a position of an end portion of the second electric field generator¶0029-0033.
Regarding claim 9, Tu discloses wherein an effective dose amount on one end side with reference to the first change region is equal to lx 1012 to 5x 1012/cm2 ¶0037, 0039-0040.
Regarding claim 10, Tu discloses wherein an effective dose amount on the other end side with reference to the third change region is equal to 5x1012 to 3x10 ¶0037, 0039-0040.
Regarding claim 17, Tu discloses a power conversion device comprising the semiconductor device according to Claim 1 ¶0001-0003, 0026.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Tu et al (US Publication No. 2015/0243766).
Regarding claim 11, Tu discloses wherein the first change region is at a position of 30 to 80% of a distance between a first line and a second line, the first line passing through an end portion of the gate region, the end portion being located toward the second region, the first line being perpendicular to the surface layer, the second line passing through an end portion of the first electric field generator, the end portion being located toward the second region, the second line being perpendicular to the surface layer,the second change region is at a position of 30 to 50% of a distance between the second line and a third line, the third line passing through an end portion of the second electric field generator, the end portion being located toward the second region, the third line being perpendicular to the surface layer, and the third change region is at a position of 60 to 80% of the distance between the second line and the third line Fig 1a-5e. Tu discloses all the limitations but silent on the specific position range. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the range, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (1955).
Regarding claim 12, Tu discloses wherein the first region corresponds to a well region, the second region corresponds to a drain region, and the third region corresponds to a drift layer ¶0026.
Regarding claim 13, Tu discloses a fourth region of second conductive type formed adjacent to the first region Fig 1a, 110 on the surface layer; and a fifth region Fig 1a, 108 of first conductive type formed adjacent to the fourth region on the surface layer, wherein the first region and the fourth region are in contact with the gate oxide layer Fig 1a.
Claims 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Tu et al (US Publication No. 2015/0243766) in view of Shinohara (US Publication No. 2019/0378925).
Regarding claim 14, Tu discloses all the limitations but silent on the support substrate. Whereas Shinohara discloses a first insulating layer Fig 12, 702 formed on a main surface of the semiconductor substrate Fig 12, 701 opposite to the main surface side thereof; a support substrate Fig 12, 703 configured to support the first insulating layer; and a second insulating layer Fig 12, 71 formed on the main surface side of the semiconductor substrate, wherein the first electric field generator and the second electric field generator are formed in the second insulating layer ¶0129-0130. Tu and Shinohara are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Tu because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device of Tu and incorporate the teachings of Shinohara to provide added insulation to the device.
Regarding claim 15, Tu and Shinohara discloses all the limitations but silent on the thickness range. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the range, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (1955).
Regarding claim 16, Shinohara discloses wherein the semiconductor substrate, the second insulating layer, and the support substrate are an SOI substrate ¶0129.
Conclusion
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/CHRISTINE A ENAD/Primary Examiner, Art Unit 2811