DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to the communications dated 03/13/2026.
Claims 1-20 are pending in this application.
Applicant made a provisional election without traverse to prosecute the
invention of Group I, claims 1-7, is acknowledged.
Claims 8-20 have been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a non-elected group there being no allowable generic or linking claim.
Applicant has the right to file a divisional application covering the subject matter of the non-elected claims.
Acknowledges
2. Receipt is acknowledged of the following items from the Applicant.
Information Disclosure Statement (IDS) filed on 08/15/2023. The references cited on the PTOL 1449 form have been considered.
Applicant is requested to cite any relevant prior art if being aware on form PTO-1449 in accordance with the guidelines set for in M.P.E.P. 609.
Specification
3. The specification has been checked to the extent necessary to determine the presence of possible minor errors. However, the applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
4. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
5. Claims 1-3, and 5-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dewey et al. (US 2023/0197800)
Regarding claim 1, Dewey discloses a semiconductor device, comprising:
a stacked transistor structure 100 (fig. 1) having field effect transistors 101, 103 on at least two levels, the at least two levels including a top side 103 and bottom side 101;
active regions 108 (fig. 1) or 222-224 (fig. 2F) disposed on the bottom side, the active regions including a recessed portion 234 (fig. 2G) therein;
a metal cap 236 (fig. 2J, para. 0053: layer 236 may be silicized, which helps reducing the contact resistance) disposed within the recessed portion 234; and
a contact 238 (paras. 0057-0059) disposed within the metal cap 236 to reduce contact resistance.
Regarding claim 2, Dewey discloses the semiconductor device as recited in claim 1, wherein the metal cap 236 includes an arcuate shape. See fig. 2J.
Regarding claim 3, Dewey discloses the semiconductor device as recited in claim 1, wherein the contact 238 includes a top side contact that passes through the top side to make contact with the metal cap 236. See fig. 2J.
Regarding claim 5, Dewey discloses the semiconductor device as recited in claim 1, wherein the recessed portion 234 is configured to include lateral portions (portions adjacent to or along the sidewalls of the recess, for example) and the metal cap 236 is disposed between the lateral portions. See figs. 2G, 2J.
Regarding claim 6, Dewey discloses the semiconductor device as recited in claim 1, wherein the metal cap 236 includes a size adjusted to permit additional dielectric material 230 between the active regions 222-224 on the bottom side and active regions 226-228 of the top side. See fig. 2J.
Regarding claim 7, Dewey discloses the semiconductor device as recited in claim 1, wherein the metal cap 236 includes a material selected from the group consisting of Cu, Ru, Mo, Rh, W, Ir, and alloys or combinations thereof. See para. 0053.
6. Claim 1 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chen et al. (US 2024/0282671)
Regarding claim 1, Chen discloses a semiconductor device, comprising:
a stacked transistor structure having field effect transistors 62P, 62N (fig. 17) on at least two levels, the at least two levels including a top side and bottom side;
active regions 30P disposed on the bottom side, the active regions 30P including a recessed portion therein (in which layer 94 and bottom portion of contact 16 are located);
a metal cap 94 disposed within the recessed portion; and
a contact 16 disposed within the metal cap 94 to reduce contact resistance.
7. Claims 1, and 4 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by LOH et al. (US 2024/0429102)
Regarding claim 1, LOH discloses a semiconductor device, comprising:
a stacked transistor structure 100a having field effect transistors Tt, Tb (See fig. 17E) on at least two levels, the at least two levels including a top side and bottom side;
active regions 180 & 244 (figs. 17E, 17F) disposed on the bottom side, the active regions including a recessed portion O2 therein;
a metal cap 183 and/or 184 disposed within the recessed portion O2; and
a contact 244 disposed within the metal cap 183 to reduce contact resistance.
Regarding claim 4, LOH discloses the semiconductor device as recited in claim 1, wherein the contact 244 passes through the metal cap 183a and into material of the active regions disposed on the bottom side.
Conclusion
8. A shortened statutory period for response to this action is set to expire 3 (three) months and 0 (zero) day from the day of this letter. Failure to respond within the period for response will cause the application to become abandoned (see M.P.E.P 710.02(b)).
A shortened time for reply may be extended up to the maximum six-month period (35 U.S.C. 133). An extension of time fee is normally required to be paid if the reply period is extended. The amount of the fee is dependent upon the length of the extension. Extensions of time are generally not available after an application has been allowed.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Dao H. Nguyen whose telephone number is (571)272-1791. The examiner can normally be reached on Monday-Friday, 9:00 AM – 5:00 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Loke, can be reached on (571)272-1657. The fax numbers for all communication(s) is 571-273-8300.
Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is (571)272-1633.
/DAO H NGUYEN/Primary Examiner, Art Unit 2818 April 18, 2026
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