DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Claim 9 has been amended; and claims 1-14 are currently pending.
Priority
Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hong (US 2019/0157244 A1, hereinafter “Hong”).
In regards to claim 1, Hong discloses (See, for example, Fig. 1 annotated and included below) a stacked chip comprising:
a first semiconductor chip (120); and
a second semiconductor chip (130) that is bonded to the first semiconductor chip (120),
wherein the first semiconductor chip (120) has:
a first supporting substrate (121); and
a first circuit layer (122) that is formed on the first supporting substrate (121), including a first region (region where via 12 passing thru and connected to) in which a first circuit is formed and a second region (region where via 13 is passing thru and connected to) in which a second circuit is formed,
the second semiconductor chip (130) has:
a second supporting substrate (131) that is bonded to the first circuit layer (122) side of the first semiconductor chip (120);
a second circuit layer (132) that is formed on a surface in the second supporting substrate (131) on an opposite side from the first semiconductor chip (120), including a third region (region where via 21 passing thru and connected to) that corresponds to a position of the first region of the first circuit layer (122) and a fourth region (region where via 22 passing thru and connected to) that corresponds to a position of the second region of the first circuit layer (122) and in which the second circuit is formed;
a first embedded portion (portion of 21 embedded in 132) that is embedded in a first hole portion penetrating through the third region (region where via 21 passing thru and connected to) of the second circuit layer (132) and extending to an inside of the second supporting substrate (131); and
a first through via (21) that penetrates through the first embedded portion (portion of 21 embedded in 132) and the second supporting substrate (131), and is electrically conducted with the first circuit of the first circuit layer (122).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Hong.
In regards to claim 2, Hong discloses all limitations of claim 1 above but silent about the first hole portion does not penetrate through the second supporting substrate.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to have the first hole portion does not penetrate through the second supporting substrate since it has been held that constructing a formerly integral structure in various elements involves only routine skill in the art. Nerwin V. Erlichman, 168 USPQ 177, 179.
In regards to claim 3, Hong discloses (See, for example, Fig. 1) a contour of a cross section of the first embedded portion (portion of 21 embedded in 132) in a stack direction.
However, Hong is silent about the first embedded portion is round.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to make the first embedded portion round since such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
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Allowable Subject Matter
Claim 4-10 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 11 and 14 are allowed over prior art of record.
The following is a statement of reasons for the indication of allowable subject matter:
In regards to claim 11, he prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach forming a through via that penetrates through the embedded portion and the supporting substrate in the second semiconductor chip, and causing the second circuit in the second semiconductor chip to be electrically conducted with the first circuit in the first semiconductor chip corresponding to a position of the first circuit that has been removed in the second semiconductor chip, via the through via.
In regards to claim 14, he prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach forming a through via that penetrates through the embedded portion in the second semiconductor chip, and causing a remaining circuit in the second semiconductor chip to be electrically conducted with circuit corresponding to a position of the circuit that has been removed in the second semiconductor chip, among the at least two types of circuit in the first semiconductor chip, via the through via.
Claims 12-13 are also allowed as being dependent of the allowed independent base claim.
Response to Arguments
Applicant’s arguments are directed solely to the omission of the annotated figure and do not address the substance of the rejection. Accordingly, the rejection is maintained for the reasons of record, now supplemented with the annotated Fig. 1.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Correspondence
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERMIAS T WOLDEGEORGIS whose telephone number is (571)270-5350. The examiner can normally be reached on Monday-Friday 8 am - 5 pm E.S.T..
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERMIAS T WOLDEGEORGIS/Primary Examiner, Art Unit 2893