Prosecution Insights
Last updated: April 19, 2026
Application No. 18/450,466

DIE BACKSIDE PROFILE for SEMICONDUCTOR DEVICES

Non-Final OA §103§112
Filed
Aug 16, 2023
Examiner
YECHURI, SITARAMARAO S
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Applied Materials, Inc.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
77%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
744 granted / 867 resolved
+17.8% vs TC avg
Minimal -9% lift
Without
With
+-9.1%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
46 currently pending
Career history
913
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
59.5%
+19.5% vs TC avg
§102
20.3%
-19.7% vs TC avg
§112
15.1%
-24.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 867 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: The drawings filed on 8/16/2023 are correct and have the correct numbers which are correctly described in the specification, however an extra set of drawings filed 11/16/2023 have different subject matter not described in the specification. Please correct the drawings. Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 20 depends on claim 15 however see this limitation is already in parent claim 15, thus it is assumed that claim 20 depends on claim 19. Allowable Subject Matter Claim 5, 10-14 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-4, 6-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Waidhas et al. (US 20230317621 A1) hereafter referred to as Waidhas in view of Taewoo et al. (KR 100513799 B1) hereafter referred to as Taewoo. Vassiliev et al. (US 6500771 B1) hereafter referred to as Vassiliev is provided as evidence of ordinary skill in the art. Dabral et al. (US 20200176419 A1) hereafter referred to as Dabral is provided as evidence of ordinary skill in the art. Jeon et al. (US 20080194074 A1) hereafter referred to as Jeon is provided as evidence of ordinary skill in the art. In regard to claim 1 Waidhas teaches a method [see paragraph 0047, see Fig. 6D, compare to instant Application Fig. 3B “FIGS. 6A-6F illustrates stages in a manufacturing process for creating a package with a glass substrate, an RDL on the substrate, and dies hybrid bonded to the RDL, in accordance with various embodiments”], comprising: removing a portion of a substrate layer [i.e. the substrate layer is the body of the die, see “FIG. 6E shows a cross section side view of a stage in the manufacturing process where dies 604a, which may be similar to dies 604 of FIG. 6D, are thinned, and a filler 660 may be placed between the dies 604a”] included in a plurality of dies, the plurality of dies [“hybrid bonding process may involve a series of stages. For example, a first stage of the hybrid bonding process may involve bringing the dies 604 and the RDL 650 together physically, where the die metal pads 606 and the metal pads 656 are aligned with each other. This may be done at a lower temperature, for example at an ambient room temperature. A second stage of the hybrid bonding process may involve applying heat so that the die metal pads 606 and the metal pads 656 are brought into physical contact with each other. A third stage of a hybrid bonding process may involve applying further heat to compress the die metal pads 606 and the metal pads 656, creating a bonding between them that has very low electrical resistance”] arranged on and bonded to an insulation layer [see Fig. 6D, “Metal pads 656 may be on a surface of the RDL 650, may be electrically coupled with the electrical routings 652 and vias 654, and may also be used for hybrid bonding at later stages. A dielectric material 651, which may be similar to dielectric material 451 of FIG. 4, may separate the metal pads 656” “In embodiments, the dielectric material 451 may include an oxide and/or organic passivations”, see Fig. 6D, the die is shown as touching the dielectric, see the dies in the embodiments are similar, “dies 604, which may be similar to dies 404 of FIG. 4” “Package 400, which may be similar to package 300 of FIG. 3” “In embodiments, a dielectric material (not shown) may surround the metal pads 306 on the dies 304 to facilitate hybrid bonding. In some embodiments, during a hybrid bonding process dielectric material (e.g., silicon dioxide, or other oxide materials) surrounding pads 306 may directly bond with dielectric material (e.g., silicon dioxide, or other oxide materials) surrounding pads 322 before pads 306 directly bond with pads 322”, see also the broadest reasonable interpretation of bonded is attached, see 604 is attached to 651 by the metal bonding] included in a support structure, wherein the plurality of dies define a plurality of channels [see Fig. 6D, between the dies 604] between adjacent dies; and but does not teach forming a corner feature on a plurality of corners of the substrate layer adjacent to the plurality of channels. See Waidhas teaches thinning see Fig. 6E, thus see portions of the substrate can be safely removed. PNG media_image1.png 329 483 media_image1.png Greyscale Taewoo teaches gap-fill for semiconductor device, see “2A to 2H are cross-sectional views illustrating a method of manufacturing a semiconductor device having a trench type isolation layer”, see “Etching the surface to form a trench, controlling the top corner of the trench at 30 ° to 60 ° using a gas containing at least hydrogen bromide and chlorine gas, after which the top corner of the trench is rounded. Etching to form a sidewall oxide layer controlling the round angle of the top corner of the trench to 85 ° to 90 ° by oxidizing the sidewall of the post-etched trench; forming a liner nitride layer on the sidewall oxide layer Forming a gap fill insulating film to fill the trench” “After etching to form the trench 27 as described above, the round angle A1 of the top corner of the trench 27 has an angle of about 30 ° to about 60 °. That is, the inclined sidewalls are etched at an angle of about 30 to 60 degrees with respect to the surface of the silicon substrate 21 to form inclined sidewalls. Next, as shown in FIG. 2C, an isotropic etch is further performed with Light Etch Treatment (LET) for etching the trench 27. At this time, the isotropic etching is performed by using a mixed gas of CF .sub.4 / O .sub.2 to form an angle A2 of the top corner at a level of 50 ° to 80 °. The additional isotropic etching removes the etch loss layer generated during the trench 27 etching and simultaneously controls the round angle A2 of the top corner to 50 ° to 80 °. For example, the isotropic etching has a characteristic of etching the rounded top corner at an angle of 30 ° to 60 ° more than the sidewall of the trench 27 close to the vertical, so that the round angle of the top corner when forming the trench 27 (A1) ) Can be formed more inclined” see also “5A to 5C are photographs showing the results of depositing a post treatment etch and a liner nitride layer after forming a top corner angle of 45 ° during trench etching, and FIG. 5D shows a result of depositing a liner nitride layer after omitting the post treatment etch”. Vassiliev is provided as evidence of ordinary skill in the art, see “To characterize an ability of film to fill narrow gaps between device elements, a term "gap-fill capability" is normally used and structures without any imperfection between device elements seen in cross-section of real structures using scanning electron microscopy techniques, are normally called "void-free". The void problem is significantly affected by structure shape being much more pronounced for structures with re-entrant gap shape, as shown schematically in terms of step coverage in FIG. 5 followed by the structure with vertical side walls. The best void-free gap-fill is normally achieved with structure tapering, however this approach is not applicable for all devices. FIG. 5 shows a re-entrant gap shape 120, a vertical gap shape 122, and a tapered gap shape 124”, see the word normally refers to ordinary skill in the art. Dabral is also provided as evidence of ordinary skill in the art, see Fig. 15F, see paragraph 0078 “For an exemplary aspect ratio of 5, the dies 110 may have a minimum die height of 10 μm, with gap of 2 μm. Yet, lower aspect ratios may be easier to fill, with reduced time requirements. In an embodiment illustrated in FIG. 15E, the die 110 sidewalls 199 may be tapered to facilitate gap fill”. Jeon is also provided as evidence of ordinary skill in the art, see paragraph 0021 “The trench etch process may be performed so that the sidewall of the trenches 304 is inclined at a tilt angle of 75 to 87 degrees. This enables the gap-fill material to easily flow into the trenches 204 at the time of the gap-fill process”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Waidhas to include forming a corner feature on a plurality of corners of the substrate layer adjacent to the plurality of channels. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is ease of gap fill and resulting higher quality of gap fill. In regard to claim 2 Waidhas and Taewoo as combined does not specifically teach wherein at least one sidewall of at least one of the plurality of dies is tapered, and wherein an angle of the at least one tapered sidewall is between 60 degrees and 85 degrees. However see Taewoo the sidewall 27 does appear to be tapered, see “The additional isotropic etching removes the etch loss layer generated during the trench 27 etching and simultaneously controls the round angle A2 of the top corner to 50 ° to 80 °. For example, the isotropic etching has a characteristic of etching the rounded top corner at an angle of 30 ° to 60 ° more than the sidewall of the trench 27 close to the vertical, so that the round angle of the top corner when forming the trench 27 (A1) ) Can be formed more inclined” and the teaching of Taewoo is to widen near the top so that the gap is easy to fill, see that etching also has widening effect at the top. See that a person of ordinary skill in the art is already aware that tapering makes the gap easier to fill. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein at least one sidewall of at least one of the plurality of dies is tapered, and wherein an angle of the at least one tapered sidewall is between 60 degrees and 85 degrees ”, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 3 Waidhas and Taewoo as combined does not specifically teach wherein a radius of the corner feature is between 5 micrometers (μm) and 20 μm. However this is dependent on etching, see Taewoo “The additional isotropic etching removes the etch loss layer generated during the trench 27 etching and simultaneously controls the round angle A2 of the top corner to 50 ° to 80 °. For example, the isotropic etching has a characteristic of etching the rounded top corner at an angle of 30 ° to 60 ° more than the sidewall of the trench 27 close to the vertical, so that the round angle of the top corner when forming the trench 27 (A1) ) Can be formed more inclined”. See that a person of ordinary skill in the art is already aware that tapering makes the gap easier to fill. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein a radius of the corner feature is between 5 micrometers (μm) and 20 μm ”, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 4 Waidhas and Taewoo as combined does not specifically teach wherein an angle of the corner feature is between 5 degrees and 45 degrees. However see Taewoo “controls the round angle A2 of the top corner to 50 ° to 80 °” “rounded top corner at an angle of 30 ° to 60 °”. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein an angle of the corner feature is between 5 degrees and 45 degrees”, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 6 Waidhas and Taewoo as combined does not specifically teach wherein a length of the plurality of channels from a top of the corner feature on a first die of the plurality of dies to a top of the corner feature on a second die of the plurality of dies is between 50 micrometers (μm) and 4 millimeters (mm). However see Waidhas Fig. 6A see a sample dimension of routing between the two dies 604, see “In embodiments, the TGV 630 may have a small pitch scaling, for example a sub-10 μm pitch”. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein a length of the plurality of channels from a top of the corner feature on a first die of the plurality of dies to a top of the corner feature on a second die of the plurality of dies is between 50 micrometers (μm) and 4 millimeters (mm)”, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 7 Waidhas and Taewoo as combined teaches, see Waidhas Fig. 6E thinning of the dies but does not state further comprising:planarizing the substrate layer by a chemical mechanical planarization process. See Taewoo “To form a trench by patterning the semiconductor substrate to a predetermined depth by dry etching using a nitride film pattern as a hard mask, and then filling an insulating film in the trench, followed by chemical mechanical polishing (CMP)”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Waidhas to include further comprising:planarizing the substrate layer by a chemical mechanical planarization process. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is CMP is a standard technique known to a person of ordinary skill in the art to give good results for removing material. In regard to claim 8 Waidhas and Taewoo as combined does not specifically teach wherein forming the corner feature on the plurality of corners comprises etching the corner feature by a first reactive ion etch (RIE) process. However see Taewoo etch chemistry “etching may be performed using an etching gas” “etching is performed using a mixed gas of CHF .sub.3 / CF .sub.4 / Ar / O .sub.2” “the third step uses a mixed gas of HBr / Cl .sub.2 / O .sub.2 / He”, see this is clearly anisotropic because see “Next, as shown in FIG. 2C, an isotropic etch is further performed with Light Etch Treatment (LET) for etching the trench 27. At this time, the isotropic etching is performed by using a mixed gas of CF .sub.4 / O .sub.2 to form an angle A2”. See that “CHF .sub.3” , “O .sub.2” are RIE gas etching mixtures. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Waidhas to include wherein forming the corner feature on the plurality of corners comprises etching the corner feature by a first reactive ion etch (RIE) process. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that RIE is a standard technique known to a person of ordinary skill in the art to give good results for etching using the standard etching gases of Taewoo. In regard to claim 9 Waidhas and Taewoo as combined teaches wherein the first RIE process comprises [see Taewoo uses gases such as “CHF .sub.3” , “O .sub.2”] using at least one of sulfur hexafluoride (SF6), Oxygen (02), trifluoromethane (CHF3), octafluorocyclobutane (C4F8), or methyl fluoride (CH3F). Claim(s) 15-18, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Waidhas et al. (US 20230317621 A1) hereafter referred to as Waidhas in view of Taewoo et al. (KR 100513799 B1) hereafter referred to as Taewoo. Vassiliev et al. (US 6500771 B1) hereafter referred to as Vassiliev is provided as evidence of ordinary skill in the art. Dabral et al. (US 20200176419 A1) hereafter referred to as Dabral is provided as evidence of ordinary skill in the art. Jeon et al. (US 20080194074 A1) hereafter referred to as Jeon is provided as evidence of ordinary skill in the art. In regard to claim 15 Waidhas teaches an interconnect structure [see paragraph 0047, see Fig. 6D, compare to instant Application Fig. 3B “RDL 650 may be similar to topside routing layer 450 of FIG. 4” “FIGS. 6A-6F illustrates stages in a manufacturing process for creating a package with a glass substrate, an RDL on the substrate, and dies hybrid bonded to the RDL, in accordance with various embodiments”], comprising: a support structure including [see Fig. 6D, “Metal pads 656 may be on a surface of the RDL 650, may be electrically coupled with the electrical routings 652 and vias 654, and may also be used for hybrid bonding at later stages. A dielectric material 651, which may be similar to dielectric material 451 of FIG. 4, may separate the metal pads 656” “In embodiments, the dielectric material 451 may include an oxide and/or organic passivations”] an insulation layer; a plurality of dies arranged on and bonded [“hybrid bonding process may involve a series of stages. For example, a first stage of the hybrid bonding process may involve bringing the dies 604 and the RDL 650 together physically, where the die metal pads 606 and the metal pads 656 are aligned with each other. This may be done at a lower temperature, for example at an ambient room temperature. A second stage of the hybrid bonding process may involve applying heat so that the die metal pads 606 and the metal pads 656 are brought into physical contact with each other. A third stage of a hybrid bonding process may involve applying further heat to compress the die metal pads 606 and the metal pads 656, creating a bonding between them that has very low electrical resistance” , see Fig. 6D, the die is shown as touching the dielectric, see the dies in the embodiments are similar, “dies 604, which may be similar to dies 404 of FIG. 4” “Package 400, which may be similar to package 300 of FIG. 3” “In embodiments, a dielectric material (not shown) may surround the metal pads 306 on the dies 304 to facilitate hybrid bonding. In some embodiments, during a hybrid bonding process dielectric material (e.g., silicon dioxide, or other oxide materials) surrounding pads 306 may directly bond with dielectric material (e.g., silicon dioxide, or other oxide materials) surrounding pads 322 before pads 306 directly bond with pads 322”, see also the broadest reasonable interpretation of bonded is attached, see 604 is attached to 651 by the metal bonding] to the insulation layer, wherein the plurality of dies include a substrate layer [i.e. the substrate layer is the body of the die, see “FIG. 6E shows a cross section side view of a stage in the manufacturing process where dies 604a, which may be similar to dies 604 of FIG. 6D, are thinned, and a filler 660 may be placed between the dies 604a”], and wherein the plurality of dies define a plurality of channels [see Fig. 6D, between the dies 604] between adjacent dies; and but does not teach a corner feature included on a plurality of corners of the substrate layer adjacent to the plurality of channels. See Waidhas teaches thinning see Fig. 6E, thus see portions of the substrate can be safely removed. PNG media_image1.png 329 483 media_image1.png Greyscale Taewoo teaches gap-fill for semiconductor device, see “2A to 2H are cross-sectional views illustrating a method of manufacturing a semiconductor device having a trench type isolation layer”, see “Etching the surface to form a trench, controlling the top corner of the trench at 30 ° to 60 ° using a gas containing at least hydrogen bromide and chlorine gas, after which the top corner of the trench is rounded. Etching to form a sidewall oxide layer controlling the round angle of the top corner of the trench to 85 ° to 90 ° by oxidizing the sidewall of the post-etched trench; forming a liner nitride layer on the sidewall oxide layer Forming a gap fill insulating film to fill the trench” “After etching to form the trench 27 as described above, the round angle A1 of the top corner of the trench 27 has an angle of about 30 ° to about 60 °. That is, the inclined sidewalls are etched at an angle of about 30 to 60 degrees with respect to the surface of the silicon substrate 21 to form inclined sidewalls. Next, as shown in FIG. 2C, an isotropic etch is further performed with Light Etch Treatment (LET) for etching the trench 27. At this time, the isotropic etching is performed by using a mixed gas of CF .sub.4 / O .sub.2 to form an angle A2 of the top corner at a level of 50 ° to 80 °. The additional isotropic etching removes the etch loss layer generated during the trench 27 etching and simultaneously controls the round angle A2 of the top corner to 50 ° to 80 °. For example, the isotropic etching has a characteristic of etching the rounded top corner at an angle of 30 ° to 60 ° more than the sidewall of the trench 27 close to the vertical, so that the round angle of the top corner when forming the trench 27 (A1) ) Can be formed more inclined” see also “5A to 5C are photographs showing the results of depositing a post treatment etch and a liner nitride layer after forming a top corner angle of 45 ° during trench etching, and FIG. 5D shows a result of depositing a liner nitride layer after omitting the post treatment etch”. Vassiliev is provided as evidence of ordinary skill in the art, see “To characterize an ability of film to fill narrow gaps between device elements, a term "gap-fill capability" is normally used and structures without any imperfection between device elements seen in cross-section of real structures using scanning electron microscopy techniques, are normally called "void-free". The void problem is significantly affected by structure shape being much more pronounced for structures with re-entrant gap shape, as shown schematically in terms of step coverage in FIG. 5 followed by the structure with vertical side walls. The best void-free gap-fill is normally achieved with structure tapering, however this approach is not applicable for all devices. FIG. 5 shows a re-entrant gap shape 120, a vertical gap shape 122, and a tapered gap shape 124”, see the word normally refers to ordinary skill in the art. Dabral is also provided as evidence of ordinary skill in the art, see Fig. 15F, see paragraph 0078 “For an exemplary aspect ratio of 5, the dies 110 may have a minimum die height of 10 μm, with gap of 2 μm. Yet, lower aspect ratios may be easier to fill, with reduced time requirements. In an embodiment illustrated in FIG. 15E, the die 110 sidewalls 199 may be tapered to facilitate gap fill”. Jeon is also provided as evidence of ordinary skill in the art, see paragraph 0021 “The trench etch process may be performed so that the sidewall of the trenches 304 is inclined at a tilt angle of 75 to 87 degrees. This enables the gap-fill material to easily flow into the trenches 204 at the time of the gap-fill process”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Waidhas to include a corner feature included on a plurality of corners of the substrate layer adjacent to the plurality of channels. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is ease of gap fill and resulting higher quality of gap fill. In regard to claim 16 Waidhas and Taewoo as combined does not specifically teach wherein at least one sidewall of at least one of the plurality of dies is tapered, and wherein an angle of the at least one tapered sidewall is between 60 degrees and 85 degrees. However see Taewoo the sidewall 27 does appear to be tapered, see “The additional isotropic etching removes the etch loss layer generated during the trench 27 etching and simultaneously controls the round angle A2 of the top corner to 50 ° to 80 °. For example, the isotropic etching has a characteristic of etching the rounded top corner at an angle of 30 ° to 60 ° more than the sidewall of the trench 27 close to the vertical, so that the round angle of the top corner when forming the trench 27 (A1) ) Can be formed more inclined” and the teaching of Taewoo is to widen near the top so that the gap is easy to fill, see that etching also has widening effect at the top. See that a person of ordinary skill in the art is already aware that tapering makes the gap easier to fill. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein at least one sidewall of at least one of the plurality of dies is tapered, and wherein an angle of the at least one tapered sidewall is between 60 degrees and 85 degrees”, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 17 Waidhas and Taewoo as combined does not specifically teach wherein a radius of the corner feature is between 5 micrometers (μm) and 20 μm. However this is dependent on etching, see Taewoo “The additional isotropic etching removes the etch loss layer generated during the trench 27 etching and simultaneously controls the round angle A2 of the top corner to 50 ° to 80 °. For example, the isotropic etching has a characteristic of etching the rounded top corner at an angle of 30 ° to 60 ° more than the sidewall of the trench 27 close to the vertical, so that the round angle of the top corner when forming the trench 27 (A1) ) Can be formed more inclined”. See that a person of ordinary skill in the art is already aware that tapering makes the gap easier to fill. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein a radius of the corner feature is between 5 micrometers (μm) and 20 μm”, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 18 Waidhas and Taewoo as combined does not specifically teach wherein an angle of the corner feature is between 5 degrees and 45 degrees. However see Taewoo “controls the round angle A2 of the top corner to 50 ° to 80 °” “rounded top corner at an angle of 30 ° to 60 °”. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use “wherein an angle of the corner feature is between 5 degrees and 45 degrees”, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 In regard to claim 20 [see 112 rejection] Waidhas and Taewoo as combined teaches further comprising: a corner feature included on [see this limitation is already in parent claim 15, see claim 15 combination Taewoo] a plurality of corners of the substrate layer adjacent to the plurality of channels. Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Waidhas et al. (US 20230317621 A1) hereafter referred to as Waidhas in view of Dabral et al. (US 20200176419 A1) hereafter referred to as Dabral. Vassiliev et al. (US 6500771 B1) hereafter referred to as Vassiliev is provided as evidence of ordinary skill in the art. In regard to claim 19 Waidhas teaches an interconnect structure [see paragraph 0047, see Fig. 6D, compare to instant Application Fig. 3B “RDL 650 may be similar to topside routing layer 450 of FIG. 4” “FIGS. 6A-6F illustrates stages in a manufacturing process for creating a package with a glass substrate, an RDL on the substrate, and dies hybrid bonded to the RDL, in accordance with various embodiments”], comprising: a support structure including [see Fig. 6D, “Metal pads 656 may be on a surface of the RDL 650, may be electrically coupled with the electrical routings 652 and vias 654, and may also be used for hybrid bonding at later stages. A dielectric material 651, which may be similar to dielectric material 451 of FIG. 4, may separate the metal pads 656” “In embodiments, the dielectric material 451 may include an oxide and/or organic passivations”] an insulation layer; and a plurality of dies arranged on and bonded [“hybrid bonding process may involve a series of stages. For example, a first stage of the hybrid bonding process may involve bringing the dies 604 and the RDL 650 together physically, where the die metal pads 606 and the metal pads 656 are aligned with each other. This may be done at a lower temperature, for example at an ambient room temperature. A second stage of the hybrid bonding process may involve applying heat so that the die metal pads 606 and the metal pads 656 are brought into physical contact with each other. A third stage of a hybrid bonding process may involve applying further heat to compress the die metal pads 606 and the metal pads 656, creating a bonding between them that has very low electrical resistance” , see Fig. 6D, the die is shown as touching the dielectric, see the dies in the embodiments are similar, “dies 604, which may be similar to dies 404 of FIG. 4” “Package 400, which may be similar to package 300 of FIG. 3” “In embodiments, a dielectric material (not shown) may surround the metal pads 306 on the dies 304 to facilitate hybrid bonding. In some embodiments, during a hybrid bonding process dielectric material (e.g., silicon dioxide, or other oxide materials) surrounding pads 306 may directly bond with dielectric material (e.g., silicon dioxide, or other oxide materials) surrounding pads 322 before pads 306 directly bond with pads 322”, see also the broadest reasonable interpretation of bonded is attached, see 604 is attached to 651 by the metal bonding] to the insulation layer, wherein the plurality of dies include a substrate layer [i.e. the substrate layer is the body of the die, see “FIG. 6E shows a cross section side view of a stage in the manufacturing process where dies 604a, which may be similar to dies 604 of FIG. 6D, are thinned, and a filler 660 may be placed between the dies 604a”], wherein the plurality of dies define a plurality of channels [see Fig. 6D, between the dies 604] between adjacent dies, and but does not teach wherein at least one sidewall of at least one of the plurality of dies is tapered. See Waidhas teaches thinning see Fig. 6E, thus see portions of the substrate can be safely removed. However see Dabral teaches see Fig. 15F, see paragraph 0078 “For an exemplary aspect ratio of 5, the dies 110 may have a minimum die height of 10 μm, with gap of 2 μm. Yet, lower aspect ratios may be easier to fill, with reduced time requirements. In an embodiment illustrated in FIG. 15E, the die 110 sidewalls 199 may be tapered to facilitate gap fill”. Vassiliev is provided as evidence of ordinary skill in the art, see “To characterize an ability of film to fill narrow gaps between device elements, a term "gap-fill capability" is normally used and structures without any imperfection between device elements seen in cross-section of real structures using scanning electron microscopy techniques, are normally called "void-free". The void problem is significantly affected by structure shape being much more pronounced for structures with re-entrant gap shape, as shown schematically in terms of step coverage in FIG. 5 followed by the structure with vertical side walls. The best void-free gap-fill is normally achieved with structure tapering, however this approach is not applicable for all devices. FIG. 5 shows a re-entrant gap shape 120, a vertical gap shape 122, and a tapered gap shape 124”, see the word normally refers to ordinary skill in the art. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Waidhas to include wherein at least one sidewall of at least one of the plurality of dies is tapered. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is ease of gap fill and resulting higher quality of gap fill. Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Waidhas and Dabral as combined and further in view of Taewoo et al. (KR 100513799 B1) hereafter referred to as Taewoo. In regard to claim 20 [see 112 rejection] Waidhas and Dabral as combined does not specifically teach further comprising: a corner feature included on a plurality of corners of the substrate layer adjacent to the plurality of channels. The Examiner notes that Waidhas and Dabral as combined teaches taper and thus the corner angle is not a right angle and under broadest reasonable interpretation this can be called a “corner feature” however the Examiner is providing a secondary reference for the sake of compact prosecution. See Waidhas teaches thinning see Fig. 6E, thus see portions of the substrate can be safely removed. Taewoo also teaches gap-fill for semiconductor device, see “2A to 2H are cross-sectional views illustrating a method of manufacturing a semiconductor device having a trench type isolation layer”, see “Etching the surface to form a trench, controlling the top corner of the trench at 30 ° to 60 ° using a gas containing at least hydrogen bromide and chlorine gas, after which the top corner of the trench is rounded. Etching to form a sidewall oxide layer controlling the round angle of the top corner of the trench to 85 ° to 90 ° by oxidizing the sidewall of the post-etched trench; forming a liner nitride layer on the sidewall oxide layer Forming a gap fill insulating film to fill the trench” “After etching to form the trench 27 as described above, the round angle A1 of the top corner of the trench 27 has an angle of about 30 ° to about 60 °. That is, the inclined sidewalls are etched at an angle of about 30 to 60 degrees with respect to the surface of the silicon substrate 21 to form inclined sidewalls. Next, as shown in FIG. 2C, an isotropic etch is further performed with Light Etch Treatment (LET) for etching the trench 27. At this time, the isotropic etching is performed by using a mixed gas of CF .sub.4 / O .sub.2 to form an angle A2 of the top corner at a level of 50 ° to 80 °. The additional isotropic etching removes the etch loss layer generated during the trench 27 etching and simultaneously controls the round angle A2 of the top corner to 50 ° to 80 °. For example, the isotropic etching has a characteristic of etching the rounded top corner at an angle of 30 ° to 60 ° more than the sidewall of the trench 27 close to the vertical, so that the round angle of the top corner when forming the trench 27 (A1) ) Can be formed more inclined” see also “5A to 5C are photographs showing the results of depositing a post treatment etch and a liner nitride layer after forming a top corner angle of 45 ° during trench etching, and FIG. 5D shows a result of depositing a liner nitride layer after omitting the post treatment etch”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Waidhas to include further comprising: a corner feature included on a plurality of corners of the substrate layer adjacent to the plurality of channels. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is increased ease of gap fill and resulting higher quality of gap fill. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SITARAMARAO S YECHURI whose telephone number is (571)272-8764. The examiner can normally be reached M-F 8:00-4:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt D Hanley can be reached at 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893
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Prosecution Timeline

Aug 16, 2023
Application Filed
Dec 31, 2025
Non-Final Rejection — §103, §112
Apr 09, 2026
Examiner Interview Summary
Apr 09, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
77%
With Interview (-9.1%)
2y 1m
Median Time to Grant
Low
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