Prosecution Insights
Last updated: April 19, 2026
Application No. 18/450,836

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Non-Final OA §103
Filed
Aug 16, 2023
Examiner
WOLDEGEORGIS, ERMIAS T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
3y 0m
To Grant
83%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allow Rate
526 granted / 743 resolved
+2.8% vs TC avg
Moderate +12% lift
Without
With
+11.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
49 currently pending
Career history
792
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
68.7%
+28.7% vs TC avg
§102
26.6%
-13.4% vs TC avg
§112
3.6%
-36.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 743 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Claims 21-30 have been cancelled; and claims 1-20 are currently pending. Election/Restrictions Applicant’s election without traverse of invention Group I, claims 1-20, in the reply filed on 12/29/2025 is acknowledged. Claim 21-30 have been withdrawn and cancelled from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 12/29/2025. Information Disclosure Statement The information disclosure statement filed on 8/16/2023 has been acknowledged and a signed copy of the PTO-1449 is attached herein. Priority Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3 and 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over JIN (US 2020/0105676 A1, hereinafter “JIN”). In regards to claim 1, JIN discloses (See, for example, Figs. 6 and 8) a semiconductor package (100A) comprising: a redistribution structure (120) including a plurality of redistribution conductive patterns (122), a plurality of conductive vias (123) connected to at least one of the plurality of redistribution conductive patterns (122), a plurality of lower pads (142) connected to the plurality of conductive vias (123), and a plurality of redistribution insulation layers (121) and the plurality of redistribution conductive patterns (122) alternating with each other; a semiconductor chip (111, 112, 113) on the redistribution structure (120); and an external connection terminal (150) attached to the plurality of lower pads (142) of the redistribution structure (120), wherein each of the plurality of redistribution conductive patterns (122) comprises, a metal layer including copper (See, Par [0071]). Though JIN does not explicitly describe the skin layer as including copper and nickel. JIN teaches in Par [0071] that each of the redistribution layers 122 may include a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof. Then, this expressly teaches that the redistribution layer formed of copper-nickel alloy inherently includes both copper and nickel in its composition. JIN further teaches that a surface treatment layer P may be formed on surfaces of the redistribution layer 122 by electroless nickel plating (See, Par [0071]). The electroless nickel plating surface treatment layer P disposed on the upper surface of, for example, Cu or Cu-Ni alloy redistribution layer constitutes a layer including nickel. As a result, at the interface between the nickel plating and the underlying copper or Cu-Ni alloy, both copper and nickel are present. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to form the redistribution conductive patterns of KWON with a copper or copper-nickel alloy layer and to apply the electroless nickel plating surface treatment as taught by JIN because this would help improved oxidation resistance, solder wettability, and provides a diffusion barrier. In regards to claims 2-3 and 5, JIN discloses all limitations of claim 1 above except that the skin layer includes Cu.sub.1-xNi.sub.x (x is 0.2 to 0.8); the skin layer covers an entire upper surface of the metal layer, and the skin layer is between the upper surface of the metal layer and a corresponding one of the plurality of redistribution insulation layers. Jin further teaches, in Par [0071], that a surface treatment layer P may be formed on surfaces of the redistribution layer 122 by "electroless nickel plating". When the electroless nickel plating is deposited on the copper or Cu-Ni alloy redistribution layer, an interdiffusion zone forms at the copper and nickel or copper-nickel alloy and nickel interface that inherently contains a variation of Cu1-xNix composition. JIN then teaches as depicted by Fig. 8, the skin layer (formed at the interface between the P layer and the underlying copper layer) covers an entire upper surface of the metal layer (See, “P” in Fig. 8), and the skin layer is between the upper surface of the metal layer (122) and a corresponding one of the plurality of redistribution insulation layers (121). JIN as modified here also teaches a first redistribution insulation layer (121) of the plurality of redistribution insulation layers includes a first via hole, a first conductive via (123) of the plurality of conductive vias is in the first via hole, the skin layer (‘P’ layer formed over a redistribution layer 122, See Par [0071]) of a first redistribution conductive pattern (122) of the plurality of redistribution conductive patterns is between a first portion of the metal layer of the first redistribution conductive pattern (122) and the first conductive via (123), and the first portion of the metal layer is below the first conductive via (See Pars [0057]-[0061]). Electroless nickel deposits on copper layers are well-known to produce such interfacial alloying regions. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the first and second conductive patterns of KWON with a copper metal layer and to apply the electroless nickel plating surface treatment taught by Jin onto the upper surfaces thereof, or alternatively to form a copper-nickel alloy skin layer from the alloys expressly identified by Jin, thereby resulting in a skin layer on the upper surface of the metal layer including Cu1-xNix because the electroless nickel plating on copper redistribution layers improves oxidation resistance, solder wettability, and provides a diffusion barrier. See KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). As to the claimed compositional range of x = 0.2 to 0.8, it would have been obvious to optimize the nickel content in the copper-nickel alloy skin layer through routine experimentation to arrive at the claimed range, as the relative proportions of copper and nickel in the alloy directly affect properties such as corrosion resistance, adhesion strength, and diffusion barrier effectiveness. The claimed range of Cu1-xNix (x is 0.2 to 0.8) represents a result-effective variable amenable to routine optimization. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation). In regards to claim 6, JIN as modified above in claim 5 discloses that the redistribution structure further comprises a lower metal layer (122) surrounding a sidewall and a bottom surface of the first conductive via (123), and a bottom surface of the lower metal layer (122) and the skin layer of the first redistribution conductive pattern (“electroless nickel plating” “P” layer) are in direct contact with each other (See, Par [0071]). In regards to claim 7, JIN discloses all limitations of claim 1 above except that the skin layer has a thickness of 150 angstroms to 300 angstroms. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to optimize the thickness of the electroless nickel plating surface treatment layer P of Jin to fall within the range of 150 angstroms to 300 angstroms through routine experimentation. The thickness of a surface treatment layer on a copper redistribution pattern is a result-effective variable that directly affects the layer’s ability to serve as a diffusion barrier, its adhesion to the underlying copper, its oxidation protection effectiveness, and the overall electrical resistance of the conductive pattern. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. See In re Aller, 220 F.2d 454, 456 (CCPA 1955).) In regards to claim 8, JIN discloses (See, for example, Figs. 6 and 8) the plurality of redistribution insulation layers (121)comprise a photo-imageable dielectric (PID) material (See, Par [0069]). Claims 9-10, 13-16, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over KWON (US 2021/0183785 A1, hereinafter “KWON”) in view of JIN. In regards to claim 9, KWON discloses (See, for example, Fig. 1) a semiconductor package (100A) comprising: a first redistribution structure (140) including a plurality of first redistribution conductive patterns (142), a plurality of first conductive vias (143) connected to at least one of the plurality of first redistribution conductive patterns (142), a plurality of lower pads (160) connected to the plurality of first conductive vias (143), and a plurality of first redistribution insulation layers (141) and the plurality of first redistribution conductive patterns (142) alternating with each other; a semiconductor chip (120) on the first redistribution structure (140); a connection structure (110) on the first redistribution structure (140) and spaced apart from the semiconductor chip (120) in a horizontal direction; and a second redistribution structure (132/133, 185) on the connection structure (110) and including a plurality of second redistribution conductive patterns (132, 182), a plurality of second conductive vias (133, 183) connected to at least one of the plurality of second redistribution conductive patterns (132, 182), and a plurality of second redistribution insulation layers (130b) and the plurality of second redistribution conductive patterns (132, 182) alternating with each other, wherein at least one of the plurality of first redistribution conductive patterns (140) and the plurality of second redistribution conductive patterns (132, 182) comprises, a metal layer including copper (See, for example, Par [0033]). KWON fails to explicitly teach that a skin layer on an upper surface of the metal layer and including copper and nickel. However, JIN teaches in Par [0071] that each of the redistribution layers 122 may include a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof. Then, this expressly teaches that the redistribution layer formed of copper-nickel alloy inherently includes both copper and nickel in its composition. JIN further teaches that a surface treatment layer P may be formed on surfaces of the redistribution layer 122 by electroless nickel plating (See, Par [0071]). The electroless nickel plating surface treatment layer P disposed on the upper surface of, for example, Cu or Cu-Ni alloy redistribution layer constitutes a layer including nickel. As a result, at the interface between the nickel plating and the underlying copper or Cu-Ni alloy, both copper and nickel are present. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to form the redistribution conductive patterns of KWON with a copper or copper-nickel alloy layer and to apply the electroless nickel plating surface treatment as taught by JIN because this would help improved oxidation resistance, solder wettability, and provides a diffusion barrier. In regards to claim 15, KWON discloses (See, for example, Fig. 1) a semiconductor package (100A) comprising: a first redistribution structure (140); a semiconductor chip (120) on the first redistribution structure (140); a connection structure (110) on the first redistribution structure (140) and spaced apart from the semiconductor chip (120) in a horizontal direction, a second redistribution structure (132/133, 185) on the connection structure (110) and being at a higher vertical level than the semiconductor chip (120); and an external connection terminal (170) on a bottom surface of the first redistribution structure (140), wherein the first redistribution structure (140) comprises, a first conductive pattern (142), a first insulation layer (141) covering the first conductive pattern (142) and including a first via hole exposing a portion of an upper surface of the first conductive pattern, a conductive via (143) in the first via hole (a via hole on top of 142 before disposing 143) and on the portion of the upper surface of the first conductive pattern (142), a second conductive pattern (upper layer 142) on the first insulation layer (141 lower than 142) and integrally connected to the conductive via (143), and a second insulation layer (141) covering the second conductive pattern (142) (See also, Pars [0036], and [0038]-[0039]), and wherein each of the first conductive pattern and the second conductive pattern comprises, a metal layer including copper (See, for example, Par [0038]). KWON fails to explicitly teach that a skin layer on an upper surface of the metal layer, and including Cu.sub.1-xNi.sub.x (x is 0.2 to 0.8). Jin discloses (See, for example, Par [0071]) that redistribution layers 122 may include "copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof". Jin expressly teaches that the redistribution layers may comprise alloys of copper and nickel. A copper-nickel alloy skin layer formed on the upper surface of the copper redistribution layer inherently includes both copper and nickel in its composition, reading on the claimed Cu1-xNix formulation. Jin further teaches, in Par [0071], that a surface treatment layer P may be formed on surfaces of the redistribution layer 122 by "electroless nickel plating". When the electroless nickel plating is deposited on the copper or Cu-Ni alloy redistribution layer, an interdiffusion zone forms at the copper and nickel or copper-nickel alloy and nickel interface that inherently contains a variation of Cu1-xNix composition. Electroless nickel deposits on copper layers are well-known to produce such interfacial alloying regions. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the first and second conductive patterns of KWON with a copper metal layer and to apply the electroless nickel plating surface treatment taught by Jin onto the upper surfaces thereof, or alternatively to form a copper-nickel alloy skin layer from the alloys expressly identified by Jin, thereby resulting in a skin layer on the upper surface of the metal layer including Cu1-xNix because the electroless nickel plating on copper redistribution layers improves oxidation resistance, solder wettability, and provides a diffusion barrier. See KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). As to the claimed compositional range of x = 0.2 to 0.8, it would have been obvious to optimize the nickel content in the copper-nickel alloy skin layer through routine experimentation to arrive at the claimed range, as the relative proportions of copper and nickel in the alloy directly affect properties such as corrosion resistance, adhesion strength, and diffusion barrier effectiveness. The claimed range of Cu1-xNix (x is 0.2 to 0.8) represents a result-effective variable amenable to routine optimization. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation). In regards to claim 10, KWON as modified above discloses all limitations of claim 9 above except that the skin layer includes Cu.sub.1-xNi.sub.x (x is 0.2 to 0.8), and the skin layer has a thickness of 150 angstroms to 300 angstroms. Jin discloses (See, for example, Par [0071]) that redistribution layers 122 may include "copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof". Jin expressly teaches that the redistribution layers may comprise alloys of copper and nickel. A copper-nickel alloy skin layer formed on the upper surface of the copper redistribution layer inherently includes both copper and nickel in its composition, reading on the claimed Cu1-xNix formulation. Jin further teaches, in Par [0071], that a surface treatment layer P may be formed on surfaces of the redistribution layer 122 by "electroless nickel plating". When the electroless nickel plating is deposited on the copper or Cu-Ni alloy redistribution layer, an interdiffusion zone forms at the copper and nickel or copper-nickel alloy and nickel interface that inherently contains a variation of Cu1-xNix composition. Electroless nickel deposits on copper layers are well-known to produce such interfacial alloying regions. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the first and second conductive patterns of KWON with a copper metal layer and to apply the electroless nickel plating surface treatment taught by Jin onto the upper surfaces thereof, or alternatively to form a copper-nickel alloy skin layer from the alloys expressly identified by Jin, thereby resulting in a skin layer on the upper surface of the metal layer including Cu1-xNix because the electroless nickel plating on copper redistribution layers improves oxidation resistance, solder wettability, and provides a diffusion barrier. See KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). As to the claimed compositional range of x = 0.2 to 0.8, it would have been obvious to optimize the nickel content in the copper-nickel alloy skin layer through routine experimentation to arrive at the claimed range, as the relative proportions of copper and nickel in the alloy directly affect properties such as corrosion resistance, adhesion strength, and diffusion barrier effectiveness. The claimed range of Cu1-xNix (x is 0.2 to 0.8) represents a result-effective variable amenable to routine optimization. See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation). Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to optimize the thickness of the electroless nickel plating surface treatment layer P of Jin to fall within the range of 150 angstroms to 300 angstroms through routine experimentation. The thickness of a surface treatment layer on a copper redistribution pattern is a result-effective variable that directly affects the layer’s ability to serve as a diffusion barrier, its adhesion to the underlying copper, its oxidation protection effectiveness, and the overall electrical resistance of the conductive pattern. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. See In re Aller, 220 F.2d 454, 456 (CCPA 1955). In regards to claim 13, Kwon as modified above discloses (see, for example, Fig. 1, Kwon) the first redistribution structure further comprises a lower metal layer (bottom layer 142) covering a sidewall and a bottom surface of a first conductive via (143 onto 142) of the plurality of first conductive vias and on a bottom surface of a first redistribution conductive pattern of the plurality of first redistribution conductive patterns (142), the lower metal layer (bottom 122, JIN) and the skin layer of the first redistribution conductive pattern (“P” layer formed on 122, JIN) are between a portion of the metal layer (122, JIN) of the first redistribution conductive pattern and the first conductive via (123, JIN), and the portion of the metal layer of the first redistribution conductive pattern is below the first conductive via (123 onto 122, JIN). In regards to claim 14, Kwon as modified above discloses (See, for example, Fig. 1) the first conductive via (143) and the first redistribution conductive pattern (142) are portions of an integral structure, respectively. In regards to claim 16, KWON as modified above discloses all limitations of claim 15 except that the skin layer has a thickness of 150 angstroms to 300 angstroms. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to optimize the thickness of the electroless nickel plating surface treatment layer P of Jin to fall within the range of 150 angstroms to 300 angstroms through routine experimentation. The thickness of a surface treatment layer on a copper redistribution pattern is a result-effective variable that directly affects the layer’s ability to serve as a diffusion barrier, its adhesion to the underlying copper, its oxidation protection effectiveness, and the overall electrical resistance of the conductive pattern. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. See In re Aller, 220 F.2d 454, 456 (CCPA 1955).) In regards to claim 18, KWON as modified above discloses (See, for example, Figs. 6 and 8, JIN) the skin layer of the first conductive pattern (interface layer between “P” layer and redistribution layer 122) is between the upper surface of the metal layer (122) of the first conductive pattern and the first insulation layer (121), and the sidewall of the metal layer (122) of the first conductive pattern is in contact with the first insulation layer (121). In regards to claim 19, KWON as modified above discloses (See, for example, Fig. 6 and 8, JIN) the redistribution structure further comprises a lower metal layer (122) surrounding a sidewall and a bottom surface of the conductive via (123 onto 122), and an upper surface of the skin layer (interface between “P” layer and the redistribution layer 122) of the first conductive pattern that is on a bottom of the first via hole (123 onto 122) is in contact with the lower metal layer. In regards to claim 20, KWON as modified above discloses (See, for example, Fig. 1) the first insulation layer and the second insulation layer comprise a photo-imageable dielectric (PID) material (See, for example, Par [0037]). Allowable Subject Matter Claims 4, 11-12 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Correspondence Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERMIAS T WOLDEGEORGIS whose telephone number is (571)270-5350. The examiner can normally be reached on Monday-Friday 8 am - 5 pm E.S.T.. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERMIAS T WOLDEGEORGIS/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Aug 16, 2023
Application Filed
Mar 03, 2026
Non-Final Rejection — §103
Apr 01, 2026
Interview Requested
Apr 07, 2026
Applicant Interview (Telephonic)
Apr 07, 2026
Examiner Interview Summary

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12598902
Display Module and Display Device
2y 5m to grant Granted Apr 07, 2026
Patent 12593457
MULTI-STATE FERROELECTRIC-RAM WITH STACKED CAPACITORS
2y 5m to grant Granted Mar 31, 2026
Patent 12588365
DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12588398
TOUCH DISPLAY PANEL AND PREPARATION METHOD THEREOF, AND DISPLAY APPARATUS
2y 5m to grant Granted Mar 24, 2026
Patent 12580019
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
83%
With Interview (+11.9%)
3y 0m
Median Time to Grant
Low
PTA Risk
Based on 743 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month