DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities: reference numerals 501 & 502 have no associated description in the specification. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “a plurality of second conductive bumps” in lines 6-7. The limitation raises ambiguity as it implies that there is a plurality of first conductive bumps that is not recited in the claim. Amending “first conductive bumps” to “a plurality of first conductive bumps” will overcome this issue. Correction/clarification is required.
Claims 2-12 are rejected for being dependent on claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5 & 8 are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US Pub. 2010/0301475) in view of Lee (US Pub. 2021/0074660) and LEE et al. (US Pub. 2015/0041971).
Regarding claim 1, Hsu teaches a semiconductor package structure, comprising:
a first substrate 400 (Fig. 10);
a first semiconductor die 360 connected to the first substrate 400 (Fig. 10); and
a second semiconductor die stack structure 500 located on the first semiconductor die 360, the second semiconductor die stack structure 500 including a plurality of second semiconductor dies sequentially stacked onto one another in a first direction (see Fig. 10 and Para [0029])
Hsu is silent on (i) the first semiconductor die being connected to the first substrate by first conductive bumps; and (ii) a plurality of second conductive bumps being formed on a side of the second semiconductor die stack structure in the first direction, wherein the first direction is a direction parallel to a plane where the first substrate is located; and a second substrate, a signal line in the second substrate being connected to the plurality of second conductive bumps, and the second substrate being connected to the first substrate in a direction perpendicular to the plane where the first substrate is located.
Lee discloses (i) a semiconductor package structure, wherein a first semiconductor die 100 is connected to a first substrate 500 by first conductive bumps 160 (see Fig. 1). This has the advantages of providing efficient bonding with improved stability and thermal management. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Hsu with the conductive bumps, as taught by Lee, so as to obtain an improved semiconductor device.
LEE teaches (ii) a plurality of second conductive bumps 170 being formed on a side of the second semiconductor die stack structure 1 in the first direction, wherein the first direction is a direction parallel to a plane where a first substrate 110 is located; and a second substrate 150, a signal line 151 in the second substrate 150 being connected to the plurality of second conductive bumps 170, and the second substrate 150 being connected to the first substrate110 in a direction perpendicular to the plane where the first substrate is located (see Fig. 2). This has the advantages of providing high density chip integration, improved signal integrity and reduced power consumption. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Hsu & Lee with the conductive bumps and the second substrate, as taught by LEE, so as to obtain an improved semiconductor device.
Regarding claim 2, the combination of Hsu, Lee and LEE teaches the semiconductor package structure according to claim 1, wherein the first semiconductor die 360 comprises a logic die, and the second semiconductor die stack structure comprises DRAM dies (Hsu’s Fig. 10).
Regarding claim 3, the combination of Hsu, Lee and LEE teaches is on the semiconductor package structure according to claim 1, further comprising: an adhesive film (270 and/or 270 & 280 )located between the first semiconductor die 160 and the second semiconductor die stack structure (200-400, see Lee’s Fig. 1).
Regarding claim 4, the combination of Hsu, Lee and LEE teaches the semiconductor package structure according to claim 3, wherein the adhesive film comprises a first adhesive film 280, and a second adhesive film 270 located on the first adhesive film, wherein an elastic modulus of the second adhesive film 270 is greater than an elastic modulus of the first adhesive film 280 (Fig. 1 and associated text).
Regarding claim 5, the combination of Hsu, Lee and LEE teaches the semiconductor package structure according to claim 1, wherein the first semiconductor die 360 and the second semiconductor die stack structure 500 communicate with each other in a wireless manner (Fig. 10 & Fig. 2).
Regarding claim 8, the combination of Hsu, Lee and LEE teaches the semiconductor package structure according to claim 1, further comprising: a plurality of through silicon vias 96, each of the plurality of through silicon vias 96 penetrating through a respective one of the plurality of second semiconductor dies in the first direction (Hsu’s Fig. 10); and a plurality of fourth conductive bumps (note the bumps between each semiconductor dies in the die stack 500, Fig. 10) located between any two adjacent second semiconductor dies of the plurality of second semiconductor dies, each of the plurality of fourth conductive bumps being connected to a respective one of the plurality of through silicon vias 96, wherein each of the plurality of second conductive bumps is connected to a respective one of the plurality of through silicon vias and a respective one of the plurality of fourth conductive bumps (Hsu’s Fig. 10).
Allowable Subject Matter
Claims 6-7 & 9-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant’s arguments with respect to claims 1-12 have been considered but are moot in light of new grounds of rejection. Contrary to the applicant’s argument, the Examiner maintains that the combination of prior art teaches all of the claim features as addressed in the rejection above. The Examiner suggests that the applicant incorporates the objected claims into the independent claim to move the case towards allowance.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIMOR KARIMY whose telephone number is (571)272-9006. The examiner can normally be reached Monday - Friday: 8:30 AM -5:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TIMOR KARIMY/Primary Examiner, Art Unit 2818
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