DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Election/Restrictions
Applicant’s election without traverse of species (i), fig. 6, claims 16-22 and 25-35 in the reply filed on 11/18/25 is acknowledged.
Claims 23-24 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11/18/25.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 21, 22 and 35 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 21, 22 and 35, there is insufficient antecedent basis for “the first end of the second substrate”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 16, 19-22 and 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tse et al., US Publication No. 2017/0018488 A1 (from the IDS) in view of Miyazawa, US Publication No. 2018/0128234 A1.
Tse teaches:
16. A packaged structure, comprising (see fig. 7, also see figs. 4 and 6):
a first substrate (100), wherein power units (10) are disposed on a first surface (e.g. top surface) of the first substrate; and
a second substrate (200), wherein a control unit (30) is disposed on a first surface (e.g. top surface) of the second substrate, the second substrate (200) is connected (130) to a first end of the first substrate (100), the control unit (30) is electrically connected to the power units (10), and the control unit is configured to:
…
control the power units to work (e.g. driver for driving gate of power switching device at para. [0002]), wherein the first surface (e.g. top surface) of the second substrate (200) is disposed on a same side as the first surface (e.g. top surface) of the first substrate (100). See Tse at para. [0001] – [0059], figs. 1-7.
Tse does not expressly teach:
the control unit is configured to:
receive an external input signal,
collect an internal sensing signal…
In an analogous art, Miyazawa taches:
a control unit (302+230) electrically connected to a power unit (210),
the control unit is configured to:
receive an external input signal (e.g. para. [0084]),
collect an internal sensing signal (e.g. para. [0092]), and
control the power unit to work (e.g. para. [0004]),
Tse further teaches:
19. The packaged structure according to claim 16, wherein the control unit (30) is electrically connected to the power units (10) by a second connecting part (130), and the second connecting part comprises at least one flexible printed circuit board, para. [0056].
20. The packaged structure according to claim 19, wherein a conductive line (e.g. copper rail, copper pattern, para. [0053]) is arranged on the second substrate (200), and the flexible printed circuit board (130) is electrically connected to the control unit (30) by the conductive line on the second substrate, para. [0055] – [0058], fig. 7.
21. The packaged structure according to claim 16, wherein the first end (e.g. left end) of the second substrate (200) is stacked on one end (e.g. right end) of the first substrate (100).
22. The packaged structure according to claim 21,
wherein a second surface (e.g. bottom surface) of the second substrate (200) is connected to the first surface (e.g. top surface) of the first substrate (100), a first soldering part (e.g. solder connection for 130) is disposed on the second surface of the second substrate, a second soldering part (e.g. solder connection for 130) is disposed on the first surface of the first substrate, and the first soldering part is soldered to the second soldering part (e.g. Solder is obvious material used for connection from disclosure at para. [0053]), or
wherein the first surface of the second substrate is connected to a second surface of the first substrate, a first soldering part is disposed on the first surface of the second substrate, a second soldering part is disposed on the second surface of the first substrate, and the first soldering part is soldered to the second soldering part.
25. The packaged structure according to claim 16, wherein a first lead part (71 right; leads 71 are shown in fig. 7 and labeled in fig. 6) is disposed at a second end (e.g. right end) of the second substrate (200) and away from the first substrate (100), and the first lead part (71 right) is electrically connected to the control unit (30), and wherein a second lead part (71 left) is disposed at an end (e.g. left end) of the first substrate (100) and away from the second substrate (200), and the second lead part (71 left) is electrically connected to the power units (10), fig. 7.
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Tse with the teachings of Miyazawa because “…an effect is achieved in that malfunction is prevented by reliably causing the power semiconductor element to be conductive when a control signal to cause the power semiconductor device to be conductive is input to the semiconductor device”. See Miyazawa at para. [0097].
Claim(s) 30 and 33-35 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tse et al., US Publication No. 2017/0018488 A1 (from the IDS) in view of Miyazawa, US Publication No. 2018/0128234 A1 and Echigo et al, US Publication No. 2021/0162980 A1.
Regarding claim 30:
Tse and Miyazawa teach the limitations as applied to claim 16 above, and Miyazawa further teaches a battery at para. [0023].
Tse and Miyazawa do not expressly teach:
An electric power control system, comprising: …the packaged structure is configured to convert a direct current of a battery into an alternating current to supply the alternating current to a power apparatus…
In an analogous art, Echigo teaches:
(see fig. 1) An electric power control system (1/2/3/4/5), comprising: …a packaged structure (3) configured to convert a direct current of a battery (4) into an alternating current to supply the alternating current to a power apparatus (2) …, para. [0017] – [0029].
Regarding claim 33:
Tse teaches the limitation as applied to claim 19 above.
Regarding claim 34:
Tse teaches the limitation as applied to claim 20 above.
Regarding claim 35:
Tse teaches the limitation as applied to claim 21 above.
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Tse with the teachings of Miyazawa because “…an effect is achieved in that malfunction is prevented by reliably causing the power semiconductor element to be conductive when a control signal to cause the power semiconductor device to be conductive is input to the semiconductor device”. See Miyazawa at para. [0097].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Tse with the teachings of Echigo because in an electric vehicle a battery supplies charged electric power to a driving motor via an inverter that converts DC power into AC power. See Echigo at para. [0022] – [0023].
Claim(s) 17, 18, 31 and 32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tse in view of Miyazawa, as applied to claims 16 and 30 above, in further view of Bayerer et al., US Publication No. 2016/0056132 A1.
Regarding claim 17:
Tse and Miyazawa teach all the limitations of claim 16 above, and Tse further teaches:
(see fig. 3) wherein the power units (10) include a row of power units that are disposed on the first substrate (100), the row…comprises at least one corresponding power unit (10) arranged in a first direction
Tse and Miyazawa but do not expressly teach:
corresponding power units in each row of the plurality of rows of power units are electrically connected by a first corresponding connecting part.
In an analogous art, Bayerer teaches:
(see fig. 21) wherein the power units (1) include a plurality of rows (21, 22, 23, 24) of power units that are disposed on a first substrate (70), each row of the plurality of rows (21, 22, 23, 24) of power units comprises at least one corresponding power unit (1) arranged in a first direction (r2), and corresponding power units (1) in each row of the plurality of rows (21, 22, 23, 24) of power units are electrically connected by a first corresponding connecting part (4). See Bayerer at para. [0095] – [0097].
Bayerer further teaches:
18. The packaged structure according to claim 17, wherein the first corresponding connecting part (4) comprises a conductor (e.g. bonding wire), the conductor is in a multi-arch bridge shape, the conductor comprises a plurality of arch structures and a connecting part (e.g. at trough of the bridges) connected between adjacent arch structures, and the connecting part is electrically connected to the power units, fig. 21.
Regarding claim 31:
Bayerer teaches the limitations as applied to claim 17 above
Regarding claim 32:
Bayerer teaches the limitations as applied to claim 18 above
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Tse with the teachings of Bayerer because this enables the plurality of power units to be connected in series. See Bayerer at para. [0095].
Claim(s) 26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tse in view of Miyazawa, as applied to claim 16 above, in view of Casey et al., US Publication No. 2007/0057284 A1.
Regarding claim 26:
Tse teaches all the limitations of claim 16 above, and further teaches a power unit of the power units comprises a power chip, para. [0043].
Tse does not expressly teach:
a surface of the power chip and that has a pin is away from the first substrate.
In an analogous art, Casey teaches:
a surface of the power chip (72) and that has a pin (“input/output pins) is away from a first substrate (74), para. [0006] – [0008].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Tse with the teachings of Casey because the exposed pins enable the connection of bonding wires (71) to the power chip (71), para. [0007].
Claim(s) 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tse in view of Miyazawa, as applied to claim 16 above, in view of Prechtl et al., US Publication No. 2017/0025523 A1.
Regarding claim 27:
Tse teaches all the limitations of claim 16 above, but does not expressly teach:
a housing, wherein the housing has accommodation space inside, and the first substrate and the second substrate are located inside the housing.
In an analogous art, Prechtl teaches:
a housing, wherein the housing has accommodation space inside for semiconductor chips, para. [0076].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Tse with the teachings of Prechtl to form “a housing, wherein the housing has accommodation space inside, and the first substrate and the second substrate are located inside the housing” because housing provides protection against external impacts. See Prechtl at para. [0076].
Claim(s) 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tse in view of Miyazawa, as applied to claim 16 above, in view of Kanschat et al., DE 102006040435 B3 (see attached English machine translation).
Regarding claim 28:
Tse teaches all the limitations of claim 16 above, but does not expressly teach:
wherein a first region on the housing and that corresponds to a second surface of the first substrate has a first notch, and wherein a second region on the housing and that corresponds to the control unit has a second notch.
In an analogous art, Kanschat teaches:
(see figs. 6-7) wherein a first region on the housing (40) and that corresponds to a second surface a the first substrate has a first notch (53), and wherein a second region on the housing…has a second notch (51). See Kanschat at pages 9-10
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Tse with the teachings of Kanchat to form “wherein a first region on the housing and that corresponds to a second surface of the first substrate has a first notch, and wherein a second region on the housing and that corresponds to the control unit has a second notch” because the notches to provide for mechanical attachment. See Kanschat at pages 9-10.
.
Claim(s) 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tse in view of Miyazawa, as applied to claim 16 above, in view of Pan et al., US Publication No. 2020/0006186.
Regarding claim 29:
Tse teaches all the limitations of claim 16 above, and further teaches 120A functions as heat sink, para. [0032].
Tse does not expressly teach:
wherein a first heat sink is disposed on a second surface of the first substrate, and wherein a second heat sink is disposed on a surface of the control unit that faces away from the second substrate.
In an analogous art, Pan teaches a heat sink (118) disposed on a second surface of substrate (102), para. [0058], fig. 1.
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Tse with the teachings of Kanchat to form “wherein a first heat sink is disposed on a second surface of the first substrate, and wherein a second heat sink is disposed on a surface of the control unit that faces away from the second substrate” because heat transfer enhancements improve temperature control within a package. See Pan at para. [0054].
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michele Fan whose telephone number is 571-270-7401. The examiner can normally be reached on M-F from 7:30 am to 4 pm.
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/Michele Fan/
Primary Examiner, Art Unit 2818
29 January 2026