Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to because in Fig. 4, the orientation of the x-axis appears to be inconsistent with Fig. 3. Fig. 3 shows the dotted-dashed line XX with arrows pointing in the negative x direction. Thus, when looking at Fig. 4, in the view of the Examiner, the direction of the x-axis should be coming out of the page, so the cross should be a dot. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over US20200098667A1 (Adachi) in view of US20200132736A1 (Fujioka).
Regarding Claim 1, Adachi discloses a semiconductor device (Fig. 1, el. 100, Para. [0040]), comprising: a semiconductor chip (Fig. 1, el. 78, Para. [0041]) having an output electrode (Fig. 1, el. 198, Para. [0048]) on a front surface thereof (Fig. 1, Para. [0048])), an insulated circuit board (Fig. 1, el. 162, Para [0044]) having the semiconductor chip disposed on a front surface thereof (Para. [0043]); an output terminal (Fig. 1, el. 86, Para. [0054]) electrically connected to the output electrode (Para. [0048]); a cooling device (Fig. 3, el. 114, Para. [0074]) including a cooling top plate (Fig. 1, el. 94, Para. [0055]) having a cooling top surface and a cooling bottom surface (Fig. 4, Para. [0081]), the cooling top surface having a cooling area on which the insulated circuit board is disposed (Fig. 4, Para. [0077]); and a case (Fig. 1, el. 88, Para. [0040]) including a frame portion (Fig. 1, els. 65 and 66, Para. [0042])) having a frame shape in a plan view of the semiconductor device (Fig. 1, Para. [0042]) and being disposed on the cooling top surface (Figs. 4 and 7), the frame portion including an open storage area in which the insulated circuit board is stored (Para. [0042]); and a temperature detection unit embedded within the frame portion (Para. [0058]).
Adachi does not disclose that the output terminal extends from the storage area to an outside of the case, and does not disclose a current detection unit for detecting an output current flowing through the output terminal, the current detection unit being embedded within the frame portion such that a shortest external dimension of the current detection unit is parallel to a first direction that is perpendicular to the cooling area of the cooling top surface.
Fujioka discloses a semiconductor device (Fig. 2, els. 11 and 12, Para. [0019]) comprising a current detection unit (Fig. 5, el. 7a, Para. [0044]) for detecting an output current flowing through the output terminal (Para. [0044]). Fujioka discloses an orientation of the current sensor such that the direction of the current could be parallel to the shortest external length of the current detector (Fig. 5).
It would have been obvious to one skilled in the art before the effective filing date of the
claimed invention to extend the output terminals to outside the case, as this would make it easier to connect to an external device, such as a motor. Further, it would have been obvious to add (or replace the temperature sensor) the current sensor of Fujioka to the device of Adachi. As discloses by Adachi, it can be useful to output a physical quantity based on the current supplied to a load, such as a motor. (Para. [0005]). Finally, orienting the current detection unit such that the shortest external dimension is parallel to the first direction that is perpendicular to the cooling area of the cooling top surface is an example of rearrangement or parts (MPEP 2144 (VI)(C)) – the orientation of the current detector and output current of Adachi can be changed to meet this.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Adachi in view of Fujioka.
Regarding Claim 2, Adachi in view of Fujioka discloses the semiconductor device according to claim 1, wherein the insulated circuit board includes a first wiring plate (Adachi, Fig. 1, el. 164, Para. [0048]) on which the semiconductor chip is disposed (Para. [0048]) and a second wiring plate (Fig. 1, el. 164, Para. [0048]) to which the output electrode of the semiconductor chip is electrically connected (Fig. 1, Para. [0048]), the first wiring plate and the second wiring plate being disposed on the front surface of the insulated circuit board (Fig. 1, Para. [0048]), and the output terminal has two ends (Fig. 1, el. 198) one of the two ends of the output terminal being connected to the second wiring plate (Para. [0048]), and the other one of the two ends extending to the outside of the case (see analysis of Claim 1).
Adachi in view of Fujioka does not disclose that one of the ends of the output terminal extends in a second direction perpendicular to the first direction from the frame portion.
It would have been obvious to one skilled in the art before the effective filing date of the
claimed invention to orient one of the ends of the output terminal such that it extends in a second direction perpendicular to the first direction from the frame portion. This would be an example of a rearrangement or parts (MPEP 2144 (VI)(C)).
Claims 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Adachi in view of Fujioka.
Regarding Claims 3-5, Adachi in view of Fujioka discloses the semiconductor device according to claim 1.
Fujioka further discloses that the current detection unit includes a magnetic core extending along a periphery of a penetration area (Fig. 5, Para. [0044]) and having a gap in a direction that the magnetic core extends (Fig. 5, Para. [0044]) such that the magnetic core partially surrounds the penetration area in a shape of the letter “C” in the plan view (Fig. 5, Para. [0044]), and a Hall element (Fig. 5, el. 5a, Para. [0044]) disposed in the gap (Fig. 5, Para. [0044]), and wherein the output terminal has an intermediate portion that passes through the penetration area of the magnetic core (Fig. 5, Para. [0044]).
It would have been obvious to one skilled in the art before the effective filing date of the
claimed invention to configure the current sensor as disclosed by Fujioka as this is a well-known and standard way of building a current detection unit.
Regarding Claim 5, Adachi in view of Fujioka discloses the semiconductor device according to claim 4, wherein the current detection unit has a detection top surface and a detection bottom surface opposite to each other (Fig. 5 in Fujioka shows one view of the current detection unit, which can be considered as a view of the top surface. The opposite side (not shown) is the bottom surface), the detection bottom surface facing the cooling top surface (this would be there is the current sensor is reoriented), and the output terminal has a first side portion that extends along the detection surface top surface, the intermediate portion that extends through the penetration area of the current detection portion that extends through the penetration area of the current detection unit from the detection top surface to the detection bottom surface, and a second side portion that extends along the detection bottom surface to the outside of the case (see analysis of Claims 1, 3 and 4 – when the current detection unit is reoriented and connected to the output terminal of Adachi the output termina will have a first side portion that extends along the direction of the top surface, the intermediate portion that goes through the penetration area from the top to the bottom of the current detection unit, and a second side portion that extends outside the case.)
Regarding Claim 6, Adachi in view of Fujioka discloses the semiconductor device according to claim 5, wherein the cooling top surface of the cooling top plate includes a cooling area (Fig. 4, el. 93, Para. [0078]), in which the insulated circuit board is disposed (Fig. 4, Para. [0078]) and a frame portion area (Figs. 4 and 7, sidewalls 65 and 66 are the frame portion, and sit in a frame portion area) surrounding the cooling area, the frame portion being disposed in the frame portion area (see Fig. 4 and 7), the semiconductor device further comprising: a cooling bottom plate (Fig. 4, el. 64, Para. [0077]) disposed at a side of the colling bottom surface of the cooling top plate to face the cooling top plate (see Fig. 4), the cooling bottom plate having an inlet (Fig. 7, el. 97, Para. [0097]) and an outlet (Fig. 7, el. 98, Para. [0097]) for refrigerant overlapping the frame portion area of the cooling top surface in the plan view (Fig. 7, Para. [0097]), a plurality of heat dissipation fins (Fig. 4, el. 95, Para. [0077]) provided between the cooling top plate and the cooling bottom plate at positions overlapping the cooling area of the cooling top surface in the plan view (Fig. 4, Para. [0081]), a side wall (Fig. 7, see rightmost and leftmost wall in annotated figure below) disposed between the cooling top plate and the cooling bottom plate so as to surround the plurality of heat dissipation fins, the inlet and the outlet.
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Allowable Subject Matter
Claims 7-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding Claims 7-8, none of the prior art of record teaches, suggests or renders
obvious, either alone or in combination the limitation the cooling bottom plate having an inlet and an outlet for refrigerant at positions overlapping the cooling area of the cooling top surface in the plan view; the frame portion area being located closer to the cooling bottom plate than is the cooling area.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROHIT PARTHASARATHY whose telephone number is (571)272-2572. The examiner can normally be reached Monday-Friday 8:30a-5p.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ROHIT PARTHASARATHY/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899