DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 1 is rejected under 35 U.S.C. § 103 as being obvious over Ellis (US 7,215,221) in view of Vander Heijden (US 7,355,479).
Regarding Claim 1, Ellis discloses a circuit (Fig. 4), comprising:
a radio frequency (RF) amplifier (Ellis, col. 4, lines 13-17; Fig. 4, 44a-44d) configured to amplify an RF signal; and
a multifunctional (40-42 in Figs. 4, 5 that provides both DC bias path and harmonic termination) filter (a "pi network" filter coupled to the output of an active device at the drain terminal) coupled to an RF node of the RF amplifier (Ellis, col. 4, lines 15-34; Figs. 4 and 5, 40 and 42), wherein the multifunctional filter comprises:
[AltContent: arrow]
PNG
media_image1.png
496
517
media_image1.png
Greyscale
Fig. 4 (left) and Fig. 5 (right) of Ellis reproduced for ease of reference.
a first conduction path between the RF node (NRF) and a first low impedance node (N1LOW), the first conduction path (P1) configured to isolate the RF signal and corresponding higher order harmonics (see Fig. 4 and 5 above) at the RF node (NRF) from the first low impedance node and pass an envelope signal (baseband) at the RF node to the first low impedance node (Ellis discloses a low pass filter comprising an RF choke (inductor) and first capacitor coupled between the active device output and the DC supply voltage, Ellis, col. 5, lines 35-45; Fig. 4, elements 42, 44. This low pass filter is configured to: Pass DC bias to be applicable to the active device output while Providing low impedance at frequency bands above a frequency band of operation (Ellis, col. 5, lines 20-25; col. 6, lines 10-15). The RF choke and first capacitor inherently pass low frequency components (including envelope/baseband signals) while blocking RF signals and harmonics, because it is well-known in the art about the low-pass filter in DC bias circuit. The first low impedance node (N1ZLOW) is the DC supply voltage node (Vdd), which presents low impedance at DC and baseband frequencies); and
[AltContent: textbox (N1ZLOW)][AltContent: textbox (Harmonics)][AltContent: ][AltContent: ][AltContent: oval][AltContent: textbox (NRF)][AltContent: textbox (N2ZLOW)][AltContent: textbox (P2)][AltContent: textbox (Baseband)][AltContent: textbox (P1)][AltContent: arrow]
PNG
media_image2.png
526
1110
media_image2.png
Greyscale
Fig. 4 (left) and Fig. 5 (right) of Ellis reproduced for ease of reference.
Ellis teaches a second capacitor (46) coupled in parallel with the low pass filter, wherein the second capacitor (46) is valued to resonate with the RF choke to produce a high impedance at a desired frequency and a low impedance to at least a second harmonic of the desired frequency (Ellis, col. 5, lines 45-55; col. 6, lines 1-10; Fig. 4, element 46).
This resonant circuit forms a conduction path that:
Provides low impedance at harmonic frequencies (passing harmonics to ground)
Provides high impedance at the fundamental RF frequency (isolating RF signal)
The second low impedance node (N2ZLOW) is ground/reference potential (Ellis, Figs. 4, 5).
While Ellis explicitly teaches harmonic termination, Vander Heijden provides express teaching regarding the importance of baseband termination for reducing intermodulation distortion (IMD). Specifically, Vander Heijden teaches:
"The IM3 cancellation requirements depend on the input out-of-band terminations (baseband and second-harmonic termination)" (Vander Heijden, col. 3, lines 30-35).
Vander Heijden further teaches that to suppress IMD3 in conventional amplifier modes, "the IF baseband should also be terminated in a short circuit up to the maximum modulation frequency" and that proper baseband termination significantly improves linearity (Vander Heijden, col. 5, lines 40-50; col. 6, lines 1-10).
A person of ordinary skill in the art would have been motivated to combine Ellis's pi network filter configuration with Vander Heijden's baseband termination teachings because both references operate in the common technical field of RF power amplifier design for wireless communications and address distortion reduction through proper impedance termination; Vander Heijden explicitly teaches that both baseband and harmonic termination are required together for optimal IMD3 cancellation, constituting a direct suggestion to implement dual termination paths; the combination would yield entirely predictable results since Ellis's low-pass filter path already passes low-frequency components including the baseband/envelope signal, which one of ordinary skill would recognize as inherently providing the baseband termination that Vander Heijden identifies as necessary; both references address the identical problem of intermodulation distortion and harmonic content using analogous filtering techniques, such that the combination represents nothing more than applying known filter design principles to achieve the objectives taught in both references; and the principle that envelope/baseband components contribute to intermodulation distortion was well-known in the art, as evidenced by Vander Heijden's discussion of prior art baseband termination techniques, such that one of ordinary skill would naturally apply this known principle when designing Ellis's filter circuit, rendering the claimed multifunctional filter with dual conduction paths—one for envelope/baseband signals and one for harmonics—an obvious design choice to one seeking to implement the comprehensive termination strategy taught by Vander Heijden using the pi network filter topology disclosed by Ellis.
Regarding claim 2, the resultant combination teaches that the first conduction path (P1) comprises first (50) and second (44) inductors in series connection.
Further per claim 3, the first (50) and second (44) inductors in series connection form a low pass filter that passes the envelope signal.
Regarding claim 4, The resultant combination although is not explicit about the first and second inductors are mutually coupled inductors provided by a T-coil circuit.
T-coil circuits in the RF and microwave art as techniques for implementing series inductance with controlled mutual coupling for bandwidth extension and impedance transformation in RF circuits are common knowledge (please see as a teaching reference, Kim et, al., “Bandwidth Extension of CMOS Amplifier Using Mutually Coupled Three-Inductor Coil, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 71, NO. 9, SEPTEMBER 2024 and Shekhar et. al., Bandwidth Extension Techniques for CMOS Amplifiers, December 2006, IEEE Journal of Solid-State Circuits).
Therefore, one of ordinary skill in the art would recognize T-coil implementation as one of several equivalent techniques for providing series inductance, alongside:
Discrete series inductors
Transformer configurations
Transmission line segments
The motivation to use a T-coil implementation would include:
Bandwidth enhancement through negative mutual coupling
Compact layout in integrated circuit implementations
Precise control of inductance values and frequency response
Well-documented design techniques readily available in the art
Claim 4 is therefore obvious as it represents the substitution of one known inductor implementation technique (T-coil) for another (discrete inductors) to achieve predictable results, motivated by well-known advantages of T-coil circuits.
Also, per claim 5, like Claim 4, represents a specific implementation choice for the series connected inductors using transformer configuration rather than T-coil configuration. Transformer circuits providing mutually coupled inductances were ubiquitous in RF circuit design. The use of transformers for:
Impedance transformation
DC isolation
Controlled coupling between circuit stages
Compact integration of multiple inductors
was well-established prior to the filing date of the claimed invention.
The choice between T-coil, transformer, or discrete inductor implementation represents an obvious design choice based on:
Available fabrication technology
Desired coupling coefficient (positive vs. negative)
Layout constraints
Cost and integration considerations
Therefore, with the resultant combination of Ellis in view of Vander Heijden claim 5 is obvious as it represents the substitution of one known inductor implementation technique (transformer) for another, motivated by conventional design considerations.
Regarding Claim 21, Ellis explicitly shows and describes: First low impedance node (N1ZLOW) = supply voltage (Vdd): "allowing DC bias to be applied to the active device output" through the low pass filter connected to Vdd (Ellis, col. 5, lines 20-25; Fig. 4). Second low impedance node (N2ZLOW) = ground: The second capacitor providing harmonic termination is connected to ground/reference potential (Ellis, Fig. 4, element 46 shown connected to ground)
Regarding Claim 22, Ellis also teaches alternative embodiments where both termination paths connect to ground at low frequencies. The pi network topology inherently allows various grounding configurations depending on bias delivery approach.
Further per claim 23, the method claim recites functional steps that directly correspond to the structural elements of apparatus Claim 1. Under the principle that apparatus claims and corresponding method claims are analyzed similarly with respect to prior art, the method of Claim 23 is obvious over Ellis in view of Vander Heijden for the same reasons discussed for Claim 1, because Ellis Teaches the Method Steps:
The low pass filter (RF choke and first capacitor) of Ellis between the amplifier output node and the supply voltage, passes low frequency components including the envelope signal while isolating RF and harmonics (Ellis, col. 4, lines 15-45).
Further the resonant circuit (RF choke, 50 and second capacitor, 48) in Ellis between the amplifier output node (NRF) and ground (N2ZLOW), which passes harmonic frequencies while isolating RF and envelope signals (Ellis, col. 6, lines 1-14).
Vander Heijden provides express teaching that terminating both baseband and harmonics reduces IMD3 (Vander Heijden, col. 5, lines 30-50).
The same rationale provided for Claim 1 applies to the method claim for combining the teachings of Vander Heijden in the filter of Ellis.
Per claim 24, Ellis also expressly teaches terminating second harmonics: "the second capacitor is valued to resonate with the RF choke to produce... a low impedance to at least a second harmonic of the desired frequency" (Ellis, col. 6, lines 1-10).
The second capacitor providing this low impedance is connected to reference ground (Ellis, Fig. 4), thereby "shorting" the second harmonics to ground.
Claims 6-12 are rejected under 35 U.S.C. § 103 as being anticipated by Ellis in view of Vander Heijden and further in view of Kahtibzadeh.
Regarding claims 6-9, Ellis explicitly teaches: "a second capacitor (46) coupled in parallel with the low pass filter (44), the second capacitor (46) being valued to resonate with the RF choke (inductor) to produce... a low impedance to at least a second harmonic" (Ellis, col. 5, lines 45-55; col. 6, lines 1-5).
The resonance between the RF choke (second inductor in the context of Claims 2-6) and the second capacitor forms a series LC circuit that provides the second conduction path for harmonics. This is shown in Figure 4 of Ellis where the second capacitor (46) resonates with the inductor (42).
Ellis also teaches that the series LC combination (second inductor and second capacitor) forms a bandpass characteristic: "the second capacitor is valued to resonate with the RF choke to produce a high impedance at a desired frequency (fundamental RF) and a low impedance to at least a second harmonic of the desired frequency" (Ellis, col. 6, lines 1-10).
This describes a bandpass filter centered at the harmonic frequency that passes harmonics while blocking the fundamental RF frequency—as recited in claim 7.
Ellis also identifies the resonant circuit as providing harmonic termination at the second harmonic: "a low impedance to at least a second harmonic of the desired frequency" (Ellis, col. 6, lines 5-10). The very purpose of Ellis's circuit is to provide a "trap" for harmonic frequencies—i.e., a low impedance path that shorts harmonics to ground, which is the definition of a trap circuit.
Ellis exemplarily teaches that the pi network may include a low pass filter coupled to an active device drain, the low pass filter having an RF choke and a first capacitor, and a series inductor capacitor resistor resonant circuit coupled in parallel with the low pass filter (Ellis, col. 6, lines 15-25).
This teaching of multiple parallel resonant circuits provides the "additional one or more trap circuits" are explicitly taught by Kahtibzadeh where Kahtibzadeh uses multiple harmonic trap circuits in parallel, each tuned to a different harmonic frequency:
For example, proper values of inductance and capacitance may be chosen such that trapping circuit 80 filters the second harmonic frequency, trapping circuit 82 filters the third harmonic frequency, and so on for as many harmonics as desired (Kahtibzadeh, col. 3, lines 50-55; Fig. 9, elements 80, 82, 84).
One of ordinary skill would find it obvious to implement Ellis's harmonic termination using multiple parallel trap circuits as taught by Kahtibzadeh to:
Trap multiple harmonic frequencies simultaneously
Provide broader bandwidth harmonic suppression
Independently optimize termination for different harmonics
Regarding Claim 10, While Ellis shows a series capacitor in the low-pass filter path (Fig. 4, element 44), it was well-known in the art to add shunt capacitance to inductors in filter networks to:
Control resonant frequency
Improve filter stopband performance
Provide additional filtering characteristics
Kahtibzadeh teaches parallel LC combinations in harmonic termination circuits: "a quarter-wavelength transmission line 76 with parallel-resonant tank 70... values of inductor 72 and capacitor 74, which constitute the parallel-resonant tank 70, are chosen to produce a resonant frequency that coincides with the fundamental frequency" (Kahtibzadeh, col. 2, lines 30-40; Fig. 1b, elements 70, 72, 74).
Further per claim 11, "tank circuit that resonates at the higher order harmonics" represents an obvious modification of the parallel resonant tank taught by Kahtibzadeh. Instead of resonating at the fundamental frequency (as in Kahtibzadeh Fig. 1b), one would simply choose component values to resonate at harmonic frequencies.
The motivation to add such a tank circuit comes from basic filter theory: a parallel resonant circuit presents high impedance at its resonant frequency. By placing this in parallel with the harmonic trap circuit, it prevents the tank from loading the trap at harmonic frequencies, thereby improving trap performance.
This represents straightforward application of known LC resonant circuit principles to achieve predictable filtering results.
According to Claim 12, the extension to multiple tank circuits follows directly from Kahtibzadeh's teaching of multiple trap circuits (Kahtibzadeh, col. 3, lines 50-55). Just as one can use multiple traps for different harmonics, one could use multiple parallel tanks, each resonating at a different harmonic frequency to avoid loading the corresponding trap.
Claims 10-12 are obvious as they represent the application of well-known parallel resonant tank circuit principles to the harmonic termination circuit of Ellis, motivated by the objective of improving filtering performance using techniques taught by Kahtibzadeh.
Claim 13 is rejected under 35 U.S.C. § 103 as being unpatentable over Ellis in view Vander Heijden and Kahtibzadeh and further in view of Smith et al. (US 8,731,490 B2).
Regarding Claim 13, Kahtibzadeh explicitly teaches multiple parallel harmonic trap circuits coupled to the amplifier output: "trapping circuit 80 filters the second harmonic frequency, trapping circuit 82 filters the third harmonic frequency, and so on for as many harmonics as desired" (Kahtibzadeh, col. 3, lines 50-55; Fig. 9).
Smith similarly teaches multiple parallel filter paths in power amplifier output networks, including combinations of inductors and capacitors providing different frequency-dependent conduction paths (Smith, Fig. 3, elements 320, 330, 340, 350, 370, 380).
One of ordinary skill would be motivated to implement multiple parallel multifunctional filters to:
Provide independent optimization for different harmonic frequencies
Achieve broader bandwidth coverage
Improve overall harmonic and baseband termination performance
Allow tuning or switching between different filter characteristics
The combination represents nothing more than the predictable use of multiple parallel filter paths—a conventional technique in RF filter design—applied to the multifunctional filter of Ellis. Therefore, claim 13 is obvious over the combination of Ellis in view of Vander Heijden, Kahtibzadeh, and Smith, as it represents the straightforward multiplication of filter paths using known parallel filtering techniques.
Claims 14-17 are rejected under 35 U.S.C. § 103 as being unpatentable over Ellis in view of Vander Heijden and further in view of Le (US 20070057731 A1).
Regarding claim 14, While Ellis primarily shows the filter coupled to the output (drain/collector) of the amplifier, Le explicitly teaches coupling harmonic termination circuits to the input (gate/base) terminal of RF amplifiers:
"The on-chip harmonic termination employs tunable inductance elements and tunable capacitor elements... suitable for use with radio frequency ('RF') power amplifiers" at various nodes including input terminals (Le, Abstract; col. 1, lines 10-20; Figs. 2-3 showing connections to multiple amplifier nodes).
Vander Heijden similarly teaches the importance of input termination for IMD reduction: "The IM3 cancellation requirements depend on the input out-of-band terminations (baseband and second-harmonic termination)" (Vander Heijden, col. 5, lines 30-35, emphasis added).
One of ordinary skill would find it obvious to apply Ellis's multifunctional filter to the input node of the amplifier based on:
Vander Heijden's express teaching that input terminations are critical for IMD cancellation
Le's teaching of harmonic termination at input nodes
The known principle that distortion can be reduced by proper termination at both input and output of amplifiers
Further per claims 15-16, Ellis explicitly teaches delivering DC bias through the filter network: "allowing DC bias to be appliable to the active device output" through the low pass filter path (Ellis, col. 5, lines 20-25).
When applied to the input node (per claim 14), the same principle applies—the low pass filter path provides DC bias to the gate/base of the input transistor. The first low impedance node would naturally be coupled to the biasing circuit output, which by inherently presents low output impedance to maintain stable bias voltage.
This was conventional practice in RF amplifier design, as confirmed by Le teaching bias delivery through filter networks (Le, col. 4, lines 30-45).
And per claim 17, recites conventional bias delivery through a resistor, which was universal practice in RF amplifier design. This represents no inventive concept beyond routine amplifier biasing techniques.
Therefore, claims 14-17 are obvious over the combination of Ellis, Vander Heijden, and Le, representing the straightforward application of the disclosed filter to the input node as motivated by the teachings regarding input termination importance.
Claims 18-20 are rejected under 35 U.S.C. § 103 as being unpatentable over Ellis in view Vander Heijden and further in view of Le and Smith.
Regarding claim 18, Le explicitly teaches coupling harmonic termination networks to multiple nodes of an RF amplifier:
"An RF amplifier includes an on-chip power transistor... and an on-chip harmonic termination... The on-chip harmonic termination may be coupled to more than one node of the power transistor" (Le, Abstract; col. 3, lines 15-25; Figs. 2-4 showing connections to multiple transistor terminals).
Smith similarly teaches filter networks coupled to multiple transistors in multi-stage amplifiers (Smith, Fig. 1, showing filtering at multiple amplifier stages).
A person of ordinary skill in the art would find it obvious to couple multifunctional filters to multiple RF nodes follows from:
Le's express teaching of multi-node termination
The recognition that distortion can originate at multiple points in an amplifier chain
The objective of comprehensive harmonic and baseband termination throughout the amplifier
Regarding claim 19, the use of DC blocking capacitors when coupling filters to DC-biased nodes was fundamental practice in RF circuit design. Ellis, Le, and Smith all teach or show DC blocking capacitors in various filter coupling configurations.
One of ordinary skill would routinely include DC blocking capacitors when coupling the filter to nodes carrying DC bias voltages to prevent DC current flow through unintended paths.
And per claim 20, It is inherent in the series LC trap circuit taught by Ellis—the capacitor in series with the inductor naturally blocks DC current in the second conduction path (Ellis, Fig. 4, element 46).
Therefore, claims 18-20 are obvious over the combination of Ellis, Le, and Smith, representing conventional multi-node filter coupling with routine DC blocking provisions.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAFIZUR RAHMAN whose telephone number is (571)270-0659. The examiner can normally be reached M-F: 10-6.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached on (571) 272-1769. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
/HAFIZUR RAHMAN/Primary Examiner, Art Unit 2843.