Prosecution Insights
Last updated: October 04, 2026

pSemi Corporation

Technology area: Semiconductors, Circuits & Optics

17 pending office actions • 9 art units • 16 examiners • 0 of 17 (0%) have an AI response strategy ready • 41 patents granted in the last 365 days

Analysis

pSemi Corporation has 18 pending office actions in the Semiconductors, Circuits & Optics technology area. These cases are spread across 10 distinct art units, indicating that the company's circuit designs are being evaluated by a variety of technical specialists. The portfolio involves 17 distinct examiners, which means that almost every pending action is being handled by a different individual, requiring a highly individualized approach to each application.

Kenneth B Wells is the busiest examiner for pSemi Corporation, with 2 pending office actions currently under his review. This low level of concentration, where the busiest examiner holds only 2 of the 18 pending office actions, emphasizes the need for a broad prosecution strategy. Because 17 distinct examiners are involved across 10 distinct art units, the company must prepare for a wide range of examiner perspectives and technical requirements to ensure that its semiconductor innovations are consistently protected.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

17
Total Pending OAs
12
Non-Final OAs
5
Final Rejections
0
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 2 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

1
Overdue
0
Due this week
1
Due this month
0
Due in next 60 days
0
Due later

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

7
Hard (41%)
7
Medium (41%)
2
Easy (12%)
1
Unknown (6%)

Rejection Statute Mix

BucketCases
§103 only3 (18%)
§102 only2 (12%)
§112 only2 (12%)
Double-patenting + other2 (12%)
Multi-statute (no §101)7 (41%)
No statute on record1 (6%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
2
Communications
12% of docket
10
Semiconductors
59% of docket
0
Mechanical / Eng
0% of docket
5
Business / Other
29% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

170 h
Manual time on pending OAs
34 h
Time saved (low, 20%)
59 h
Time saved (mid, 35%)
1.5 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
WELLS, KENNETH B 2 86.2% +2.4%
WILLOUGHBY, TERRENCE RONIQUE 1 80.3% +12.3%
ROSARIO BENITEZ, GUSTAVO A 1 81.4% +24.9%
BEHM, HARRY RAYMOND 1 79.6% +7.4%
KUSUMAKAR, KAREN M 1 87.2% +9.8%
WENDELL, ANDREW 1 84.2% +12.0%
NGUYEN, NIKI HOANG 1 90.9% +5.1%
SEHAR, FAKEHA 1 83.5% +18.0%
NGUYEN, HIEU P 1 92.1% +5.1%
CHOE, HENRY 1 92.2% -1.7%

Quick Wins (4)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 4 ordered by deadline are shown.

App #TitleExaminerDue in
18827039 GATE RESISTIVE LADDER BYPASS FOR RF FET SWITCH STACK WELLS, KENNETH B 36d overdue
18640862 METHOD AND APPARATUS FOR USE IN IMPROVING LINEARITY OF MOSFETS USING AN ACCUMULATED CHARGE SINK NGUYEN, NIKI HOANG —
18622519 IMPEDANCE CONTROL IN MERGED STACKED FET AMPLIFIERS NGUYEN, HIEU P —
18612392 Diode-Based Protection Circuit CHOE, HENRY —

Hard Cases (7)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 7 ordered by deadline are shown.

App #TitleExaminerDue in
19308992 Methods and Apparatuses for Use in Tuning Reactance in a Circuit Device WILLOUGHBY, TERRENCE RONIQUE —
19029649 SWITCHED CAPACITORS FOR AC-DC APPLICATIONS ROSARIO BENITEZ, GUSTAVO A —
19017326 AC Coupling Modules for Bias Ladders WELLS, KENNETH B —
18750645 T-Gate FET Structure KUSUMAKAR, KAREN M —
18664214 REFERENCE SIGNAL ANTENNA SWITCHING FOR RADIO FREQUENCY FRONT END SYSTEMS AND METHODS WENDELL, ANDREW —
18639640 EDMOS FET with Variable Drift Region Resistance SEHAR, FAKEHA —
18416779 Low-Leakage NEDMOS and LDMOS Devices PARTHASARATHY, ROHIT —

Interview Candidates (4)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 4 ordered by deadline are shown.

App #TitleExaminerDue in
19308992 Methods and Apparatuses for Use in Tuning Reactance in a Circuit Device WILLOUGHBY, TERRENCE RONIQUE —
19029649 SWITCHED CAPACITORS FOR AC-DC APPLICATIONS ROSARIO BENITEZ, GUSTAVO A —
18664214 REFERENCE SIGNAL ANTENNA SWITCHING FOR RADIO FREQUENCY FRONT END SYSTEMS AND METHODS WENDELL, ANDREW —
18639640 EDMOS FET with Variable Drift Region Resistance SEHAR, FAKEHA —

Top Art Units

Art UnitApps
2842 4
2836 1
2897 1
2648 1
2818 1
2843 1
2646 1
2899 1
2812 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
19308992 Methods and Apparatuses for Use in Tuning Reactance in a Circuit Device WILLOUGHBY, TERRENCE RONIQUE 2836 §102§103 Non-Final OA — Pending Aug 25, 2025
19029649 SWITCHED CAPACITORS FOR AC-DC APPLICATIONS ROSARIO BENITEZ, GUSTAVO A — §102§103 Non-Final OA — Pending Jan 17, 2025
19031034 PUMP CAPACITOR CONFIGURATION FOR SWITCHED CAPACITOR CIRCUITS BEHM, HARRY RAYMOND — Other Non-Final OA — Pending Jan 17, 2025
19017326 AC Coupling Modules for Bias Ladders WELLS, KENNETH B 2842 §102§112 Non-Final OA — Pending Jan 10, 2025
18827039 GATE RESISTIVE LADDER BYPASS FOR RF FET SWITCH STACK WELLS, KENNETH B 2842 §103§112DP Final Rejection 36d overdue Pending Sep 06, 2024
18750645 T-Gate FET Structure KUSUMAKAR, KAREN M 2897 §102§103 Final Rejection — Pending Jun 21, 2024
18664214 REFERENCE SIGNAL ANTENNA SWITCHING FOR RADIO FREQUENCY FRONT END SYSTEMS AND METHODS WENDELL, ANDREW 2648 §102§103 Final Rejection — Pending May 14, 2024
18640862 METHOD AND APPARATUS FOR USE IN IMPROVING LINEARITY OF MOSFETS USING AN ACCUMULATED CHARGE SINK NGUYEN, NIKI HOANG 2818 §102DP Non-Final OA — Pending Apr 19, 2024
18639640 EDMOS FET with Variable Drift Region Resistance SEHAR, FAKEHA — §103§112 Final Rejection — Pending Apr 18, 2024
18622519 IMPEDANCE CONTROL IN MERGED STACKED FET AMPLIFIERS NGUYEN, HIEU P 2843 §102Other Non-Final OA — Pending Mar 29, 2024
18612392 Diode-Based Protection Circuit CHOE, HENRY — §102 Non-Final OA — Pending Mar 21, 2024
18605576 METHODS AND APPARATUS FOR REDUCING SWITCHING TIME OF RF FET SWITCHING DEVICES VO, NGUYEN THANH 2646 §112 Non-Final OA — Pending Mar 14, 2024
18601465 ESD Protection Circuit RAHMAN, HAFIZUR — §103 Non-Final OA — Pending Mar 11, 2024
18416779 Low-Leakage NEDMOS and LDMOS Devices PARTHASARATHY, ROHIT 2899 §102§103§112Other Non-Final OA — Pending Jan 18, 2024
18409152 GATE RESISTOR BYPASS FOR RF FET SWITCH STACK NGUYEN, LONG T 2842 §112 Non-Final OA 20d Pending Jan 10, 2024
18406435 START-UP OF STEP-UP POWER CONVERTER WITH SWITCHED-CAPACITOR NETWORK CHEN, PATRICK C 2842 §103 Final Rejection — Pending Jan 08, 2024
18540531 Asymmetric MOSFET Devices MAZUMDER, DIDARUL A 2812 §103 Non-Final OA — Pending Dec 14, 2023

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