DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I (claims 1-9) and Species B (Fig. 3) in the reply filed on 4/22/26 is acknowledged. The traversal is on the ground(s) that technical features of claim 1 are substantially identical to claim 10. This is not found persuasive because despite the similarities, the Examiner has already discussed that the classification, divergent subject matter, and field of search creates a serious burden.
Claim 1 is different from claim 10 because claim 10 adds a printed circuit board. Claim 1 already recites a carrier, and the carrier is mounted to a printed circuit board in claim 10. Claim 1 is a general-purpose packaged device that can be mounted on many different substrates. Therefore, claim 1 has independent utility because it is not limited to use with a printed circuit board (PCB). There is a serious burden in searching different technical fields for the subcombination versus the combination. In addition to the search of claim 1, claim 10 would include a limited search of PCBs. Because claim 10 is limited to PCB-based devices, the Examiner would need to conduct multiple, non-overlapping searches and apply different search strategies. This constitutes a serious search and examination burden.
Applicant also traversed the species requirement on the grounds that no pending claim is directed solely to grooves. In response, since Applicant elected Species B (Fig. 3), no claims can be added or allowed that recite limitations including a groove without holes (e.g., Fig. 1) or holes without grooves (e.g., Fig. 4). If the "holes and grooves" of Figure 3 truly describes the invention at its highest level of abstraction, then the figures with only holes or only grooves are just narrower species. The "holes and grooves" embodiment has a different structure, function, or operation than the "only holes" or “only grooves” embodiments. Evaluating all three versions places a "serious search and/or examination burden" on the Office. The "holes and grooves" embodiment is not a genus because it has additional structural elements (grooves) not present in the holes-only embodiment, meaning it cannot logically be the genus covering the simpler version. The primary reference used in the rejection below shows several different, but patentably indistinct shapes which encompass claims 2-5, 7, 8, which are obvious design choices.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-5, 8, 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2004/0232545 (Takaishi) in view of WO Publication No. 2007/017945 (Ogushi).
Takaishi discloses
1. (Previously Presented) A chip package structure, comprising:
a bare chip carrier 8 / 12 comprising a first side (top);
a bare chip 7 located on the first side (top);
a package body 5 comprising an outer surface and configured to cover the bare chip 7 to package the bare chip 7 on the bare chip carrier 8 / 12; and
a recess structure 22 located on the outer surface, configured to increase a heat dissipation area of the package body 5, and comprising:
at least one groove 22p / 26p / 30p / 34p.
Takaishi fails to disclose
a plurality of holes distributed around the at least one groove.
Ogushi teaches
A chip package structure comprising:
a recess structure 2 comprising:
at least one groove 6;
a plurality of holes 8 distributed around the at least one groove 6.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a plurality of holes around the groove in Takaishi. The motivation would be to improve cooling capacity as taught by Ogushi ([0017]).
Takaishi discloses (Figs. 8 (a)-8(c))
2. (Previously Presented) The chip package structure of claim 1, wherein each groove 26p / 30p / 34p of the least one groove is connected end-to-end and forms a closed pattern.
Takaishi discloses (Fig. 8(a))
3. (Previously Presented) The chip package structure of claim 1, wherein the at least one groove 26p comprises a plurality of grooves distributed concentrically.
Takaishi discloses (Figs. 8 (a)-8(c))
4. (Previously Presented) The chip package structure of claim 2, wherein the at least one groove 26p / 30p / 34p forms at least one of a polygon, a rounded polygon, a circle, or an ellipse.
Takaishi discloses (Figs. 8 (a)-8(c))
5. (Previously Presented) The chip package structure of claim 2, wherein a cross section of the at least one groove 26p / 30p / 34p is in at least one of a rectangular shape, a trapezoidal shape, a semicircular shape, a U shape, or a V shape.
Ogushi teaches ([0016], obvious design choice, see MPEP 2144.04)
8. (Previously Presented) The chip package structure of claim 1, wherein the holes 8 are in at least one of a prism shape, a pyramid shape, a frustum shape, a cylindrical shape, a conical shape, a conical frustum shape, or a hemispherical shape.
Takaishi discloses
9. (Previously Presented) The chip package structure of claim 1, wherein the package body 5 comprises a top surface away from the bare chip carrier 8 / 12, and wherein the recess structure 22 is located on the top surface.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takaishi in view of Ogushi as applied to claim 1 above, and further in view of JP Publication No. 4688526 ( 野口 高 ).
The combination of references fails to teach
7. (Previously Presented) The chip package structure of claim 1, wherein the holes are further distributed in an array.
野口 高 teaches
A chip package structure comprising:
wherein the holes 32 are further distributed in an array.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide a plurality of holes around the groove in the modified device of Takaishi. The motivation would be to improve heat dissipation as taught by 野口 高.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
U.S. Patent Application Publication Nos. 2004/0084764 (Ishimine), 2019/0206763 (Xu), 2020/0152546 (Refai-Ahmed), 2022/0375821 (Liang), U.S. Patent No. 9,859,262 (Patel) teach a chip package structure including a heat sink having a groove and holes.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERESA M ARROYO whose telephone number is (703)756-1576. The examiner can normally be reached Monday - Friday (8:30 A.M. E.T. - 5:00 P.M. E.T.).
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/TERESA M. ARROYO/Primary Examiner, Art Unit 2893
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