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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1, 4-9, 13-17 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Qin (US 10153304 B2) in view of Koezuka (US 20180254352 A1)
Regarding claim 1, Qin discloses (Fig. 1) a thin film transistor, wherein the thin film transistor comprises a gate (11), a source (14), a drain (15), and an active layer (13), wherein the active layer comprises a first oxide layer (131) and a second oxide layer (132) that are stacked, the source and the drain are both disposed at a side of the second oxide layer away from the first oxide layer,
wherein the gate is disposed at a side of the first oxide layer or the second oxide layer (11 on top side of 131, 132), and when the gate is disposed at a side of the first oxide layer away from the second oxide layer, an atomic proportion of an indium element in the first oxide layer is greater than an atomic proportion of an indium element in the second oxide layer; when the gate is disposed at the side of the second oxide layer away from the first oxide layer, the atomic proportion of the indium element in the first oxide layer is less than the atomic proportion of the indium element in the second oxide layer (in this case gate is disposed on side of 132, and col. 4, lines 15-21 disclosing Indium content of 132 being 55-60%, and 131 30-50%, thus making Indium content of 131 less than 132).
Qin is silent regarding the first oxide layer is crystalline oxide layer and the second oxide layer is a lanthanide oxide layer, wherein an atomic proportion of an oxygen element in the first oxide layer gradually increases in the direction away from the gate, and an atomic proportion of an oxygen element in the second oxide layer gradually increases in the direction away from the gate.
Koezuka discloses (Fig. 1B) a thin film transistor (100A) comprising a first and second oxide layers (108a, 108b) and the first oxide layer is crystalline (¶ [0121] detailing the crystallinity of first and second layers) and second layer is a lanthanide oxide layer (¶ [0098]) and both layers have oxygen concentration gradient higher at the side away from the gate (¶ [0164] disclosing “the metal oxide layer 108 has a concentration gradient of oxygen in the thickness direction, and the oxygen concentration becomes higher on the region 106a side in some cases. Furthermore, as described above, in the metal oxide layer 108, the oxygen concentration becomes higher on the insulating layer 114 side in some cases.” 106 side is on the gate side and 114 side is away from the gate; thus, in a second case, oxygen concentration is low on the gate and increasing in the direction away from the gate towards the layer 114). The oxygen concentration gradient in an oxide semiconductor is a key factor in determining the properties and performance of the oxide. It would be predictable for ordinarily skilled artisans to adopt the oxygen concentration gradient concept to oxide semiconductor for better appreciation of the properties and potential applications of oxide semiconductor in various technologies. As such, it would be obvious to one of ordinary skill in the art before the filing date of the invention to adopt the concept of oxygen content gradient in oxide semiconductor as taught by Koezuka to the thin film transistor of Qin for the purpose of maximize potential values and performance of the oxide semiconductor.
Regarding claim 4, Qin in view of Koezuka discloses the thin film transistor of claim 1. Qin further discloses a number of atoms of the indium element in the first oxide layer accounts for 50% to 100% of a number of atoms of a metal element in the first oxide layer, and a proportion of a number of atoms of the oxygen element in the first oxide layer ranges from more than 50%; a number of atoms of the indium element in the second oxide layer accounts for 50% to 100% of a number of atoms of a metal element in the second oxide layer, and a proportion of a number of atoms of the oxygen element in the second oxide layer ranges from more than 50% (Qin: col. 4, lines 15-21 disclosing the first semiconductor is made by IGZO having the atomic ratio In/(Ga+Zn) in a range from 40-50% and the second semiconductor layer is made by IGZO having the atomic ratio In/(Ga+Zn) in a range from 55 to 60%. Note that the gate 11 is on the side of the second semiconductor layer, making it consistent with the fact that the channel closer to the gate is the one with higher content of Indium. Also note that in the range of 40-50% of Indium, the stoichiometry ratio of IGZO is around 3:1:2:8 which also yields oxygen atomic ratio greater than 50%. Similarly, Indium content ratio of 55-60% of the IGZO would yield the stoichiometry ratio of IGZO to be around 5:1:3:12 and oxygen atomic ratio greater than 50%).
Regarding claim 5, Qin in view of Koezuka discloses the transistor of claim 1. Hu further discloses “… A mass percentage of the lanthanide element in the active layer is greater than or equal to 0.5%, and is less than or equal to 10%. In the range, the lanthanide element diffused into the active layer may improve the light stability of the active layer” (see Hu: ¶ [0137]). This range can apply to the range of lanthanide range of 0.05% to 3%.
Regarding claim 6, Qin in view of Koezuka discloses the transistor of claim 1. Qin further discloses a first auxiliary layer (buffer 16, Fig. 1can be construed as the first auxiliary layer) provided corresponding to the active layer, wherein the first auxiliary layer is disposed at the side of the first oxide layer away from the second oxide layer (col. 3, line 53 disclosing buffer layer 16 at a side of the first oxide layer; this buffer layer can be construed as the first auxiliary layer).
Regarding claim 7, Qin in view of Koezuka discloses the transistor of claim 1. Qin further a second auxiliary layer (19, Fig. 1), wherein the second auxiliary layer is disposed at the side of the second oxide layer away from the first oxide layer (Qin: col. 2, lines 27-32 disclosing “… the source electrode connects to the source connection portion via the through hole configured within the insulation dielectric layer, and the drain electrode connects to the drain connection portion via the through hole configured within the insulation dielectric layer …”. The mentioned-above dielectric layer is construed as the second auxiliary layer).
Regarding claim 8, Qin in view of Koezuka discloses the transistor of claim 7. Qin further discloses (col. 2, lines 27-32) the second auxiliary layer (19, Fig. 1) comprises an insulating portion (where no via hole present) and conductor portions (where via holes present) located at both sides of the insulating portion (source/drain electrodes present at the end of oxide channel, as which isolation layer lays along such that end of oxide channel matching end of isolation layer), and the conductor portions are provided corresponding to the source and the drain respectively (the two ends of active layers are realized as the connection pads where via holes penetrating the insulation layer connecting the pads to the source and drain electrodes).
Regarding claim 9, Qin discloses (Fig. 2) an array substrate (2) comprising a thin film transistor (TFT), wherein the thin film transistor comprises a gate (11), a source (14), a drain (15), and an active layer (13),
wherein the active layer comprises a first oxide layer (131) and a second oxide layer (132) that are stacked, the source and the drain are both disposed at a side of the second oxide layer away from the first oxide layer (14, 15 at one side of 132); and
wherein the gate is disposed at a side of the first oxide layer or the second oxide layer (11 on top side of 131, 132), and when the gate is disposed at a side of the first oxide layer away from the second oxide layer, an atomic proportion of an indium element in the first oxide layer is greater than an atomic proportion of an indium element in the second oxide layer; when the gate is disposed at the side of the second oxide layer away from the first oxide layer, the atomic proportion of the indium element in the first oxide layer is less than the atomic proportion of the indium element in the second oxide layer (in this case gate is disposed on side of 132, and col. 4, lines 15-21 disclosing Indium content of 132 being 55-60%, and 131 30-50%; thus making 131 Indium content is less than 132).
Qin is silent regarding the first oxide layer is crystalline oxide layer and the second oxide layer is a lanthanide oxide layer, wherein an atomic proportion of an oxygen element in the first oxide layer gradually increases in the direction away from the gate, and an atomic proportion of an oxygen element in the second oxide layer gradually increases in the direction away from the gate.
Koezuka discloses (Fig. 1B) a thin film transistor (100A) comprising a first and second oxide layers (108a, 108b) and the first oxide layer is crystalline (¶ [0121] detailing the crystallinity of first and second layers) and second layer is a lanthanide oxide layer (¶ [0098]) and both layers have oxygen concentration gradient higher at the side away from the gate (¶ [0164] disclosing “the metal oxide layer 108 has a concentration gradient of oxygen in the thickness direction, and the oxygen concentration becomes higher on the region 106a side in some cases. Furthermore, as described above, in the metal oxide layer 108, the oxygen concentration becomes higher on the insulating layer 114 side in some cases.” 106 side is on the gate side and 114 side is away from the gate; thus, in a second case, oxygen concentration is low on the gate and increasing in the direction away from the gate towards the layer 114). The oxygen concentration gradient in an oxide semiconductor is a key factor in determining the properties and performance of the oxide. It would be predictable for ordinarily skilled artisans to adopt the oxygen concentration gradient concept to oxide semiconductor for better appreciation of the properties and potential applications of oxide semiconductor in various technologies. As such, it would be obvious to one of ordinary skill in the art before the filing date of the invention to adopt the concept of oxygen content gradient in oxide semiconductor as taught by Koezuka to the thin film transistor of Qin for the purpose of maximize potential values and performance of the oxide semiconductor.
Regarding claim 13, Qin in view of Koezuka discloses the transistor of claim 9. Hu further discloses “… A mass percentage of the lanthanide element in the active layer is greater than or equal to 0.5%, and is less than or equal to 10%. In the range, the lanthanide element diffused into the active layer may improve the light stability of the active layer” (see Hu: ¶ [0137]). This range can apply to the range of lanthanide range of 0.05% to 3%).
Regarding claim 14, Qin in view of Koezuka discloses the transistor of claim 9. Qin further discloses a first auxiliary layer (buffer 16, Fig. 1 can be construed as the first auxiliary layer) provided corresponding to the active layer, wherein the first auxiliary layer is disposed at the side of the first oxide layer away from the second oxide layer (col. 3, lines 50-52 disclosing buffer layer 16 at a side of the first oxide layer; this buffer layer can be construed as the first auxiliary layer).
Regarding claim 15, Qin in view of Koezuka discloses the transistor of claim 9. Qin further discloses a second auxiliary layer (19, Fig. 1), wherein the second auxiliary layer is disposed at the side of the second oxide layer away from the first oxide layer. (Qin: col. 2, lines 27-32 disclosing “… the source electrode connects to the source connection portion via the through hole configured within the insulation dielectric layer, and the drain electrode connects to the drain connection portion via the through hole configured within the insulation dielectric layer …”. The mentioned-above dielectric layer is construed as the second auxiliary layer).
Regarding claim 16, Qin in view of Koezuka discloses the transistor of claim 9. Qin further discloses (col. 2, lines 27-32) the second auxiliary layer (19, Fig. 1) comprises an insulating portion (where no via hole present) and conductor portions (where via holes present) located at both sides of the insulating portion (source/drain electrodes present at the end of oxide channel, as which isolation layer lays along such that end of oxide channel matching end of isolation layer), and the conductor portions are provided corresponding to the source and the drain respectively (the two ends of active layers are realized as the connection pads where via holes penetrating the insulation layer connecting the pads to the source and drain electrodes).
Regarding claim 17, Qin in view of Koezuka discloses the array substrate of claim 9. Koezuka further discloses (Fig. 15A, ¶ [0359] a second substrate 705 facing a first substrate 701 and sealant 712 seals pixel portion 702, source/drain circuit 704, and gate driver circuit 706 together between first and second substrates. The second substrate provides support to the pixel components to secure the delicate structures from external factors such as moisture, movement, etc. for better performance. Such one of ordinary skill in the art before the filing date of the invention would have added the second substrate taught by Koezuka to the display panel formed by the modified array substrate of Qin to enhance the display device performance through a secured and protected pixel structure.
Claims 2, 10 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Qin (US 10153304 B2) in view of Koezuka (US 20180254352 A1) and Chang (US 20130256666 A1).
Regarding claim 2, Qin in view of Koezuka discloses the thin film transistor of claim 1. Qin modified by Koezuka is silent to the atomic proportion of the indium element in the first oxide layer gradually decreasing in a direction away from the gate, and the atomic proportion of the indium element in the second oxide layer gradually decreases in the direction away from the gate.
Chang discloses (Figs. 6A-B) the first oxide layer 142B and the second oxide layer 144B wherein the gate is at a side of the first oxide layer 142B and the first oxide layer has greater Indium content than the second oxide layer 144B (see Chang: ¶ [0057]). Notes that the first and second oxide layers in Chang’s are in reverse order with the oxide layers of Qin and Hu, but the concept is consistent wherein the layer that is closer to the gate is the one with greater Indium content. Chang further discloses the atomic proportion of the indium element in the first oxide layer gradually decreases in a direction away from the gate, and the atomic proportion of the indium element in the second oxide layer gradually decreases in the direction away from the gate (Chang: Figs. 6A-B and ¶ [0059] disclosing “… the metal content of the oxide channel layer 140B' is gradually reduced from the first region A1 adjacent to the gate 120 to the second region A2 adjacent to the source 152A and the drain 154A”).
Qin in view of Koezuka discloses the two oxide layers stacked on each other and the layer that is on the gate side has greater Indium content than the other. Chang discloses the two oxide layers of the thin film transistor comprising two layers and the layer at the gate side has greater Indium content. Chang further discloses the gradient of Indium content diffused into the two layer is gradually reduced away from the gate to have desirable carrier mobility on the on-current of the thin film transistor (see Chang: ¶ [0060]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention, to have modified the active layers design of Qin modified by Koezuka to the active layers design of Chang for the purpose of controlling the Indium content at desired location to have desirable carrier mobility on the on-current of the thin film transistor (see Chang: ¶ [0060]).
Regarding claim 10, Qin in view Koezuka discloses the thin film transistor of claim 9. Qin modified by Koezuka is silent to the atomic proportion of the indium element in the first oxide layer gradually decreasing in a direction away from the gate, and the atomic proportion of the indium element in the second oxide layer gradually decreases in the direction away from the gate.
Chang discloses (Figs. 6A-B) the first oxide layer 142B and the second oxide layer 144B wherein the gate is at a side of the first oxide layer 142B and the first oxide layer has greater Indium content than the second oxide layer 144B (see Chang: ¶ [0057]). Notes that the first and second oxide layers in Chang’s are in reverse order with the oxide layers of Qin and Hu, but the concept is consistent wherein the layer that is closer to the gate is the one with greater Indium content. Chang further discloses the atomic proportion of the indium element in the first oxide layer gradually decreases in a direction away from the gate, and the atomic proportion of the indium element in the second oxide layer gradually decreases in the direction away from the gate (Chang: Figs. 6A-B and ¶ [0059] disclosing “… the metal content of the oxide channel layer 140B' is gradually reduced from the first region A1 adjacent to the gate 120 to the second region A2 adjacent to the source 152A and the drain 154A”).
Qin in view of Hu, Yamazaki and Koezuka discloses the two oxide layers stacked on each other and the layer that is on the gate side has greater Indium content than the other. Chang discloses the two oxide layers of the thin film transistor comprising two layers and the layer at the gate side has greater Indium content. Chang further discloses the gradient of Indium content diffused into the two layer is gradually reduced away from the gate to have desirable carrier mobility on the on-current of the thin film transistor (see Chang: ¶ [0060]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention, to have modified the active layers design of Qin and Hu to the active layers design of Chang for the purpose of controlling the Indium content at desired location to have desirable carrier mobility on the on-current of the thin film transistor (see Chang: ¶ [0060]).
Prior art made of record and not relied upon are considered pertinent to current application disclosure.
Jeong (US 8058645 B2), Park (US 20200203534 A1), Yamazaki (US 12068198 B2), disclose a thin film transistor wherein the active layers are stacked and the Indium content of the layer closer to the gate is greater than the other layer.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DZUNG T HOANG whose telephone number is (571)272-5622. The examiner can normally be reached M-F 8:00 - 5:00.
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/DTH/Examiner, Art Unit 2898
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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