DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I and Species I in the reply filed on February 11th, 2026 is acknowledged. By virtue of this election, claims 1-6 and 12-16 are currently presented in the instant application. Claims 7-11 and 17-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cheah et al. (US 2008/0048342 A1; hereinafter Cheah).
With respect to claim 1, Cheah teaches an electronic device in at least Figs. 6-8 and 15, comprising:
a package structure 58 having opposite longitudinal ends (top and bottom in Fig. 6) spaced apart from one another along a first direction (up and down in Fig. 6), opposite lateral sides (left and right in Fig. 6) spaced apart from one another along a second direction (left and right in Fig. 6) that is orthogonal to the first direction (up and down in Fig. 6), a middle portion (middle between top and bottom in Fig. 6) midway between the longitudinal ends, a first portion (portion closer to top in Fig. 6) that extends between the middle portion and one of the longitudinal ends, and a second portion (portion closer to bottom in Fig. 6) that extends between the middle portion and the other one of the longitudinal ends (see Figs. 6-8 and 15 and paragraphs 9, 40, 51);
conductive leads (38’, 50’, 52’, 66’) partially exposed outside the respective lateral sides of the package structure 58 (see Figs. 6-8 and 15, and paragraphs 37-43);
first 30 and 42 second semiconductor dies having respective first (of 30) and second (of 42) electronic components (see Figs. 6-8 and 15, and paragraphs 37-39); and
a metal clip 56’ that extends in the package structure 58 from the first portion (portion closer to top in Fig. 6) to the second portion (portion closer to bottom in Fig. 6) through the middle portion and electrically couples the first electronic component (of 30) of the first semiconductor die 30 to the second electronic component (of 42) of the second semiconductor die 42 (see Figs. 6-8 and 15, and paragraphs 40-42).
With respect to claim 2, Cheah teaches the electronic device of claim 1, wherein the package structure 58 encloses the metal clip 56’, the first 30 and second 42 semiconductor dies, and portions of the conductive leads (38’, 50’, 52’, 66’) (see Figs. 3-8 and 15 and paragraphs 9, 37-43, 51).
With respect to claim 6, Cheah teaches the electronic device of claim 1, wherein: the first electronic component (of 30) of the first semiconductor die 30 is a first transistor (power MOSFET 30); the second electronic component (of 42) of the second semiconductor die 42 is a second transistor (flip-chip MOSFET 42); and the metal clip 56’ electrically couples a source 32 of the first transistor (power MOSFET 30) to a drain 44 of the second transistor (flip-chip MOSFET 42) to form a switching node of a half bridge circuit (see Figs. 6-8 and 15 and paragraphs 37-39, 41).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-5, and 12-16 are rejected under 35 U.S.C. 103 as being unpatentable over Cheah et al. (US 2008/0048342 A1; hereinafter Cheah) in view of Kessler et al. (US 2022/0254696 A1; hereinafter Kessler).
With respect to claim 3, Cheah discloses the electronic device of claim 1.
Cheah does not disclose wherein the package structure has an opening that extends into the middle portion along a third direction that is orthogonal to the first and second directions.
Kessler discloses an electronic device in at least Figs. 1-8 wherein a package structure 112 has an opening that extends into a middle portion along a third direction (stacking direction) that is orthogonal to first and second directions (see Fig. 1-8 and paragraphs 90, 101, 102; note 106 exposed through 112).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the package structure of Cheah would have an opening that extends into the middle portion along a third direction that is orthogonal to the first and second directions as taught by Kessler so a surface portion of the clip is exposed with respect to the encapsulant. This may allow to electrically couple the electrically conductive clip with an electronic periphery of the package or with a further component of the package, for instance by soldering or sintering. Additionally or alternatively, exposing a clip surface may promote the heat removal capability of the package, since such an exposed surface may efficiently guide heat out of the package towards an exterior. As a consequence, the thermal performance of the package may be significantly improved (see Kessler: paragraph 39).
With respect to claim 4, the combination of Cheah and Kessler discloses the electronic device of claim 3, wherein the metal clip 106 extends through the middle portion around two opposite sides of the opening (see Kessler: Figs. 1-8 and paragraphs 90, 101, 102; 106 around two opposite sides of opening in 112).
With respect to claim 5, the combination of Cheah and Kessler discloses the electronic device of claim 3, wherein: the first semiconductor die 30 is attached to a first die attach pad 38’ in the first portion (portion closer to top in Fig. 6 of Cheah); the second semiconductor die 42 is attached to a second die attach pad 50’ in the second portion (portion closer to bottom in Fig. 6 of Cheah); and portions of the first and second die attach pads (38’ and 50’) are exposed in the opening of the package structure (see Cheah: Figs. 6-8 and 15, and paragraphs 37-43, 51; 38’ and 50’ would be exposed by through hole 90. Also see Kessler: Figs. 1-8 and paragraphs 90, 101, 102.).
With respect to claim 12, Cheah teaches a system in Figs. 6-8 and 15, comprising:
a circuit board (circuit board) (see Figs. 6-8 and paragraphs 37, 38); and
an electronic device attached to the circuit board (circuit board) (see Figs. 6-8 and paragraphs 37, 38) and comprising:
a package structure 58 having opposite longitudinal ends (top and bottom in Fig. 6) spaced apart from one another along a first direction (up and down in Fig. 6), opposite lateral sides (left and right in Fig. 6) spaced apart from one another along a second direction (left and right in Fig. 6) that is orthogonal to the first direction (up and down in Fig. 6), a middle portion (middle between top and bottom in Fig. 6) midway between the longitudinal ends, a first portion (portion closer to top in Fig. 6) that extends between the middle portion and one of the longitudinal ends, and a second portion (portion closer to bottom in Fig. 6) that extends between the middle portion and the other one of the longitudinal ends (see Figs. 6-8 and 15 and paragraphs 9, 40, 51);
conductive leads (38’, 50’, 52’, 66’) partially exposed outside the respective lateral sides of the package structure 58 (see Figs. 6-8 and 15, and paragraphs 37-43);
first 30 and second 42 semiconductor dies having respective first (of 30) and second (of 42) electronic components (see Figs. 6-8 and 15, and paragraphs 37-39); and
a metal clip 56’ that extends in the package structure 58 from the first portion (portion closer to top in Fig. 6) to the second portion (portion closer to bottom in Fig. 6) through the middle portion and electrically couples the first electronic component (of 30) of the first semiconductor die 30 to the second electronic component (of 42) of the second semiconductor die 42 (see Figs. 6-8 and 15, and paragraphs 40-42).
Cheah does not explicitly disclose wherein the conductive leads are soldered to conductive features of the circuit board.
Kessler discloses a similar system in at least Figs. 1-8 wherein conductive leads (of 102) are soldered to conductive features of a circuit board 132 (see Figs. 1-8 and paragraphs 32, 56, 59, 85, 91, 92).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the conductive leads of Cheah would be soldered to conductive features of the circuit board as taught by Kessler because it is well known in the art that such an electric connection between mounting base and package may be established by a connection medium, such as a solder or sinter material (see Kessler: paragraph 32. Also see MPEP 2144 I).
With respect to claim 13, the combination of Cheah and Kessler discloses the system of claim 12, wherein the package structure 112 has an opening that extends into the middle portion along a third direction (stacking direction) that is orthogonal to the first and second directions (see Fig. 1-8 and paragraphs 90, 101, 102; note 106 exposed through 112).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the package structure of Cheah would have an opening that extends into the middle portion along a third direction that is orthogonal to the first and second directions as taught by Kessler so a surface portion of the clip is exposed with respect to the encapsulant. This may allow to electrically couple the electrically conductive clip with an electronic periphery of the package or with a further component of the package, for instance by soldering or sintering. Additionally or alternatively, exposing a clip surface may promote the heat removal capability of the package, since such an exposed surface may efficiently guide heat out of the package towards an exterior. As a consequence, the thermal performance of the package may be significantly improved (see Kessler: paragraph 39).
With respect to claim 14, the combination of Cheah and Kessler discloses the system of claim 13, wherein the metal clip 106 extends through the middle portion around two opposite sides of the opening (see Kessler: Figs. 1-8 and paragraphs 90, 101, 102; 106 around two opposite sides of opening in 112).
With respect to claim 15, the combination of Cheah and Kessler discloses the system of claim 13, wherein: the first semiconductor die 30 is attached to a first die attach pad 38’ in the first portion (portion closer to top in Fig. 6 of Cheah); the second semiconductor die 42 is attached to a second die attach pad 50’ in the second portion (portion closer to bottom in Fig. 6 of Cheah); and portions of the first and second die attach pads (38’ and 50’) are exposed in the opening of the package structure (see Cheah: Figs. 6-8 and 15, and paragraphs 37-43, 51; 38’ and 50’ would be exposed by through hole 90. Also see Kessler: Figs. 1-8 and paragraphs 90, 101, 102.).
With respect to claim 16, the combination of Cheah and Kessler discloses the system of claim 12, wherein: the first electronic component (of 30) of the first semiconductor die 30 is a first transistor (power MOSFET 30); the second electronic component (of 42) of the second semiconductor die 42 is a second transistor (flip-chip MOSFET 42); and the metal clip 56’ electrically couples a source 32 of the first transistor (power MOSFET 30) to a drain 44 of the second transistor (flip-chip MOSFET) to form a switching node of a half bridge circuit (see Cheah: Figs. 6-8 and 15 and paragraphs 37-39, 41).
Citation of Pertinent Prior Art
The following prior art made of record and not relied upon is considered pertinent to applicant's disclosure because each reference teaches an electronic device similar to that of the claimed invention: US 20130003309 A1 and US 20190074243 A1.
Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORDAN M KLEIN whose telephone number is (571)270-7544. The examiner can normally be reached 9:00 am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.M.K/Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
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