DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/06/2026 has been entered.
Response to Arguments
Applicant’s arguments, see pages 5-7, filed 08/06/2026, with respect to the rejection(s) of claim(s) 1-6 under 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made using Choi (US 20110241562 A1) in view of Kawaura (US 20130076994 A1).
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/20/2026 was filed after the mailing date of the final rejection on 05/06/2026. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-6, 8, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 20110241562 A1) in view of Kawaura (US 20130076994 A1).
Regarding claim 1, Choi discloses a display device comprising:
a base (111) having a display area (100) and a surrounding area (110) outside the display area; (Fig. 1)
a first insulating layer (IL1) arranged on the base (111); ([0062], Fig. 2)
a first electrode (710) arranged on the first insulating layer (IL1) overlapping with a pixel (70 included in the display area (left side of the figure break in 101); ([0023], [0057], Fig. 1-2)
a second insulating layer (IL2) arranged on the first insulating layer (IL1) and including an aperture overlapping with the first electrode (710); ([0062], Fig. 2)
a first spacer (IL3 annotated below) partially arranged on the second insulating layer (IL2) overlapping with the display area (left side of the figure break in 101); (Fig. 2)
a partition (SP) arranged on the second insulating layer (IL2) and the first spacer (IL3) so as to separate the pixel (70); (Fig. 2)
an organic layer (720) in contact with the first electrode (710) through the aperture; ([0058], Fig. 2)
a second electrode (730) arranged on the organic layer (720); ([0058], Fig. 2)
a second spacer (another IL3 annotated below) partially arranged on the second insulating layer (IL2) overlapping with the surrounding area (right side of figure break in 101); (Fig. 2) and
a support member (annotated below) arranged on the second spacer (another IL3) and corresponding to the partition (SP). (Fig. 2)
a metal layer (735) arranged on the first insulating layer (IL1) in the surrounding area (right side of figure break in 101); ([0063], Fig. 2) and
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Choi does not disclose:
a shield member arranged in the surrounding area, wherein
the metal layer includes a plurality of hole portions, and
the shield member is arranged on the second insulating layer at a position overlapping with one of the plurality of hole portions.
However, Kawaura discloses:
a shield member (25C) arranged in the surrounding area (20), ([0036], Fig. 2) wherein
the metal layer (23) includes a plurality of hole portions (25Z), ([0035], Fig. 2) and
the shield member (25C) is arranged on the second insulating layer (24) at a position overlapping with one of the plurality of hole portions (25Z). (Fig. 2)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Choi and Kawaura to arrive at the claimed invention in order to “prevent light from entering the drive circuit” ([0035]) so that “probability of short circuit is allowed to be further decreased.” ([0059])
Regarding claim 2, Choi discloses the display device of claim 1. Choi does not disclose wherein
a height of the second spacer and the support member is substantially the same as a height of the first spacer and the partition.
However, it would be obvious to one skilled in the art before the effective filing date to use the teachings of Choi since such a modification would have involved a mere change in the size of component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). See MPEP 2144.04.
Regarding claim 3, Choi discloses the display device of claim 1, wherein
a plurality of first spacers (IL3 annotated above) are arranged at regular intervals on the second insulating layer (IL2) overlapping with the display area (left side of figure break in 101), and
a plurality of second spacers (another IL3 annotated above) are arranged at regular intervals on the second insulating layer (IL2) overlapping with the surrounding area (right side of figure break in 101). (Fig. 2)
Regarding claim 4, Choi discloses the display device of claim 3, wherein
the intervals at which the second spacers (another IL3 annotated above) are arranged on the second insulating layer (IL2) are substantially the same to the intervals at which the first spacers (IL3 annotated above) are arranged on the second insulating layer (IL2). (Fig. 2)
Regarding claim 5, Choi discloses the display device of claim 1, wherein
the first spacer (IL3 annotated above) and the second spacer (another IL3 annotated above) are formed of the same material (insulating material) as the second insulating layer (IL2). (Fig. 2)
Regarding claim 6, Choi discloses the display device of claim 1, wherein
the partition (SP) has a shape in which a width of an upper portion is larger than a width of a lower portion. (Fig. 2)
Regarding claim 8, Choi discloses the display device of claim 1, wherein the metal layer (735) is arranged on the same layer as the first electrode (710). ([0063], Fig. 2)
Regarding claim 9, Kawaura discloses the display device of claim 1, wherein a plurality of shield members (25b/25c) respectively cover, in a plan view, a plurality of the hole portions (25z). (Fig. 4B)
It would have been obvious to one skilled in the art before the effective filing date to use the teachings of Kawaura for similar reasons mentioned above.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Kawaura (US 20130076994 A1) as applied to claim 9 above, and further in view of Ma et al. (US 10756136 B1).
Regarding claim 10, Kawaura discloses the display device of claim 9. Kawaura does not disclose wherein the plurality of shield members are connected to each other.
However, Ma discloses:
the plurality of shield members (303) are connected to each other (by 30). (Note per Ma’s disclosure, “Alternatively, in other embodiments, the light-blocking layer forms a mesh to cover the first display area and the second display area to form the power voltage trace of the whole display panel,” col. 6, lines 45-50, Fig. 8)
It would have been obvious to one skilled in the art before the effective filing date to combine the teachings of Kawaura and Ma for the plurality of shield members are connected to each other to reduce “the trace width of the second display area” (col. 6, lines 45-50)
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASHLEY BLACKWELL whose telephone number is (703)756-1508. The examiner can normally be reached Mon-Fri 8:00-1600.
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/ASHLEY NICOLE BLACKWELL/Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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