DETAILED ACTION
General Remarks
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR
1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/12/2026 has been entered.
Response to Amendment
The Amendment filed on 08/12/2026 has been entered. Applicant's amendment have
overcome the Claims 112 (b) rejections previously set forth in the Final Office Action dated 06/12/2026. Claims 5-10, 12, 20 and 27 are canceled.
Response to Arguments
Applicant's arguments "Applicant Arguments/Remarks Made in an Amendment" with the
"Amendment/Req. Reconsideration-After Final Reject" filed on 08/12/2026, have been fully considered.
However, the Applicant’s arguments in relation to “Chang is not structured to be directly bonded to another pad 20; rather, it is connected to an upper wiring layer via a through-electrode of wiring layer… … Chang provides no suggestion or motivation whatsoever to adjust the side inclination of pads directly bonded to the specific numerical range as set forth in amended claim 1…Chang does not describe a pad-to-pad bonding structure, but only a wiring layer connection structure via through-electrodes of the wiring layer on a pad…” are not persuasives. Hwang (US 20200135699 A1) describes the application’s structure having a pad-to-pad bonding structure, Hwang does not describe pads having inclined surfaces and facing each other and inclined at a first obtuse angle and a second obtuse angle with respect to the second surface and wherein at least one the first or the second obtuse angles is about 100° and less than or equal to 130°. However, Watanabe (US 20210280545 A1) describes pads with inclined surfaces (having obtuse angle showed in Fig. 1) and Chang (US 20210210423 A1) describes a pad having an obtuse angle in [0047], to reduce the whole thickness of the semiconductor package ([0002], Chang). In summarized Watanabe and Chang are only applied to show that Hwang’s pads can have inclined surfaces having obtuse angles. Applicant’s amendments are moot in view of new ground of rejections using new references US 20210366855 A1 to Okina and US 20200161277 A1 to Lee, see rejection below.
Claim Objections
Claim 17 is objected to because of the following informalities: “…a first through-electrode
extending through the first substrate…”. According to claim 14, it should be read “…the through-electrode extending through the first substrate …”.
Claim Rejections - 35 USC § 103
The following is a quotation of AIA 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 11, 13-17,21 and 26 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hwang et al. (US 20200135699 A1, of the record) in view of Okina (US 20210366855 A1, hereinafter Okina).
Re: Independent Claim 1, Hwang discloses a semiconductor package (Fig. 1) comprising:
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Hwang’s Figure 2-Annotated.
a first semiconductor chip (100A semiconductor chip in [0021], Figs. 1,2) including a first substrate (110-bottom a semiconductor substrate in [0021], Figs. 1,2-Annotated), a first pad (154 a bonding pad in [0021], Figs. 1,2) on the first substrate (110-bottom), a through-electrode (130 through-electrodes in [0023], Figs. 1, 2, Hwang) extending through (Figs. 1, 2, Hwang) the first substrate (110-bottom, Fig. 2, Hwang) and connected to the first pad (154, Fig. 2, Hwang), a first insulating layer (164b an insulation layer in [0029], Figs. 1,2) at least partially surrounding (Figs. 1,2) the first pad (154) on the first substrate (110-bottom); and a buffer film (164a an insulation layer in [0029], Figs. 1,2) between the first insulating layer (164b Figs. 1,2) and the first substrate (110-bottom);
a second semiconductor chip (100B semiconductor chip in [0021], Figs. 1,2) on the first semiconductor chip (100A), and including a second substrate (110-top a semiconductor substrate in [0021], Figs. 1,2-Annotated), a second pad (152 a connection pad in [0021], Figs. 1,2) below the second substrate (110-top) and contacting (Figs. 1,2) the first pad (154), a second insulating layer (162 an insulation layer in [0028], Figs. 1,2) at least partially surrounding (Figs. 1,2) the second pad (152) and contacting (Figs. 1,2) the first insulating layer (164b), and a wiring layer (140 wiring structure in [0022], Fig. 2) disposed between the second substrate (110-top) and the second insulating layer (162) and connected to the second pad (152),
wherein the first pad (154) includes a first surface (first surface-154 top surface of pad 154, Fig. 2-Annotated) contacting the second pad (152) and a second surface (second surface-154 bottom surface of pad 154, Fig. 2-Annotated) opposite (Fig. 2-Annotated) the first surface (first surface-154), wherein an upper surface of the buffer film (164a) is at a same level as an upper surface of the through-electrode (130).
Hwang does not expressly disclose inclined side surfaces between the first surface and the second surface, wherein the inclined side surfaces include a first side surface and a second side surface, facing each other and inclined at a first obtuse angle and a second obtuse angle with respect to the second surface, respectively, and wherein at least one the first and the second obtuse angles is in a range of 100° to 130°.
However, in the same semiconductor device field of endeavor, Okina discloses inclined side surfaces (788-side-L and 788-side-R an inclined side surface of pad 788 at left side and right side, wherein 788 includes 788A pad liner layer and 788B a metal film in [0088], Figs. 4A,6A-Annotated) between the first surface (first surface top surface of pad 788 in [0088], Fig. 4A,6A-Annotated) and the second surface (second surface bottom surface of pad 788 in [0088], Fig. 4A,6A-Annotated), wherein the inclined side surfaces (788-side-L and 788-side-R, Figs. 4A,6A) include a first side surface (788-side-L) and a second side surface (788-side-R), facing each other (Figs. 4A,6A) and inclined at a first angle (788-angle-L, an angle formed between the second surface and the inclined surface, Figs. 4A,6A-Annotated) and a second angle (788-angle-R, an angle formed between the second surface and the inclined surface, Figs. 4A,6A-Annotated) with respect to the second surface (second surface, Figs. 4A,6A-Annotated), respectively, and wherein at least one the first and the second obtuse angles is in a range of 100° to 130° (sidewalls of 788 may have a taper angle in a range from 3 degrees to 10 degrees with respect to the vertical direction then 788-angle-L and 788-angle-R correspond to 90-120 degree in [0062]).
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Okina’s Figure 6A-Annotated.
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Okina’s feature of inclined side surfaces between the first surface and the second surface, wherein the inclined side surfaces include a first side surface and a second side surface, facing each other and inclined at a first angle and a second angle with respect to the second surface, respectively and wherein at least one the first and the second obtuse angles is in a range of 100° to 130° to Hwang’s device in order to have the predictable result of providing an edge seal structure that more effectively blocks diffusion of moisture and/or contaminants without significantly weakening the bonding strength at edges of the bonded assembly ([0030], Okina).
Re: Claim 2, Hwang modified by Okina discloses the semiconductor package of claim 1, wherein the second pad (152, Hwang) comprises: a third surface (third surface-152 bottom surface of pad 152, Fig. 2-Annotated, Hwang) contacting the first pad (154, Hwang); a fourth surface (fourth surface-152 top surface of pad 152, Fig. 2-Annotated, Hwang) opposite the third surface (third surface-152, Hwang).
Hwang modified by Okina does not expressly disclose an inclined side surface between the third surface and the fourth surface, wherein the inclined side surface includes a third side surface and a fourth side surface, facing each other and inclined at a third obtuse angle and a fourth obtuse angle with respect to the fourth surface, respectively, and each of the third and fourth obtuse angles is in a range of 100° to about 130°.
However, in the same semiconductor device field of endeavor, Okina discloses an inclined side surface (988-side-L and 988-side-R an inclined side surface of pad 988 at left side and right side, wherein 988 includes 988A pad liner layer and 988B a metal film in [0066], Figs. 3A,6A-Annotated) between the third surface (third surface bottom surface of pad 988 in [0066], Fig. 6A-Annotated) and the fourth surface (fourth surface top surface of pad 988 in [0066], Fig. 6A-Annotated), wherein the inclined side surface (988-side-L and 988-side-R) includes a third side surface (988-side-L an inclined side surface of pad 988 at left side, in [0066], Fig. 6A-Annotated) and a fourth side surface (988-side-R an inclined side surface of pad 988 at right side, in [0066], Fig. 6A-Annotated), facing each other (Fig. 6A-Annotated) and inclined at a third angle (988-angle-L, an angle formed between the surface and the inclined surface, Fig. 6A-Annotated) and a fourth angle (988-angle-R, an angle formed between the surface and the inclined surface Fig. 6A-Annotated) with respect to the fourth surface (fourth surface Fig. 6A-Annotated), respectively and each of the third and fourth obtuse angles is in a range of 100° to about 130° (sidewalls of 988 may have a taper angle in a range from 3 degrees to 10 degrees with respect to the vertical direction then 988-angle-L and 988-angle-R correspond to 90-120 degree in [0062]).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Okina’s feature of an inclined side surface between the third surface and the fourth surface, wherein the inclined side surface includes a third side surface and a fourth side surface, facing each other and inclined at a third angle and a fourth angle with respect to the fourth surface, respectively and each of the third and fourth obtuse angles is in a range of 100° to about 130° to the combination of Hwang and Okina in order to have the predictable result of providing an edge seal structure that more effectively blocks diffusion of moisture and/or contaminants without significantly weakening the bonding strength at edges of the bonded assembly ([0030], Okina).
Re: Claim 3, Hwang modified by Okina discloses the semiconductor package of claim 1,
Hwang modified by Okina does not disclose wherein the first and second obtuse angles are different from each other.
However, the Applicant has not presented persuasive evidence that the claimed
“first and second obtuse angles different from each other” is for a particular purpose that is critical to the overall claimed invention (i.e. the invention would not work without the specific claimed first and second obtuse angles different from each other). Also, the applicant has not shown that the claimed “difference of the claimed first and second obtuse angles” produces a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. At meantime, Okina discloses “first angle and the second angle are in a range of 90-120 degree in [0062]” in Fig. 6A, therefore, the obtuse angles are a result effective variable. It has been held that is not inventive to discover the optimum first and second obtuse angles by routine experimentation (MPEP 2144.05 II).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add first and second obtuse angles different from each other to the rest of the claimed invention to improve the bonding characteristics of the device.
Re: Claim 4, Hwang modified by Okina discloses the semiconductor package of claim 2,
Hwang modified by Okina does not disclose wherein the third and fourth obtuse angles are different from each other.
However, the Applicant has not presented persuasive evidence that the claimed
“third and fourth obtuse angles different from each other” is for a particular purpose that is critical to the overall claimed invention (i.e. the invention would not work without the specific claimed third and fourth obtuse angles different from each other). Also, the applicant has not shown that the claimed “difference of the claimed third and fourth obtuse angles” produces a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. At meantime, Okina discloses “first angle and the second angle are in a range of 90-120 degree in [0062]” in Fig. 6A, therefore, the obtuse angles are a result effective variable. It has been held that is not inventive to discover the optimum third and fourth obtuse angles by routine experimentation (MPEP 2144.05 II).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add third and fourth obtuse angles different from each other to the rest of the claimed invention to improve the bonding characteristics of the device.
Re: Claim 11, Hwang modified by Okina discloses the semiconductor package of claim 1, wherein the first pad (154, Fig. 2, Hwang) comprises a first conductive layer (154 made of copper in [0026], Fig. 2, Hwang) and a first barrier layer (788A barrier layer from Okina applied to 154’s Hwang) surrounding (Fig. 6A, Okina) a side surface of the first conductive layer (154, Fig. 2, Hwang), and wherein the second pad (152, Fig. 2, Hwang) comprises a second conductive layer (152 made of copper in [0026], Fig. 2, Hwang) contacting (Fig. 2, Hwang) at least a portion of the first conductive layer (154, Fig. 2, Hwang).
Hwang modified by Okina does not expressly disclose a second barrier layer surrounding a side surface of the second conductive layer.
However, in the same semiconductor device field of endeavor, Okina discloses a second barrier layer (988A barrier layer in [0066], Fig.6A) surrounding a side surface of the second conductive layer (988B metal film in [0066], Fig.6A).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Okina’s feature of a second barrier layer surrounding a side surface of the second conductive layer to the combination of Hwang and Okina in order to have the predictable result of providing an edge seal structure that more effectively blocks diffusion of moisture and/or contaminants without significantly weakening the bonding strength at edges of the bonded assembly ([0030], Okina).
Re: Claim 13, Hwang modified by Okina discloses the semiconductor package of claim 1, wherein the first semiconductor chip (100A, Fig. 2, Hwang) further comprises a first circuit layer (120 semiconductor device layer including wiring layers in [0022], Figs. 1, 2, Hwang) below the first substrate (110-bottom, Fig. 2, Hwang), and a lower pad (pad-170 a lower pad connected to connection bump 170 in [0039], Fig. 1, Hwang) below the first circuit layer (120, Fig. 2, Hwang), wherein the through-electrode (130 through-electrodes in [0023], Figs. 1, 2, Hwang) extending through (Figs. 1, 2, Hwang) the first substrate (110-bottom, Fig. 2, Hwang) and electrically connecting the first pad (154, Fig. 2, Hwang) and the lower pad (pad-170, Fig. 2, Hwang).
Re: Independent Claim 14, Hwang discloses a semiconductor package (Fig. 1) comprising:
a first semiconductor chip (100A semiconductor chip in [0021], Figs. 1,2) including a first substrate (110-bottom a semiconductor substrate in [0021], Figs. 1,2-Annotated), a first pad (154 a bonding pad in [0021], Figs. 1,2) on the first substrate (110-bottom), a through-electrode (130 through-electrodes in [0023], Figs. 1, 2, Hwang) extending through (Figs. 1, 2, Hwang) the first substrate (110-bottom) and connected to the first pad (154), a first insulating layer (164b an insulation layer in [0029], Figs. 1,2) at least partially surrounding (Figs. 1,2) the first pad (154) on the first substrate (110-bottom) and a buffer film (164a an insulation layer in [0029], Figs. 1,2) between the first insulating layer (164b Figs. 1,2) and the first substrate (110-bottom); and
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Hwang’s Figure 2-Annotated.
a second semiconductor chip (100B semiconductor chip in [0021], Figs. 1,2) on the first semiconductor chip (100A), and including a second substrate (110-top a semiconductor substrate in [0021], Figs. 1,2-Annotated), a second pad (152 a connection pad in [0021], Figs. 1,2) below the second substrate (110-top) and contacting (Figs. 1,2) the first pad (154), and a second insulating layer (162 an insulation layer in [0028], Figs. 1,2) at least partially surrounding (Figs. 1,2) the second pad (152) and contacting (Figs. 1,2) the first insulating layer (164b) and a wiring layer (140 wiring structure in [0022], Fig. 2) disposed between the second substrate (110-top) and the second insulating layer (162) and connected to the second pad (152), wherein a thickness (there exists a thickness within 154 as shown above) of the first pad (154) is less (Fig. 2-Annotated) than a thickness (there exists a thickness within 152 as shown above) of the second pad (152),
wherein the first pad (154) includes a first surface (first surface-154 top surface of pad 154, Fig. 2-Annotated) contacting the second pad (152) and a second surface (second surface-154 bottom surface of pad 154, Fig. 2-Annotated) opposite (Fig. 2-Annotated) the first surface (first surface-154), and a first side surface (side surface-154, Fig. 2-Annotated) between the first surface (first surface-154) and the second surface (second surface-154),
wherein the second pad (152) includes a third surface (third surface-152 bottom surface of pad 152, Fig. 2-Annotated) contacting the first pad (154), a fourth surface (fourth surface-152 top surface of pad 152, Fig. 2-Annotated) opposite the third surface (third surface-152), and a second side surface (side surface-152, Fig. 2-Annotated) between the third surface (third surface-152) and the fourth surface (fourth surface-152), wherein an upper surface of the buffer film (164a) is at a same level as an upper surface of the through-electrode (130).
Hwang does not expressly disclose a first side surface inclined with respect to the second surface at a first obtuse angle, and a second side surface inclined with respect to the fourth surface at a second obtuse angle, wherein each of the first and second obtuse angles is in a range of 100° to about 130°.
However, in the same semiconductor device field of endeavor, Okina discloses a first side surface inclined (788-side-L an inclined side surface of pad 788 at left side, wherein 788 includes 788A pad liner layer and 788B a metal film in [0088], Figs. 4A,6A-Annotated) with respect to the second surface (second surface bottom surface of pad 788 in [0088], Fig. 6A-Annotated) at a first obtuse angle (788-angle-L, an angle formed between the surface and the inclined surface Fig. 6A-Annotated), and a second side surface (988-side-L an inclined side surface of pad 988 at left side, wherein 988 includes 988A pad liner layer and 988B a metal film in [0066], Figs. 3A,6A-Annotated) inclined with respect to the fourth surface (fourth surface top surface of pad 988 in Fig. 6A-Annotated) at a second obtuse angle (988-angle-L, an angle formed between the surface and the inclined surface Fig. 6A-Annotated) wherein each of the first and second obtuse angles is in a range of 100° to about 130° (sidewalls of 788 and 988 may have a taper angle in a range from 3 degrees to 10 degrees with respect to the vertical direction then 788-angle-L and 988-angle-L correspond to 90-120 degree in [0062]).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Okina’s feature of a first side surface inclined with respect to the second surface at a first obtuse angle, and a second side surface inclined with respect to the fourth surface at a second obtuse angle to Hwang’s device in order to have the predictable result of providing an edge seal structure that more effectively blocks diffusion of moisture and/or contaminants without significantly weakening the bonding strength at edges of the bonded assembly ([0030], Okina).
Re: Claim 15, Hwang modified by Okina discloses the semiconductor package of claim 14, wherein the first pad (154, Fig. 2, Hwang) has a trapezoidal shape (788 with trapezoidal shape from Okina applied to 154’s Hwang).
Re: Claim 16, Hwang modified by Okina discloses the semiconductor package of claim 14,
Hwang modified by Okina does not disclose wherein the first obtuse angle and the second obtuse angle are different from each other.
However, the Applicant has not presented persuasive evidence that the claimed
“first obtuse angle and the second obtuse angle different from each other” is for a particular purpose that is critical to the overall claimed invention (i.e. the invention would not work without the specific claimed first obtuse angle and the second obtuse angle different from each other). Also, the applicant has not shown that the claimed “difference of the claimed first obtuse angle and the second obtuse angle” produces a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. At meantime, Okina discloses “first angle and the second angle are in a range of 90-120 degree in [0062]” in Fig. 6A, therefore, the obtuse angles are a result effective variable. It has been held that is not inventive to discover the optimum first obtuse angle and the second obtuse angle by routine experimentation (MPEP 2144.05 II).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the first obtuse angle and the second obtuse angle different from each other to the rest of the claimed invention to improve the bonding characteristics of the device.
Re: Claim 17, Hwang modified by Okina discloses the semiconductor package of claim 14, wherein the first semiconductor chip (100A, Fig. 2, Hwang) further comprises a first circuit layer (120 semiconductor device layer including wiring layers in [0022], Figs. 1, 2, Hwang) below the first substrate (110-bottom, Fig. 2, Hwang), a lower pad (pad-170 a lower pad connected to connection bump 170 in [0039], Fig. 1, Hwang) below the first circuit layer (120, Fig. 2, Hwang), and the through-electrode (130 through-electrodes in [0023], Figs. 1, 2, Hwang) extending through (Figs. 1, 2, Hwang) the first substrate (110-bottom, Fig. 2, Hwang) and electrically connecting the first pad (154, Fig. 2, Hwang) and the lower pad (pad-170, Fig. 2, Hwang).
Re: Claim 21, Hwang modified by Okina discloses the semiconductor package of claim 1, wherein the first pad (154, Fig. 2, Hwang) has a trapezoidal shape (788 with trapezoidal shape from Okina applied to 154’s Hwang).
Re: Claim 26, Hwang modified by Okina discloses the semiconductor package of claim 13, wherein the through-electrode (130 through-electrodes in [0023], Figs. 1, 2, Hwang) is directly in contact with the second surface (second surface-154 bottom surface of pad 154, Fig. 2-Annotated) of the first pad (154, Fig. 2, Hwang).
Claim(s) 18-19 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hwang et al. (US 20200135699 A1, of the record), in view of Lee et al. (US 20200161277 A1, hereinafter Lee), in view of Okina.
Re: Independent Claim 18, Hwang discloses a semiconductor package (Fig. 1) comprising:
a first semiconductor chip (100A semiconductor chip in [0021], Figs. 1,2) including a first substrate (110-bottom a semiconductor substrate in [0021], Figs. 1,2-Annotated), a first pad (154 a bonding pad in [0021], Figs. 1,2) on the first substrate (110-bottom), and a first insulating layer (164b an insulation layer in [0029], Figs. 1,2) at least partially surrounding (Figs. 1,2) the first pad (154) on the first substrate (110-bottom), an insulating protective layer (164a an insulation layer in [0029], Figs. 1,2) between the first substrate (110-bottom) and the first insulating layer (164b), a through-electrode (130 through-electrode in [0029], Figs. 1,2) extending through the first substrate (110-bottom) and the insulating protective layer (164a) and connected to the first pad (154), and
a second semiconductor chip (100B semiconductor chip in [0021], Figs. 1,2) on the first semiconductor chip (100A), and including a second substrate (110-top a semiconductor substrate in [0021], Figs. 1,2-Annotated), a second pad (152 a connection pad in [0021], Figs. 1,2) below the second substrate (110-top) and contacting (Figs. 1,2) the first pad (154), and a second insulating layer (162 an insulation layer in [0028], Figs. 1,2) at least partially surrounding (Figs. 1,2) the second pad (152) and contacting (Figs. 1,2) the first insulating layer (162), and a wiring layer (140 wiring structure in [0022], Fig. 2) disposed between the second substrate (110-top) and the second insulating layer (162) and connected to the second pad (152),
wherein the first pad (154) includes a first surface (first surface-154 top surface of pad 154, Fig. 2-Annotated) contacting the second pad (152) and a second surface (second surface-154 bottom surface of pad 154, Fig. 2-Annotated) opposite (Fig. 2-Annotated) the first surface (first surface-154);
Hwang does not expressly disclose a buffer film on the insulating protective layer and spaced apart from the through-electrode; wherein the first pad has a first side surface and an opposite second side surface inclined at a first obtuse angle and a second obtuse angle with respect to the second surface, respectively, wherein an upper surface of the buffer film is at a same level as an upper surface of the through-electrode, wherein each of the buffer film and the insulating protective layer extends further outward than the second substrate, and wherein at least one the first and the second obtuse angles is in a range of 100° to 130°.
However, in the same semiconductor device field of endeavor, Lee discloses a buffer film (140 stop layer made of SiN in [0043, 0069], Fig. 2) spaced apart (Fig. 2) from the through-electrode (160a conductive pattern in [0089], Fig. 2), wherein an upper surface of the buffer film (140) is at a same level as an upper surface of the through-electrode (160a).
Therefore, Hwang in view of Lee teaches a buffer film (Lee’s 140) on the insulating protective layer (Hwang’s 164a) and spaced apart (Lee’s 140, Fig. 2) from the through-electrode (Hwang’s 130).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Lee’s feature of a buffer film spaced apart from the through-electrode, wherein an upper surface of the buffer film is at a same level as an upper surface of the through-electrode to Hwang’s device in order to have the predictable result of obtaining a simplified manufacturing process using a polishing stop layer ([0043], Lee).
Hwang modified by Lee does not expressly disclose wherein the first pad has a first side surface and an opposite second side surface inclined at a first obtuse angle and a second obtuse angle with respect to the second surface, respectively, wherein each of the buffer film and the insulating protective layer extends further outward than the second substrate, and wherein at least one the first and the second obtuse angles is in a range of 100° to 130°.
However, in the same semiconductor device field of endeavor, Lee discloses in a second embodiment, wherein the first substrate (1110 substrate in [0116], Fig. 17) extends further outward than the second substrate (1210 substrate in [0117], Fig. 17).
Therefore, Hwang in view of Lee teaches wherein each of the buffer film (Lee’s 140) and the insulating protective layer (Hwang’s 164a) extends further outward than the second substrate (Lee’s 1210, Fig. 17, second embodiment).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Lee’s second embodiment of wherein the first substrate extends further outward than the second substrate to the combination of Hwang and Lee in order to have the predictable result of obtaining a simplified manufacturing process using a polishing stop layer ([0043], Lee).
Hwang modified by Lee does not expressly disclose wherein the first pad has a first side surface and an opposite second side surface inclined at a first obtuse angle and a second obtuse angle with respect to the second surface, respectively, and wherein at least one the first and the second obtuse angles is in a range of 100° to 130°.
However, in the same semiconductor device field of endeavor, Okina discloses wherein the first pad (788 Fig. 6A) has a first side surface (788-side-L, Fig. 6A-Annotated) and an opposite second side surface (788-side-R, Fig. 6A-Annotated), inclined (Fig. 6A -Annotated) at a first angle (788-angle-L, Fig. 6A-Annotated) and a second angle (788-angle-R, Fig. 6A-Annotated) with respect to the second surface (second surface, Fig. 6A-Annotated), respectively and wherein at least one the first and the second obtuse angles is in a range of 100° to 130° (sidewalls of 788 may have a taper angle in a range from 3 degrees to 10 degrees with respect to the vertical direction then 788-angle-L and 788-angle-R correspond to 90-120 degree in [0062]).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Okina’s feature of wherein the first pad has a first side surface and an opposite second side surface inclined at a first angle and a second angle with respect to the second surface, respectively and wherein at least one the first and the second obtuse angles is in a range of 100° to 130° to the combination of Hwang and Lee in order to have the predictable result of providing an edge seal structure that more effectively blocks diffusion of moisture and/or contaminants without significantly weakening the bonding strength at edges of the bonded assembly ([0030], Okina).
Re: Claim 19, Hwang modified by Lee, Okina disclose the semiconductor package of claim 18,
However, in the same semiconductor device field of endeavor, Lee discloses a buffer film (140 stop layer made of SiN in [0043, 0069], Fig. 2) spaced apart (140 is spaced apart from sides walls of 182 at left and right side, Fig. 2) from the first pad (182 bond pad in [0030], Fig. 2).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Lee’s feature of a buffer film spaced apart from the first pad to the combination of Hwang, Lee and Okina in order to have the predictable result of obtaining a simplified manufacturing process using a polishing stop layer ([0043], Lee).
Claim(s) 22 and 25 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hwang, in view of Okina and further in view of Lee.
Re: Claim 22, Hwang modified by Okina discloses the semiconductor package of claim 1,
Hwang modified by Okina do not expressly disclose the buffer film is spaced apart from the first pad and overlaps with at least a portion of the first pad.
However, in the same semiconductor device field of endeavor, Lee discloses the buffer film (140 stop layer made of SiN in [0043, 0069], Fig. 2) is spaced apart (140 is spaced apart from sides walls of 182 at left and right side, Fig. 2) from the first pad (182 bond pad in [0030], Fig. 2) and overlaps (Fig. 2) with at least a portion of the first pad (182).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Lee’s feature of the buffer film is spaced apart from the first pad and overlaps with at least a portion of the first pad to the combination of Hwang and Okina in order to have the predictable result of obtaining a simplified manufacturing process using a polishing stop layer ([0043], Lee).
Re: Claim 25, Hwang modified by Okina and Lee discloses the semiconductor package of claim 22, wherein the upper surface of the buffer film (164a, Hwang) is at a same level (Fig. 2, Hwang) as the second surface of the first pad (154, Hwang).
Second rejection of claim 1
Claim(s) 1,22,23 and 24 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Hwang, in view of Lee and further in view of Okina.
Re: Independent Claim 1, Hwang discloses a semiconductor package (Fig. 1) comprising:
a first semiconductor chip (100A semiconductor chip in [0021], Figs. 1,2) including a first substrate (110-bottom a semiconductor substrate in [0021], Figs. 1,2-Annotated), a first pad (154 a bonding pad in [0021], Figs. 1,2) on the first substrate (110-bottom), a through-electrode (130 through-electrodes in [0023], Figs. 1, 2, Hwang) extending through (Figs. 1, 2, Hwang) the first substrate (110-bottom, Fig. 2, Hwang) and connected to the first pad (154, Fig. 2, Hwang), a first insulating layer (164b an insulation layer in [0029], Figs. 1,2) at least partially surrounding (Figs. 1,2) the first pad (154) on the first substrate (110-bottom);
a second semiconductor chip (100B semiconductor chip in [0021], Figs. 1,2) on the first semiconductor chip (100A), and including a second substrate (110-top a semiconductor substrate in [0021], Figs. 1,2-Annotated), a second pad (152 a connection pad in [0021], Figs. 1,2) below the second substrate (110-top) and contacting (Figs. 1,2) the first pad (154), a second insulating layer (162 an insulation layer in [0028], Figs. 1,2) at least partially surrounding (Figs. 1,2) the second pad (152) and contacting (Figs. 1,2) the first insulating layer (164b), and a wiring layer (140 wiring structure in [0022], Fig. 2) disposed between the second substrate (110-top) and the second insulating layer (162) and connected to the second pad (152),
wherein the first pad (154) includes a first surface (first surface-154 top surface of pad 154, Fig. 2-Annotated) contacting the second pad (152) and a second surface (second surface-154 bottom surface of pad 154, Fig. 2-Annotated) opposite (Fig. 2-Annotated) the first surface (first surface-154).
Hwang does not expressly disclose a buffer film between the first insulating layer and the first substrate; wherein an upper surface of the buffer film is at a same level as an upper surface of the through-electrode and inclined side surfaces between the first surface and the second surface, wherein the inclined side surfaces include a first side surface and a second side surface, facing each other and inclined at a first obtuse angle and a second obtuse angle with respect to the second surface, respectively, and wherein at least one the first and the second obtuse angles is in a range of 100° to 130°.
However, in the same semiconductor device field of endeavor, Lee discloses a buffer film (140 stop layer made of SiN in [0043, 0069], Fig. 2), wherein an upper surface of the buffer film (140) is at a same level as an upper surface of the through-electrode (160a conductive pattern in [0089], Fig. 2).
Therefore, Hwang in view of Lee teaches a buffer film (Lee’s 140) between the first insulating layer (Hwang’s 164b) and the first substrate (Hwang’s 110-bottom).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Lee’s feature of a buffer film, wherein an upper surface of the buffer film is at a same level as an upper surface of the through-electrode to Hwang’s device in order to have the predictable result of obtaining a simplified manufacturing process using a polishing stop layer ([0043], Lee).
Hwang modified by Lee does not expressly disclose inclined side surfaces between the first surface and the second surface, wherein the inclined side surfaces include a first side surface and a second side surface, facing each other and inclined at a first obtuse angle and a second obtuse angle with respect to the second surface, respectively, and wherein at least one the first and the second obtuse angles is in a range of 100° to 130°.
However, in the same semiconductor device field of endeavor, Okina discloses inclined side surfaces (788-side-L and 788-side-R an inclined side surface of pad 788 at left side and right side, wherein 788 includes 788A pad liner layer and 788B a metal film in [0088], Figs. 4A,6A-Annotated) between the first surface (first surface top surface of pad 788 in [0088], Fig. 4A,6A-Annotated) and the second surface (second surface bottom surface of pad 788 in [0088], Fig. 4A,6A-Annotated), wherein the inclined side surfaces (788-side-L and 788-side-R, Figs. 4A,6A) include a first side surface (788-side-L) and a second side surface (788-side-R), facing each other (Figs. 4A,6A) and inclined at a first angle (788-angle-L, an angle formed between the second surface and the inclined surface, Figs. 4A,6A-Annotated) and a second angle (788-angle-R, an angle formed between the second surface and the inclined surface, Figs. 4A,6A-Annotated) with respect to the second surface (second surface, Figs. 4A,6A-Annotated), respectively, and wherein at least one the first and the second obtuse angles is in a range of 100° to 130° (sidewalls of 788 may have a taper angle in a range from 3 degrees to 10 degrees with respect to the vertical direction then 788-angle-L and 788-angle-R correspond to 90-120 degree in [0062]).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Okina’s feature of inclined side surfaces between the first surface and the second surface, wherein the inclined side surfaces include a first side surface and a second side surface, facing each other and inclined at a first angle and a second angle with respect to the second surface, respectively and wherein at least one the first and the second obtuse angles is in a range of 100° to 130° to the combination of Hwang and Lee in order to have the predictable result of providing an edge seal structure that more effectively blocks diffusion of moisture and/or contaminants without significantly weakening the bonding strength at edges of the bonded assembly ([0030], Okina).
Re: Claim 22 (second rejection), Hwang modified by Lee and Okina discloses the semiconductor package of claim 1,
Hwang modified by Lee and Okina do not expressly disclose the buffer film is spaced apart from the first pad and overlaps with at least a portion of the first pad.
However, in the same semiconductor device field of endeavor, Lee discloses the buffer film (140 stop layer made of SiN in [0043, 0069], Fig. 2) is spaced apart (140 is spaced apart from sides walls of 182 at left and right side, Fig. 2) from the first pad (182 bond pad in [0030], Fig. 2) and overlaps (Fig. 2) with at least a portion of the first pad (182).
It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Lee’s feature of the buffer film is spaced apart from the first pad and overlaps with at least a portion of the first pad to the combination of Hwang, Lee and Okina in order to have the predictable result of obtaining a simplified manufacturing process using a polishing stop layer ([0043], Lee).
Re: Claim 23, Hwang modified by Lee and Okina discloses the semiconductor package of claim 22, wherein the first semiconductor chip (100A semiconductor chip in [0021], Figs. 1,2, Hwang) further includes an insulating protective layer (164a an insulation layer in [0029], Figs. 1,2, Hwang) between the first substrate (110-bottom, Figs. 1,2, Hwang) and the buffer film (140, Fig. 2, Lee), and at least a portion of the insulating protective layer (164a Figs. 1,2, Hwang) is in contact with the second surface of the first pad (154 Figs. 1,2, Hwang).
Re: Claim 24, Hwang modified by Lee and Okina discloses the semiconductor package of claim 23, wherein the through-electrode (130 through-electrodes in [0023], Figs. 1, 2, Hwang) extends through (Figs. 1, 2, Hwang) the first substrate (110-bottom, Figs. 1,2, Hwang) and the insulating protective layer (164a Figs. 1,2, Hwang), and the through-electrode (130 Figs. 1, 2, Hwang) is spaced apart from the buffer film (140, Fig. 2, Lee).
Conclusion
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/SANDRA MILENA RODRIGUEZ VILLANUEVA/
Examiner, Art Unit 2898
/JESSE Y MIYOSHI/
Primary Examiner, Art Unit 2898
