DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 6/18/26 has been entered.
Response to Arguments
Applicant's arguments filed 6/18/26 have been fully considered but they are not persuasive.
Applicant’s argue that Oh does not teach wherein the encapsulating layer is bonded to the first surface of the insulating layer via the first side thereof. This is not persuasive as this bond is illustrated below in Figure 16 of Oh where the first surface of the insulating layer contacts the encapsulating layer
Applicant’s argue that Oh does not teach that the conductive vias do not penetrate the entire encapsulating layer to connect the first side and the second side. This is not persuasive, the vias penetrate completely through the encapsulating layer as illustrated in Figure 16 below. Note that the encapsulating layer does not need to be a perfect shape and that the vias need only penetrate through from one side to the other, which Oh teaches, see below Figure 16 marked up to specifically illustrate this point.
Applicant’s argue that Oh ‘s structure merely penetrates a portion of the encapsulant. The examiner would like to point out that the Claims do not specific any specific shape or dimensions of the encapsulation layer and that in the broadest reasonable interpretation if a via penetrates from one side to the other no matter the distance, then it meets the bounds of the claimed limitation.
Applicant’s argue that Oh fails to teach that the wiring layer is electrically connected to the electronic element. This relationship is not found in the claims. The claims only state that the electronic element is connected to the circuit layer. Never the less, the circuit layer is electronically connected to the wiring layer and as such an electrical pathway exists.
Applicant’s argue that Oh fails to teach backside vias communicating between the opposite sides of the encapsulant. This is not persuasive as discussed above and the term “backside” is not found in the claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Oh et al US 2019/0139853.
Pertaining to claims 1 and 6, Oh teaches an electronic package, comprising:
a circuit portion having at least one insulating layer and a circuit layer (the circuit layer consists of all the “circuitry” in the layer encompassed by the insulating layer) bonded to the insulating layer, wherein the insulating layer 141 is defined with a first surface and a second surface opposing the first surface, and the circuit layer 140 is exposed from the first surface of the insulating layer;
an electronic element 120+125 disposed on the first surface of the insulating layer of the circuit portion and electrically connected to the circuit layer; See Figure 16 marked up below
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an encapsulating layer 130 formed on the first surface of the insulating layer of the circuit portion and covering the electronic element, wherein the encapsulating layer is an Ajinomoto build-up film [0082] and is defined with a first side and a second side opposite to the first side, wherein the encapsulating layer is bonded to the first surface of the insulating layer via the first side thereof; See Figure 16 marked up below
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a wiring layer formed on the encapsulating layer, wherein the wiring layer is formed with at least one conductive via in the encapsulating layer, and the at least one conductive via is electrically connected to the circuit layer, wherein the first side of the encapsulating layer is in communication with the second side of the encapsulating layer by the at least one conductive via. See Figure 16 marked up below
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Pertaining to claims 2 and 7, Oh teaches the electronic package of claims 1 and 6, wherein the electronic element is a passive element. [0104] Oh teaches that alternatively to active elements, that 120 could be replaced with a passive component.
Pertaining to claims 3 and 8, Oh teaches the electronic package of claims 1 and 6, wherein the electronic element is electrically connected to the circuit layer via a plurality of conductive bumps. See [0086] (note bumps are not shown in Figure but taught in this paragraph)
Pertaining to claims 4 and 9, Oh teaches the electronic package of claims 1 and 6, wherein a material forming the encapsulating layer is different from a material forming the insulating layer. The encapsulating layer is ABF as indicated above, layer 141 is described as something else in paragraph [0095]
Pertaining to claims 5 and 10, Oh teaches the electronic package of claims 1 and 6, further comprising another wiring layer formed on the second surface of the insulating layer, wherein the another wiring layer is formed with at least one conductive blind via in the insulating layer, and the at least one conductive blind via is electrically connected to the circuit layer. See Figure 16 marked up below.
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Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS J TOBERGTE whose telephone number is (571)272-6458. The examiner can normally be reached M-F 7:30-4:30.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/NICHOLAS J TOBERGTE/Primary Examiner, Art Unit 2817
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