DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement filed February 27, 2026 fails to comply with 37 CFR 1.98(a)(2), which requires a legible copy of each cited foreign patent document; each non-patent literature publication or that portion which caused it to be listed; and all other information or that portion which caused it to be listed. It has been placed in the application file, but the information referred to therein has not been considered.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1, 3, 5 and 7, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (2016/0087053) in view of Kwok et al. (20160190250).
As for claim 1, Kim et al. show in Figs. 7A-7C and related text a semiconductor device 100c, comprising:
a substrate 110 that includes a first region 110N and a second region 110P;
a first active pattern 112 elongated in a first direction Y on the first region;
a first gate structure 140N elongated in a second direction X that intersects the first direction, the first gate structure intersecting the first active pattern;
a first epitaxial pattern 160N disposed on a side surface of the first gate structure, wherein the first epitaxial pattern is connected to the first active pattern and includes n-type impurities ([0050], [0065], [0122], [0127]);
a first source/drain contact 170N that penetrates an upper surface of the first epitaxial pattern and is connected to the first epitaxial pattern;
a second active pattern 112 elongated in a third direction Y on the second region;
a second gate structure 140P elongated in a fourth direction X that intersects the third direction, the second gate structure intersecting the second active pattern;
a second epitaxial pattern 160P disposed on a side surface of the second gate structure, wherein the second epitaxial pattern is connected to the second active pattern and includes p-type impurities ([0050], [0065], [0122], [0127]); and
a second source/drain contact 170P that penetrates an upper surface of the second epitaxial pattern and is connected to the second epitaxial pattern,
wherein a lower surface of the first source/drain contact is lower than a lower surface of the second source/drain contact.
Kim et al. do not disclose the upper surface of the first epitaxial pattern includes a first inclined surface adjacent to the first gate structure and a second inclined surface spaced apart from the first gate structure, the first inclined surface and the second inclined surface forming a V shape in a cross-section taken in a plane parallel to the first direction and perpendicular to an upper surface of the substrate, wherein the first source/drain contact intersects a lowermost part of the upper surface of the first epitaxial pattern.
Kwok et al. teach in Figs. 1F, 2 and related text the upper surface of the first epitaxial pattern 138 includes a first inclined surface 140-a adjacent to the first gate structure and a second inclined surface 140-b spaced apart from the first gate structure 120, the first inclined surface and the second inclined surface forming a V shape 140 in a cross-section taken in a plane parallel to the first direction and perpendicular to an upper surface of the substrate 110,
wherein the first source/drain contact 148/158 intersects a lowermost part of the upper surface of the first epitaxial pattern.
Kim et al. and Kwok et al. are analogous art because they are directed to a field effect transistor and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kim et al. with the specified feature(s) of Kwok et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the upper surface of the first epitaxial pattern including a first inclined surface adjacent to the first gate structure and a second inclined surface spaced apart from the first gate structure, the first inclined surface and the second inclined surface forming a V shape in a cross-section taken in a plane parallel to the first direction and perpendicular to an upper surface of the substrate, wherein the first source/drain contact intersecting a lowermost part of the upper surface of the first epitaxial pattern, as taught by Kwok et al., in Kim et al.’s device, in order to reduce contact resistance, improve power consumption, and enhance the performance of the device ([0034]). Furthermore, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
As for claim 3, the combined device shows the first epitaxial pattern has a hexagonal shape in a cross-section taken in a plane parallel to the second direction and perpendicular to the upper surface of the substrate (Kim: Figs. 7A-7C).
As for claim 5, the combined device shows the second epitaxial pattern has a pentagonal shape in a cross-section taken in a plane parallel to the fourth direction and perpendicular to the upper surface of the substrate (Kim: Figs. 7A-7c).
As for claim 7, the combined device shows the first source/drain contact includes a first silicide film, a first barrier metal film, and a first filling metal film that are sequentially stacked on the first epitaxial pattern, and
the second source/drain contact includes a second silicide film, a second barrier metal film, and a second filling metal film that are sequentially stacked on the second epitaxial pattern (Kim: [0136]).
Claim(s) 6, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (2016/0087053) and Kwok et al. (20160190250) in view of Hsu et al. (2017/0323852).
Kim et al. and Kwok et al. disclosed substantially the entire claimed invention, as applied to claim 1 above, except a first liner film that extends along the upper surface of the first epitaxial pattern, the side surface of the first gate structure, the upper surface of the second epitaxial pattern, and the side surface of the second gate structure; and a second liner film disposed on the first liner film and that extends along a side surface of the first source/drain contact and a side surface of the second source/drain contact.
Hsu et al. teach in Fig. 8 and related text a first liner film 44 that extends along the upper surface of the epitaxial pattern 30, the side surface of the gate structure 24/36/38/40; and
a second liner film 46 disposed on the first liner film and that extends along a side surface of the source/drain contact 60.
Kim et al., Kwok et al. and Hsu et al. are analogous art because they are directed to a field effect transistor and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kim et al. and Kwok et al. with the specified feature(s) of Hsu et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include a first liner film extending along the upper surface of the epitaxial pattern, the side surface of the gate structure; and a second liner film disposing on the first liner film and that extending along a side surface of the source/drain contact, as taught by Hsu et al., in Kim et al. and Kwok et al.’s device, in order to reduce parasitic capacitances and thus increase the device performance and reduce the power consumption of the device. Furthermore, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Therefore, the combined device shows a first liner film that extends along the upper surface of the first epitaxial pattern, the side surface of the first gate structure, the upper surface of the second epitaxial pattern, and the side surface of the second gate structure; and
a second liner film disposed on the first liner film and that extends along a side surface of the first source/drain contact and a side surface of the second source/drain contact.
Claim(s) 9, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (2016/0087053) and Kwok et al. (20160190250) in view of Kuo et al. (2024/0363395).
Kim et al. and Kwok et al. disclosed substantially the entire claimed invention, as applied to claim 1 above, except the first active pattern includes a plurality of first sheet patterns that are sequentially stacked on the substrate, vertically spaced apart from each other, and each extending in the first direction, and the second active pattern includes a plurality of second sheet patterns that are sequentially stacked on the substrate, vertically spaced apart from each other, and each extending in the third direction.
Kuo et al. teach in Figs. 16, 16A-16E and related text the first active pattern 204a includes a plurality of first sheet patterns 208a that are sequentially stacked on the substrate, vertically spaced apart from each other, and each extending in the first direction Y, and
the second active pattern 204b includes a plurality of second sheet patterns 208b that are sequentially stacked on the substrate, vertically spaced apart from each other, and each extending in the third direction Y.
Kim et al., Kwok et al. and Kuo et al. are analogous art because they are directed to a complementary field effect transistor and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kim et al. and Kwok et al. with the specified feature(s) of Kuo et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the first active pattern including a plurality of first sheet patterns that being sequentially stacked on the substrate, vertically spaced apart from each other, and each extending in the first direction, and the second active pattern including a plurality of second sheet patterns that being sequentially stacked on the substrate, vertically spaced apart from each other, and each extending in the third direction, as taught by Kuo et al., in Kim et al. and Kwok et al.'s device, in order to improve the short-channel effect, reduce leakage current and improve the performance of the device.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, 3, 5-7 and 9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/MEIYA LI/Primary Examiner, Art Unit 2811
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