DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: POWER SEMICONDUCTOR DEVICE WITH FLEXIBLE PCB CONNECTED TO BASE METAL SHEET
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-12 and 14-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-13 of U.S. Patent No. 11776890. Although the claims at issue are not identical, they are not patentably distinct from each other, as explained below:.
Regarding claim 1 of current application, it is taught by claim 1 of US Patent No. 11776890. Referring to claim 1 of US Patent No. 11776890 (see Col. 10, line 35 – Col. 11, line 2), it teaches
a power semiconductor device for a vehicle, the power semiconductor device (see Col. 10, line 36 –37) comprising:
a plurality of power semiconductors arranged in a first subset of power semiconductors and a second subset of power semiconductors (see Col. 10, line 38-40);
a base metal sheet comprising a first base metal sheet and second base metal sheet, each of the first and second base metal sheets being electrically isolated from each other (see Col. 10, line 41-44); and
a one-layer flexible printed circuit board (PCB) between the base metal sheet and the power semiconductors (see Col. 10, line 45-47), the one-layer flexible PCB comprising a plurality of conductive pads separated from each other (see Col. 10, line 51-52),
wherein each of the power semiconductors comprises a first power pad on a side facing the flexible PCB (see Col. 10, line 49-50), and
wherein one side of a first one of the conductive pads is electrically connected to the first power pad of one of the power semiconductors in the first subset of power semiconductors and the opposite side of the first one of the conductive pads is electrically connected to the first base metal sheet (see Col. 10, line 53-58),
wherein one side of a second one of the conductive pads is electrically connected to the first power pad of one of the power semiconductors in the second subset of power semiconductors and the opposite side of the second one of the conductive pads is electrically connected to the second base metal sheet (see Col. 10, line 59-64).
Regarding claim 2 of current application, it is also taught by claim 1 of US Patent No. 11776890. Referring to claim 1 of US Patent No. 11776890 (see Col. 10, line 35 – Col. 11, line 2), it teaches the power semiconductor device of claim 1, further comprising
a top metal sheet (see Col. 10, line 48),
wherein each of the power semiconductors comprises a second power pad on a side facing away from the flexible PCB (see Col. 10, line 65-67), and
wherein the top metal sheet is electrically connected to the second power pad of the power semiconductors (see Col. 11, line 1-2).
Claim 3 of present application is substantially the same as claim 2 of US Patent No. 11776890.
Claim 4 of present application is substantially the same as claim 3 of US Patent No. 11776890.
Claim 5 of present application is substantially the same as claim 4 of US Patent No. 11776890
Claim 6 of present application is substantially the same as claim 5 of US Patent No. 11776890
Claim 7 of present application is substantially the same as claim 6 of US Patent No. 11776890
Claim 8 of present application is substantially the same as claim 7 of US Patent No. 11776890
Claim 9 of present application is substantially the same as claim 8 of US Patent No. 11776890
Claim 10 of present application is substantially the same as claim 9 of US Patent No. 11776890
Claim 11 of present application is substantially the same as claim 10 of US Patent No. 11776890
Claim 12 of present application is substantially the same as claim 13 of US Patent No. 11776890
Claim 14 of present application is substantially the same as claim 11 of US Patent No. 11776890
Claim 15 of present application is substantially the same as claim 12 of US Patent No. 11776890
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 9, 10, 12 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Kratzer (US 20210360788), hereinafter Kratzer, in view of Jiang (US 20150296622), hereinafter Jiang.
Regarding claim 1, Kratzer (refer to markup of Figure 9 below, also see Figure 2-9) teaches a power semiconductor device for a vehicle (para 1-2), the power semiconductor device comprising:
a plurality of power semiconductors (28, described as “semiconductor switch 28” in para 63, best seen in Figure 9) arranged in a first subset (SS-1 in the markup of Figure 9) of power semiconductors (28) and a second subset (SS-2 in the markup of Figure 9) of power semiconductors (28);
a base metal sheet (34, described as “flat part 34” for connecting to cables in para 68-69, also see para 22 that describes flat part may be formed of copper) comprising a first base metal sheet (BMS-1 in the markup of Figure 9) and second base metal sheet (BMS-2 in the markup of Figure 9), each of the first and second base metal sheets being electrically isolated from each other (due to gaps labelled GAP-1 and GAP-2 in the markup of Figure 9); and
a printed circuit board (PCB) [comprising 2 and also 8 and 12, see para 55; also see para 56-57] between the base metal sheet (34) and the power semiconductors (28), the PCB comprising a plurality of conductive pads (8 and 12, see Figure 9 and para 56-57) separated from each other (best seen in Figure 9),
wherein each of the power semiconductors comprises a first power pad (30’, described as contact pads 30′ of 28 in para 64, best seen in detail of Figures 5a-b) on a side facing the flexible PCB (best seen in Figure 9), and
wherein one side of a first one of the conductive pads (8) is electrically connected (through “vias 14” and contact pads 20/22/24 described in para 70) to the first power pad of one of the power semiconductors in the first subset (SS-1 of the markup of Figure 9) of power semiconductors (28) and the opposite side of the first one of the conductive pads is electrically connected to the first base metal sheet (para 70),
wherein one side of a second one of the conductive pads (12) is electrically connected (through “vias 14” and contact pads 20/22/24 described in para 70) to the first power pad of one of the power semiconductors (28) in the second subset (SS-2 of the markup of Figure 9) of power semiconductors and the opposite side of the second one of the conductive pads is electrically connected to the second base metal sheet (BMS-2 in the markup of Figure 9).
Kratzer teaches a generic PCB and does not specifically teach that the PCB (comprising 2) is a “one-layer flexible” PCB. Jiang (US 20150296622) teaches a semiconductor device teaching that electrical connections may be made by a board that is one layer or more layers (para 56, last sentence), and that use of PCBs that are one-layer flexible PCBs for electrical connections is known in the art (para 58). It would have been obvious to one of ordinary skills in the art at the time of the effective filing of the claimed invention to modify Kratzer so that the PCB (comprising 2) is specifically a “one-layer flexible” PCB. The ordinary artisan would have been motivated to modify Kratzer for at least the purpose of using a PCB that can be deformed or bent in assembly unlike a regular PCB and is economical due to being a one-layer board, while still meeting interconnection needs.
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Regarding claim 9, Kratzer (refer to the markup of Figure 9, also see Figure 2-9) teaches the power semiconductor device of claim 1, wherein each of the conductive pads (8) of the flexible PCB (comprising 2) connected to the power semiconductors (28) in the first subset (SS-1) of power semiconductors is electrically isolated (due to gaps labelled GAP-1 and GAP-2 in markup of Figure 9) from each of the conductive pads (12) of the flexible PCB (comprising 2) connected to the power semiconductors (28) in the second subset (SS-2) of power semiconductors.
Regarding claim 10, Kratzer (refer to the markup of Figure 9, also see Figure 2-9) teaches the power semiconductor device of claim 9,
wherein each of the conductive pads (8) of the flexible PCB (comprising 2) connected to the power semiconductors (28) in the first subset (SS-1 in markup of Figure 9) of power semiconductors is electrically connected to the first power pad (30’; see para 64) of the power semiconductors in the first subset (SS-1 in markup of Figure 9) of power semiconductors and to the first base metal sheet (BMS-1 in the markup of Figure 9), and
wherein each of the conductive pads (30’; see para 64) of the flexible PCB (comprising 2) connected to the power semiconductors (28) in the second subset (SS-2 in markup of Figure 9) of power semiconductors is electrically connected to the first power pad (30’; see para 64) of the power semiconductors (28) in the second subset (SS-2 in markup of Figure 9) of power semiconductors (28) and to the second base metal sheet (BMS-2 in the markup of Figure 9).
Regarding claim 12, Kratzer (refer to the markup of Figure 9, also see Figure 2-9) teaches the power semiconductor device of claim 1, wherein the first base metal sheet (BMS-1 in the markup of Figure 9) and the second base metal sheet (BMS-2 in the markup of Figure 9) are separated by a gap (labelled GAP-1 or GAP-2 in markup of Figure 9), and wherein the flexible PCB (comprising 2) extends over (best seen in markup of Figure 9) the gap.
Regarding claim 13, Kratzer (refer to the markup of Figure 9, also see Figure 2-9) teaches the power semiconductor device of claim 1, wherein the flexible PCB (comprising 2) and the first one of the conductive pads (8) are both in direct contact (noting the 8 is part of flexible PCB, as explained for claim 1) with the first base metal sheet (BMS-1 in the markup of Figure 9), and
wherein the flexible PCB (comprising 2) and the second one of the conductive pads (12) are both in direct contact (again, noting the 12 is part of flexible PCB, as explained for claim 1) with the second base metal sheet (BMS-1 in the markup of Figure 9).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Kratzer and Jiang, as applied to claim 1 above, and further in view of Minamio (US 20130056885), hereinafter Minamio.
Regarding claim 11, Kratzer (refer to the markup of Figure 9, also see Figure 2-9) teaches the power semiconductor device of claim 1, further comprising a heat sink (HS in the markup of Figure 9) but does not teach that the heat sink is on a side of the base metal sheet (34) “facing away from the flexible PCB”, noting that which is also the side of the base metal sheet (34) that is facing away from the power semiconductors (28). Minamio (US 20130056885) (refer to Figure 1) teaches that to dissipate heat from a power semiconductor (12, see para 27 and 33) electrically connected (para 33) to a base metal sheet (1, para 27, see Figure 1), it is known to attach a heat sink (14, para 27), such that the heat sink is on a side of the base metal sheet facing away from the power semiconductor (see Figure 1). It would have been obvious to one of ordinary skills in the art at the time of the effective filing of the claimed invention to modify Kratzer to further add a heat sink such that the heat sink is on a side of the base metal sheet (34) “facing away from the flexible PCB”. The ordinary artisan would have been motivated to modify Kratzer for at least the purpose of providing increased dissipation of heat by providing an additional heat sink that extends the surface area for heat dissipation in a direction away from the power semiconductors, thus pulling heat away from the power semiconductors more effectively.
Claims 14-15 rejected under 35 U.S.C. 103 as being unpatentable over Kratzer and Jiang, as applied to claim 1 above, and further in view of IDS reference Tazarine (US 20170094790), hereinafter Tazarine.
Regarding claims 14-15, Kratzer (refer to the markup of Figure 9, also see Figure 2-9) teaches the power semiconductor device of claim 1 and it’s application to motor vehicles (para 3), but does not teach “A vehicle” (as recited in claim 15) comprising “a battery system comprising a battery control unit electrically connected to” the power semiconductor device of claim 1, wherein “the battery control unit is configured to control the power semiconductor device” (as recited in claim 14). Tazarine teaches a battery system (para 13) suitable for a vehicle (para 1) comprising a battery control unit (para 13-14) electrically connected to a power semiconductor device (Fig. 11C; also see para 122-123), wherein the battery control unit is configured to control the power semiconductor device (see para 102 and 122). It would have been obvious to one of ordinary skills in the art at the time of the effective filing of the claimed invention to modify Kratzer to employ the power semiconductor device of claim 1 in a vehicle comprising a battery system comprising a battery control unit electrically connected to the power semiconductor device of claim 1, wherein the battery control unit is configured to control the power semiconductor device. The ordinary artisan would have been motivated to modify Kratzer for at least the purpose of using the power semiconductor device of Kratzer that can satisfy current requirements of a high-current circuits, that are used in motor vehicle applications (para 3 of Kratzer).
Regarding claims 2, no prior art rejection is being provided and as such, claim 2 (and it’s dependent claims 3-8) may be allowable if the Double Patenting rejections outlined above for claims 2-8 are overcome. There is no prior art in view of which it would be obvious to one of ordinary skill in the art at the time of the effective filing of the claimed invention to modify Kratzer to have “second power pad on a side facing away from the flexible PCB” in conjunction with “a top metal sheet” such that “the top metal sheet is electrically connected to the second power pad of the power semiconductor” (as required by claim 2).
Conclusion
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/AJAY ARORA/Primary Examiner, Art Unit 2892