Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 16-19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 12/19/2026.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The limitation “a third region disposed on a side, away from the first region, of the second region” is unclear as to what it means. The limitation “away from the first region, of the second region” is unclear as to what region of the second region it is referring to.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Moser et al., US 20190148217.
Regarding claim 1, Moser discloses (figs. 1A-1I and related text) a composite substrate (14), comprising: a substrate (10); and a plurality of strengthening structures (12) disposed within the substrate at intervals (fig. 1D), wherein a material of the plurality of strengthening structures is a poly-crystal material (12a can be Si3N4 which polycrystalline material) material ([0022]).
Regarding claim 2, Moser discloses Moser discloses (refer to fig. below) the substrate comprises a first region (below the line) and a second region (above the line) stacked in a vertical direction (fig. 1D), the plurality of strengthening structures completely disposed in the first region (fig. below).
PNG
media_image1.png
156
426
media_image1.png
Greyscale
Regarding claim 3, Moser discloses (fig. above) the plurality of strengthening structures (12) penetrate through the first region (fig. above).
Regarding claim 4, Moser discloses wherein a material of the substrate is single-crystal silicon ([0017]).
Regarding claim 5, Moser discloses the material of the plurality of strengthening structures is silicon nitride ([0022]).
Regarding claim 6, Moser discloses a shape of projection of the plurality of strengthening structures on a plane where the substrate is located comprises any one of a polygon (fig. 1D, [0020]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7-12, are rejected under 35 U.S.C. 103 as being unpatentable over Moser et al.
Regarding claim 7, Moser does not disclose a quantity of the plurality of strengthening structures per unit area gradually increases from a center to an edge; or a size of the plurality of strengthening structures gradually increases from the center to the edge.
Parameters such as quantity of structures or size of the structures in the art of semiconductor process are subject to routine experimentation and optimization to achieve the desired device characterization during fabrication.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize appropriate number of the strengthening structures or size of the structures as claimed to meet the requirements of the particular design, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. /n re Aller, 105 USPQ 233.
Regarding claim 8, Moser discloses a thickness of one of the plurality of strengthening structures is 100 nm.
However, Moser does not disclose a thickness of one of the plurality of strengthening structures ranges from 1 to 100 nm.
Parameters such as the thickness of the structures in the art of semiconductor process are subject to routine experimentation and optimization to achieve the desired device characterization during fabrication.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize appropriate thickness of the strengthening structures as claimed to meet the requirements of the particular design, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. /n re Aller, 105 USPQ 233.
Regarding claim 9, as best the examiner is able to ascertain the claimed invention, Moser does not disclose a third region disposed on a side, away from the first region, of the second region, wherein the plurality of strengthening structures comprise a first strengthening structure disposed between the first region and the second region, and a second strengthening structure disposed between the third region and the second region.
Adding or repeating the same structure in the art of semiconductor process are subject to routine experimentation and optimization to achieve the desired device characterization during fabrication.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to add the second strengthening structures as claimed to meet the requirements of the particular design, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. /n re Aller, 105 USPQ 233.
Regarding claim 10, as best the examiner is ablet to ascertain the claimed invention Moser does not disclose a projection area of the second strengthening structure on a plane where the substrate is located completely overlaps, or partially overlaps, or completely does not overlap with a projection area of the first strengthening structure on the plane where the substrate is located.
Arranging strengthening structures in the art of semiconductor process are subject to routine experimentation and optimization to achieve the desired device characterization during fabrication.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to arrange the first strengthening structures as claimed to meet the requirements of the particular design, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. /n re Aller, 105 USPQ 233.
Regarding claim 11, as best the examiner is able to ascertain the claimed invention, Moser does not disclose shapes of projection of the first strengthening structure and the second strengthening structure on a plane where the substrate is located comprise any one of a polygon, a circle, an ellipse, a strip, and a mesh.
Shapes of first and second strengthening structures in the art of semiconductor process are subject to routine experimentation and optimization to achieve the desired device characterization during fabrication.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize appropriate shapes of the first and second strengthening structures as claimed to meet the requirements of the particular design, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. /n re Aller, 105 USPQ 233.
Regarding claim 12, as best the examiner is able to ascertain the claimed invention, Moser does not disclose the shapes of projection of the first strengthening structure and the second strengthening structure on the plane where the substrate is located are different.
Shapes of the projection of first and second strengthening structures in the art of semiconductor process are subject to routine experimentation and optimization to achieve the desired device characterization during fabrication.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize appropriate shapes of the projection of the first and second strengthening structures as claimed to meet the requirements of the particular design, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. /n re Aller, 105 USPQ 233.
Claim(s) 13-15, are rejected under 35 U.S.C. 103 as being unpatentable over Degroote et al., EP 2317554 in view of Moser et al.
Regarding claim 13, Degroote discloses (figs. 1A-1C, 2 and related text) a semiconductor device structure (10), a nucleation layer (4), a buffer layer (5) and an active layer (6), wherein the nucleation layer, the buffer layer and the active layer are disposed a substrate (11) in sequence (fig. 1A), and the active layer is a high- electron-mobility transistor [0048].
Degroote does not disclose a semiconductor device comprising: a composite substrate.
Moser discloses a composite substrate (14), comprising: a substrate (10); and a plurality of strengthening structures (12) disposed within the substrate at intervals (fig. 1D), wherein a material of the plurality of strengthening structures is a poly-crystal material (12a can be Si3N4 which polycrystalline material) material ([0022]) in order to provide mechanical stability during the process of forming the semiconductor device [0003].
Degroote and Moser are analogous art because they both are directed to a semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Degroote with the specified feature of Moser because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, on the effective filing date of the claimed invention, to modify Degroote to include the composite substrate as taught by Moser in order to provide mechanical stability during the process of forming the semiconductor device [0003].
Regarding claim 14, Degroote as modified by Moser discloses the semiconductor device structure is a high-electron-mobility transistor [0048], and the active layer comprises a GaN channel (7) layer and an AlGaN barrier layer ([0048]) stacked in sequence, and a source electrode (42), a drain electrode (42), and a gate electrode (41) disposed on the AlGaN barrier layer (fig. 2).
Regarding claim 15, Degroote as modified by Moser discloses the semiconductor device structure is a light-emitting diode [0049], the active layer comprises an N-type semiconductor layer [0049], a multiple quantum well stack layer [0049].
Degroote as modified by Moser does not explicitly disclose a P-type semiconductor layer stacked in sequence, a cathode disposed on the N-type semiconductor layer, and an anode disposed on the P-type semiconductor layer.
However, the above structures are essential elements for functioning light emitting diode device. It would have been obvious to one of ordinary skill in the art, on the effective filing date of the claimed invention, to adjust modified structure of Degroote and Moser to include a P-type semiconductor layer stacked in sequence, a cathode disposed on the N-type semiconductor layer, and an anode disposed on the P-type semiconductor layer because a functioning light emitting diode requires such element for the proper functioning of the device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL A GEBREMARIAM whose telephone number is (571)272-1653. The examiner can normally be reached 8:30-4PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SAMUEL A GEBREMARIAM/Primary Examiner, Art Unit 2811