Prosecution Insights
Last updated: October 02, 2026

Examiner: GEBREMARIAM, SAMUEL A

Tech Center 2800 • Art Units: 2811

This examiner grants 83% of resolved cases

Analysis

Samuel A Gebremariam is an examiner in Tech Center 2800 and Art Unit 2811, with a high volume of 846 resolved cases. The examiner has an allowance rate of 83.2 percent, which is quite favorable for applicants. The median days to allowance is 1004, providing a benchmark for the expected duration of successful prosecution.

The interview lift for this examiner is 8.1 percent. While this indicates a positive impact from direct engagement, the benefit is more moderate than with some other examiners. However, an interview can still be a useful tool to refine claim language and potentially expedite the 1004-day process. The 846 resolved cases suggest a consistent and predictable examination style.

With an 83.2 percent allowance rate, well-supported applications have a strong chance of success. Practitioners should use the 8.1 percent interview lift as a tactical option when written communication does not lead to a quick resolution. The 1004-day timeline should be clearly communicated to clients as part of their IP planning.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

83.2%
Allow Rate
+15.2% vs TC avg
856
Total Applications
+8.1%
Interview Lift
1004
Avg Prosecution Days
Based on 846 resolved cases, 2023–2026

Rejection Statute Breakdown

0.7%
§101 Eligibility
28.5%
§102 Novelty
38.4%
§103 Obviousness
22.6%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18699894 DISPLAY PANEL AND PREPARATION METHOD THEREFOR, AND DISPLAY DEVICE Non-Final OA BOE Technology Group Co., Ltd.
18211455 SUBSTRATE PROCESS FLOW FOR ENABLING SUBSTRATE TO DIE HYBRID BONDING Non-Final OA Intel Corporation
18524762 REDUCED OPTICAL TRANSMITTANCE GLASSES FOR EMISSIVE DISPLAYS Final Rejection CORNING INCORPORATED
18614794 HYBRID INTERCONNECT STRUCTURE WITH TOPOLOGICAL CONDUCTOR INTERFACE LAYER Non-Final OA INTERNATIONAL BUSINESS MACHINES CORPORATION
18454242 DYNAMIC PLATED METAL THICKNESS FOR SEMICONDUCTOR PACKAGE Final Rejection Texas Instruments Incorporated
17852925 INTEGRATED CIRCUIT WITH INDUCTOR IN MAGNETIC PACKAGE Final Rejection TEXAS INSTRUMENTS INCORPORATED
17841838 ARCHITECTURE AND PACKAGING FOR INTEGRATED CIRCUITS Final Rejection Cisco Technology, Inc.
18776416 3DIC STRUCTURE FOR HIGH VOLTAGE DEVICE ON A SOI SUBSTRATE Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18655466 SEMICONDUCTOR DEVICES HAVING CONTACT FIELD PLATES AND METHODS FOR FORMING THE SAME Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18126701 MICRO-LED STRUCTURES AND PHOTOLUMINESCENT MATERIALS HAVING UV LIGHT FILTERS Final Rejection Applied Materials, Inc.
18429117 INTEGRATED CIRCUIT DIE STACK WITH A BRIDGE DIE Final Rejection Advanced Micro Devices, Inc.
18718313 PROCESS FOR THE MANUFACTURE OF A SEMICONDUCTOR STRUCTURE COMPRISING A POLYCRYSTALLINE SILICON CARBIDE SUBSTRATE AND AN ACTIVE LAYER OF SINGLE-CRYSTAL SILICON CARBIDE Non-Final OA Soitec

Facing This Examiner?

IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.

Build Your Strategy

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month