Prosecution Insights
Last updated: October 04, 2026
Application No. 18/458,159

METHOD OF MANUFACTURING PACKAGING SUBSTRATE AND PACKAGING SUBSTRATE MANUFACTURED THEREBY

Non-Final OA §103
Filed
Aug 30, 2023
Examiner
SABUR, ALIA
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Absolics Inc.
OA Round
3 (Non-Final)
75%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
450 granted / 603 resolved
+6.6% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
38 currently pending
Career history
635
Total Applications
across all art units

Statute-Specific Performance

§101
1.9%
-38.1% vs TC avg
§103
61.8%
+21.8% vs TC avg
§102
13.9%
-26.1% vs TC avg
§112
18.2%
-21.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 603 resolved cases

Office Action

§103
DETAILED ACTION Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1-14 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (U.S. PGPub 2022/0051972) in view of Ham (U.S. PGPub 2022/0210921). Regarding claim 10, Kim teaches a method of manufacturing a packaging substrate (Fig. 4(b)) comprising: preparing a glass substrate in which a cavity portion is disposed and a cavity module, arranging the cavity module in the cavity portion (22, 21, [0076]; 28/281, [0153]); laminating an insulating layer on the glass substrate (284, [0169]-[0172], cavity distribution pattern formed on the packaging substrate), wherein the cavity module comprises a cavity element (40, [0185]). Kim does not explicitly teach wherein the cavity module comprises a first insulating layer surrounding at least a part of the cavity element, and the first insulating layer is disposed on a surface other than one surface or on all surfaces of the cavity element. Ham teaches a substrate in which a cavity portion is disposed (Fig. 4, 110, [0036], [0086]-[0087]), arranging a cavity module in the cavity portion (Fig. 8, [0094]), and laminating a second insulating layer on the substrate (Fig. 9, 142, [0097]), wherein the cavity module comprises a cavity element and a first insulating layer surrounding at least a part of the cavity element, and the first insulating layer is disposed on all surfaces of the cavity except for one surface (Fig. 9, 141, [0097]). Therefore it would have been obvious to a person having ordinary skill in the art before the effective filing date to combine the teachings of Ham with Kim such that the cavity module comprises a first insulating layer surrounding at least a part of the cavity element, and the first insulating layer is disposed on a surface other than one surface or on all surfaces of the cavity element for the purpose of preventing signal loss and improving signal characteristics (Ham, [0067]). Regarding claim 11, the combination of Kim and Ham teaches wherein the first insulating layer and the second insulating layer have different dielectric constants (Ham, [0065]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Kim and Ham for the reasons set forth in the rejection of claim 10. Regarding claim 12, the combination of Kim and Ham teaches wherein the first insulating layer comprises an Ajinomoto Build-up Film (ABF) or an epoxy molding compound (EMC) (Ham, [0065]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Kim and Ham for the reasons set forth in the rejection of claim 10. Regarding claim 13, the combination of Kim and Ham teaches wherein the second insulating layer comprises an Ajinomoto Build-up Film (ABF) or an epoxy molding compound (EMC) (Ham, [0065]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Kim and Ham for the reasons set forth in the rejection of claim 10. Regarding claim 14, the combination of Kim and Ham teaches wherein one or more connection electrodes are disposed in a direction toward the bottom surface of the cavity element (Kim, [0193], [0198]; Ham, Fig. 9, 121, [0096]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Kim and Ham for the reasons set forth in the rejection of claim 10. Allowable Subject Matter Claims 1-9 are allowed. The following is a statement of reasons for the indication of allowable subject matter: Applicant’s arguments dated 8/14/26, pages 7-8 are persuasive. Regarding independent claim 1, the prior art teaches all of the limitations of claim 1 except wherein the second insulating layer having a different dielectric constant is incorporated into a remaining portion of the cavity portion other than the cavity module comprising the cavity element and first insulating layer (see rejection of claims 10-11). Ham teaches wherein the first insulating layer fills the cavity and the second insulating layer is formed outside the cavity for reasons of mechanical stability, warpage, and electronic properties (Ham, [0042], [0046], [0066]-[0067], [0095]). Takashima (U.S. PGPub 2008/0277150) teaches a cavity module with a first insulating layer surrounding a cavity element and a second insulating layer filling the remaining portion of the cavity (Figs. 19-20, 101, 151, 92, [0153]) but does not teach the first and second insulating layers having different properties. Prior art, alone or in combination, fails to teach or suggest every limitation of the invention as claimed. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALIA SABUR whose telephone number is (571)270-7219. The examiner can normally be reached M-F 9:30-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALIA SABUR/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Aug 30, 2023
Application Filed
Oct 31, 2025
Non-Final Rejection mailed — §103
Mar 27, 2026
Response Filed
Jun 01, 2026
Final Rejection mailed — §103
Aug 14, 2026
Request for Continued Examination
Aug 18, 2026
Response after Non-Final Action
Aug 25, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Patent 12740120
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
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4y 3m to grant Granted Aug 25, 2026
Patent 12713706
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
75%
Grant Probability
81%
With Interview (+6.3%)
2y 3m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 603 resolved cases by this examiner. Grant probability derived from career allowance rate.

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