DETAILED ACTION
This Office action responds to Applicant’s amendments filed on 05/13/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Amendment Status
The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-28. Claims 8, 16-20, 24 and 28 are withdrawn by the Applicant. Thus, claims 1-7, 9-15, 21-23, and 25-27 are prosecuted in this Office action.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2, 4-5, 7, 9, and 14-15 is rejected under 35 U.S.C. 103 as being unpatentable over Yoon (US 2021/0127484) in view of Kim (US 2024/0079393).
Regarding claim 1, Yoon shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) most aspects of the instant invention including a package substrate 100A or 150/131/110/121/140, comprising a first substrate, comprising:
A first metallization layer 121/122 comprising a first surface and extending in a first direction
The first metallization layer 121/122 comprising:
A first film insulating layer 121 that does not include a reinforcing material (see, e.g., Yoon: par. [0038], material such as an epoxy resin, a thermoplastic resin such as polyimide that do not include a reinforcing material as fillers for fibers)
A first metal layer 122 comprising:
A plurality of first metal interconnects 122 exposed from the first surface in a first region of the first film metallization layer 121/122
A plurality of second metal interconnects 122 exposed from the first surface in a second region of the first film metallization layer 121/122
A second substrate comprising:
A first dielectric metallization layer 121/122 adjacent to the first surface in the second region
The first dielectric metallization layer 121/122 comprising:
A second surface
A second insulating layer 121
A second metal layer 122 comprising a plurality of first metal pads 122w exposed from the second surface
PNG
media_image1.png
713
1430
media_image1.png
Greyscale
However, Yoon fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that the first dielectric metallization layer 121/122 is a pre-impregnated (PPG) metallization layer that comprises a PPG material. Yoon shows that the first dielectric metallization layer 121/122w is a metallization layer comprising a dielectric layer 121 (see, e.g., Yoon: par. [0031]). Kim, in a similar device to Yoon, shows (see, e.g., Kim: fig. 1) that the dielectric metallization layer 314H comprises prepreg or pre-impregnated (PPG) material (see, e.g., Kim: par. [0040]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use either the dielectric metallization layer of Yoon or the PPG metallization layer of Kim because these were recognized in the semiconductor art for their use as metallization layers in semiconductor device packages, as taught by Yoon and by Kim, and selecting between known equivalents would be within the level of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007).
Regarding claim 2, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the first substrate further comprises:
A second film metallization layer 121/122 adjacent to the first film metallization layer 121/122 and extending in the first direction
The second film metallization layer 121/122 comprising:
A third surface
A second film insulating layer 121
A third metal layer 122 comprising:
A plurality of third metal interconnects 122w exposed from the third surface
A plurality of fourth metal interconnects 122w exposed from the third surface
The first film metallization layer 121/122 further comprising:
A plurality of second vias 123w each coupling a second metal interconnect 122w of the plurality of second metal interconnects 122w to a fourth metal interconnect 122w of the plurality of fourth metal interconnects 122w
Regarding claim 4, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the second substrate further comprises a plurality of first vias 123w each coupling a first metal pad 122w of the plurality of first metal pads 122w to a second metal interconnect 122w of the plurality of second metal interconnects 122w.
Regarding claim 5, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the second substrate further comprises a second dielectric metallization layer in the second region and adjacent to the first PPG metallization layer on an opposite side of the first PPG metallization layer. Even if Yoon fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that the first dielectric metallization layer 121/122 is a pre-impregnated (PPG) metallization layer that comprises a PPG material. Yoon shows that the first dielectric metallization layer 131/132 is a metallization layer comprising a dielectric layer 131 (see, e.g., Yoon: par. [0031]), then Kim, in a similar device to Yoon, shows (see, e.g., Kim: fig. 1) that the dielectric metallization layer 314H comprises prepreg or pre-impregnated (PPG) material (see, e.g., Kim: par. [0040]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use either the dielectric metallization layer of Yoon or the PPG metallization layer of Kim because these were recognized in the semiconductor art for their use as metallization layers in semiconductor device packages, as taught by Yoon and Kim, and selecting between known equivalents would be within the level of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007).
Thus, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the second substrate further comprises a second PPG metallization layer 131/132 in the second region and adjacent to the first PPG metallization layer 122/122 on an opposite side of the first PPG metallization layer 122/122.
Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the second PPG metallization layer 131/132 comprising:
A third surface
A third PPG insulating layer 131 comprising PPG material
A third metal layer 132 comprising a plurality of third metal interconnects 132w exposed from the third surface
The first PPG metallization layer 121/122 further comprises:
A plurality of first vias 123w each coupling a first metal pad 122w of the plurality of first metal pads 122w to a third metal interconnect 122w of the plurality of third metal interconnects 122w
The second PPG metallization layer 131/132 further comprises a plurality of second vias 133w each coupling a third metal interconnect 132w of the plurality of third metal interconnects 132w to a second metal interconnect 132w of the plurality of second metal interconnect.
Regarding claim 7, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) a third substrate comprising:
A second film metallization layer 121/122 adjacent to the first film metallization layer and extending in the first direction
The second film metallization layer 121/122 comprising:
A third surface
A second film insulating layer 121
A third metal layer 122, comprising:
A plurality of third metal interconnects 122w exposed from the third surface
A plurality of fourth metal interconnects 122w exposed from the third surface
A core layer 110 between the first substrate and the third substrate in a second direction orthogonal to the first direction
The core layer 110 comprising:
A plurality of metal pillars 115
Regarding claim 9, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the first film insulating layer 121 comprises a polyimide (see, e.g., Yoon: par. [0038]).
Regarding claim 14, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the device is selected from the group consisting of: a set top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a global positioning system (GPS) device; a mobile phone; a cellular phone; a smart phone 1100; a session initiation protocol (SIP) phone; a tablet; a phablet; a server; a computer; a portable computer; a mobile computing device; a wearable computing device; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; a video player; a digital video disc (DVD) player; a portable digital video player; an automobile; a vehicle component; avionics systems; a drone; and a multicopter.
Regarding claim 15, Yoon shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) most aspects of the instant invention including a package substrate 100A or 150/131/110/121/140, comprising forming a first substrate, comprising:
Forming a first metallization layer 121/122 comprising a first surface and extending in a first direction
Forming a first metallization layer 121/122 comprising:
Forming a first film insulating layer 121 that does not include a reinforcing material (see, e.g., Yoon: par. [0038], material such as an epoxy resin, a thermoplastic resin such as polyimide that do not include a reinforcing material as fillers for fibers)
Forming a first metal layer 122 comprising:
Forming a plurality of first metal interconnects 122 exposed from the first surface in a first region of the first film metallization layer 121/122
Forming a plurality of second metal interconnects 122 exposed from the first surface in a second region of the first film metallization layer 121/122
Forming a second substrate comprising:
Forming a first dielectric metallization layer 121/122 adjacent to the second surface in the second region
Forming first dielectric metallization layer 121/122 comprising:
Forming a second insulating layer 121
Forming a second metal layer 122
Forming a plurality of first metal pads 122w exposed from the second surface
However, Yoon fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show the method step of the first dielectric metallization layer 121/122 that is a pre-impregnated (PPG) metallization layer comprising a PPG material. Yoon shows that method step of the first dielectric metallization layer 121/122w that is a metallization layer comprising a dielectric layer 121 (see, e.g., Yoon: par. [0031]). Kim, in a similar method to Yoon, shows (see, e.g., Kim: fig. 1) that the dielectric metallization layer 314H comprises prepreg or pre-impregnated (PPG) material (see, e.g., Kim: par. [0040]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use either the dielectric metallization layer of Yoon or the PPG metallization layer of Kim because these were recognized in the semiconductor art for their use as metallization layers in semiconductor device packages, as taught by Yoon and by Kim, and selecting between known equivalents would be within the level of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Yoon in view of Kim in further view of Dutta (US 2024/0347913).
Regarding claim 3, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that most aspects of the instant invention, including metal interconnects 122.
However, Yoon in view of Kim fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that the first pitch of first metal interconnects is less or equal to 5 µm. Dutta, in a similar device to Yoon in view of Kim, shows (see, e.g., Dutta: fig. 2B) that the pitch of metal interconnects 240(1) - 240(3) and 238(1) - 238(3) is less than 5 µm (see, e.g., Dutta: par. [0041]). Dutta further shows (see, e.g., Dutta: fig. 2B) that the metal interconnects 240(2), 240(3) are formed from a smaller L/S metal pattern and/or with a smaller pitch so that, for example, the device elements 208(1)-208(6) can be made of a smaller size to support smaller wavelengths or to support higher RF frequencies (see, e.g., Dutta: par. [0041]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include a pitch of metal interconnect of Dutta in the device of Yoon in view of Kim, in order to fabricate the device elements of a smaller size to support smaller wavelengths or to support higher RF frequencies.
However, the differences in the pitches will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see paragraph below) of the mentioned pitches, and Dutta has identified such thicknesses as result-effective variables subject to optimization (see, e.g., Dutta: par. [0041]), it would have been obvious to one of ordinary skill in the art to use these pitch values in the device of Yoon in view of Kim.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed pitch values or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Yoon in view of Kim in further view of Darmawikarta (US 2020/0051915).
Regarding claim 6, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) a layer 140 adjacent to the first PPG metallization layer 121/122.
Yoon in view of Kim fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that this layer is a solder resist layer. Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the layer is a passivation ABF layer. Darmawikarta, in a similar device to Yoon in view of Kim, shows (see, e.g., Darmawikarta: fig. 2I) a solder resist layer 241. Darmawikarta further shows that the solder resist mask layer 241 is at a lateral surface of the multilayer substrate structure 105 and by removing portions of the solder resist mask layer 241 to form openings 242, 243, it results in exposing the substrate interconnect 106 and the bridge contact structure 235 by a HR lithographic process and/or HR exposure tool (for the exposure and development to open the solder resist openings) (see, e.g., Darmawikarta: par. [0070]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use either the solder resist layer of Darmawikarta or the passivation ABF layer of Yoon in view of Kim because these were recognized in the semiconductor art for their use as solder mask layers in semiconductor device packages, as taught by Darmawikarta and by Yoon and Kim, and selecting between known equivalents would be within the level of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007).
Yoon in view of Kim in view of Darmawikarta shows (see, e.g., Yoon: fig. 3, and annotated fig. 3, and see, e.g., Darmawikarta: fig. 2I) that:
A solder resist layer 140 adjacent to the first PPG metallization layer 121/122 such that the first PPG metallization layer 121/122 is between the solder resist layer 140 and the first substrate in a second direction orthogonal to the first direction
The solder resist layer 140 comprising a plurality of openings
The plurality of first metal pads 122w each exposed from an opening of the plurality of openings
Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Yoon in view of Kim in further view of Oshima (US 2016/0234932).
Regarding claim 10, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) a first film insulating layer 121 and a second film insulating layer 121.
However, Yoon in view of Kim fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that a ratio of a second thickness of the second insulating layer 121, in a second direction orthogonal to the first direction, to a first thickness of the first film insulating layer 121, in the second direction, is at least 1.5. Oshima, in a similar device to Yoon in view of Kim, shows (see, e.g., Oshima: fig. 13B) that the first insulator film 21 may have a thickness in a range of 1 μm to 100 μm (see, e.g., Oshima: par. [0037]), and the second insulator film 22 may have a thickness in a range of 15 μm to 200 μm (see, e.g., Oshima: par. [0039]). Thus, Oshima shows cases when the thickness ratios are at least 1.5. Oshima shows (see, e.g., Oshima: fig. 13B) that the thickness of the first insulating layer 21 and the thickness of the first insulating layer 22 are adjusted to control the CTE coefficient, and suppress the warping of the circuit board (see, e.g., Oshima: par. [0040]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the ratio of the thicknesses of the first and second insulating layers of Oshima in the device of Yoon in view of Kim, in order to control the CTE coefficient, and suppress the warping of the circuit board.
However, the differences in the ratio will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see paragraph 27) of the mentioned ratios, and Oshima has identified such ratios as result-effective variables subject to optimization (see, e.g., Oshima: par. [0040]), it would have been obvious to one of ordinary skill in the art to use these ratio values in the device of Yoon in view of Kim.
Regarding claim 11, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) a first film insulating layer 121 and a second film insulating layer 121.
However, Yoon in view of Kim fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that the first film insulating layer 121 has a first thickness in a second direction orthogonal to the first direction between 10 μm and 35 μm, and the second insulating layer 121 has a second thickness in the second direction between 15 μm and 45 μm.
Oshima, in a similar device to Yoon in view of Kim, shows (see, e.g., Oshima: fig. 13B) that the first insulator film 21 may have a thickness in a range of 1 μm to 100 μm (see, e.g., Oshima: par. [0037]), and the second insulator film 22 may have a thickness in a range of 15 μm to 200 μm (see, e.g., Oshima: par. [0039]). Oshima shows (see, e.g., Oshima: fig. 13B) that the thickness of the first insulating layer 21 and the thickness of the first insulating layer 22 are adjusted to control the CTE coefficient, and suppress the warping of the circuit board (see, e.g., Oshima: par. [0040]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the thicknesses of the first and second insulating layers of Oshima in the device of Yoon in view of Kim, in order to control the CTE coefficient, and suppress the warping of the circuit board.
However, the differences in the thicknesses will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see paragraph 27) of the mentioned thicknesses, and Oshima has identified such thicknesses as result-effective variables subject to optimization (see, e.g., Oshima: par. [0040]), it would have been obvious to one of ordinary skill in the art to use these thickness values in the device of Yoon in view of Kim.
Claims 12 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Yoon in view of Kim in further view of Byun (US 2008/0088037).
Regarding claim 12, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) a first film insulating layer 121 and a PPG metallization layer 121.
However, Yoon in view of Kim fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that the first film insulating layer 121 has a first modulus of elasticity, and the first PPG metallization layer 121 has a second modulus of elasticity, wherein the second modulus of elasticity is greater than the first modulus of elasticity.
Byun, in a similar device to Yoon in view of Kim, shows (see, e.g., Byun: fig. 7) that the dielectric/insulating layer (as a PPG metallization layer) 234 has a second modulus of elasticity (ranging from approximately 5 GPa to approximately 10 GPa) and the dielectric/insulating layer (as the first film insulating) 233 has first modulus of elasticity (ranging between 300 MPa and 5GPa) (see, e.g., Byun: par. [0053]). Byun further shows that the modulus of elasticity for the dielectric/insulating layers are chosen in order to reduce the expansion of the insulators and reduce the tensile stress that can introduce defects into the interconnects (see, e.g., Byun: par. [0043]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the modulus of a second insulating layer of Byun greater than the modulus of a first insulating layer in the device of Yoon in view of Kim, in order to reduce the expansion of the insulators and reduce the tensile stress that can introduce defects into the interconnects.
However, the differences in the moduli will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see paragraph 27) of the mentioned moduli, and Byun has identified such moduli as result-effective variables subject to optimization (see, e.g., Byun: par. [0053]), it would have been obvious to one of ordinary skill in the art to use these modulus values in the device of Yoon in view of Kim.
Regarding claim 13, Yoon in view of Kim shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) a first film insulating layer 121 and a PPG metallization layer 121.
However, Yoon in view of Kim fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that the first film insulating layer 121 has a first modulus of elasticity, and the first PPG metallization layer 121 has a second modulus of elasticity, wherein the first modulus of elasticity is between 5 GigaPascal (GPa) and 20 GPa, and the second modulus of elasticity between 14 GPa and 25 GPa.
Byun, in a similar device to Yoon in view of Kim, shows (see, e.g., Byun: fig. 7) that the dielectric/insulating layer (as a PPG metallization layer) 234 has a second modulus of elasticity (ranging from approximately 5 GPa to approximately 10 GPa) and the dielectric/insulating layer (as the first film insulating) 233 has first modulus of elasticity (ranging between 300 MPa and 5GPa) (see, e.g., Byun: par. [0053]). Byun further shows that the modulus of elasticity for the dielectric/insulating layers are chosen in order to reduce the expansion of the insulators and reduce the tensile stress that can introduce defects into the interconnects (see, e.g., Byun: par. [0043]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the moduli of a first and second insulating layers of Byun in the device of Yoon in view of Kim, in order to reduce the expansion of the insulators and reduce the tensile stress that can introduce defects into the interconnects.
However, the differences in the moduli will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see paragraph 27) of the mentioned moduli, and Byun has identified such moduli as result-effective variables subject to optimization (see, e.g., Byun: par. [0053]), it would have been obvious to one of ordinary skill in the art to use these modulus values in the device of Yoon in view of Kim.
Claims 21-23, and 27 are rejected under 35 U.S.C. 103 as being unpatentable over Yoon (US 2021/0127484) in view of Kim (US 2024/0079393) in view of Lee (US 2022/0262777) in further view of Oh (US 2021/0066210).
Regarding claim 21, Yoon shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) most aspects of the instant invention including a package substrate 100A or 150/131/110/121/140, comprising a first substrate, comprising:
A first metallization layer 121/122 comprising a first surface and extending in a first direction
The first metallization layer 121/122 comprising:
A first film insulating layer 121 that does not include a reinforcing material (see, e.g., Yoon: par. [0038], material such as an epoxy resin, a thermoplastic resin such as polyimide that do not include a reinforcing material as fillers for fibers)
A first metal layer 122 comprising:
A plurality of first metal interconnects 122 exposed from the first surface in a first region of the first film metallization layer 121/122
A plurality of second metal interconnects 122 exposed from the first surface in a second region of the first film metallization layer 121/122
A second substrate comprising:
A first dielectric metallization layer 121/122 adjacent to the first surface in the second region
The first dielectric metallization layer 121/122 comprising:
A second surface
A second insulating layer 121
A second metal layer 122 comprising a plurality of first metal pads 122w exposed from the second surface
However, Yoon fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that the first dielectric metallization layer 121/122 is a pre-impregnated (PPG) metallization layer that comprises a PPG material. Yoon shows that the first dielectric metallization layer 121/122w is a metallization layer comprising a dielectric layer 121 (see, e.g., Yoon: par. [0031]). Kim, in a similar device to Yoon, shows (see, e.g., Kim: fig. 1) that the dielectric metallization layer 314H comprises prepreg or pre-impregnated (PPG) material (see, e.g., Kim: par. [0040]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use either the dielectric metallization layer of Yoon or the PPG metallization layer of Kim because these were recognized in the semiconductor art for their use as metallization layers in semiconductor device packages, as taught by Yoon and by Kim, and selecting between known equivalents would be within the level of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007).
Yoon in view of Kim fails (see, e.g., Yoon: fig. 3, and annotated fig. 3, and see, e.g., Kim: fig. 1) to show a first die comprising a plurality of die interconnects 160 each connected to a first metal interconnect 122w of the plurality of first metal interconnects 122w. Lee, in a similar device to Yoon in view of Kim, shows (see, e.g., Lee: fig. 1) shows a die 600 that has a plurality of die interconnects 650 each connected to a metal interconnect 520 of the plurality of metal interconnects 520. Lee further shows (see, e.g., Lee: fig. 1) that the die interconnects 650 electrically/directly connect the circuit layer of the device 600 to the intermediate pads 530 of the intermediate layer 550 (see, e.g., Lee: par. [0071]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include a plurality of die interconnect of Lee each connected to a metal interconnect in the device of Yoon in view of Kim, in order to electrically/directly connect the circuit layer of the device to the intermediate pads of the intermediate layers.
However, Yoon in view of Kim in view of Lee fails (see, e.g., Yoon: fig. 3, and annotated fig. 3, and see, e.g., Kim: fig. 1) to show that a second die adjacent to the first die such that the first die is between the second die and the package substrate in a second direction orthogonal to the first direction. Oh, in a similar device to Yoon in view of Kim in view of Lee, shows (see, e.g., Oh: fig. 4) a second die 170 adjacent to the first die such that the first die 170 is between the second die 170 and the package substrate 120/111a/111b/130 in a second direction orthogonal to the first direction. Oh further shows (see, e.g., Oh: fig. 4) that a second die 170 adjacent to the first die such that the first die 170 is between the second die 170 and the package substrate 120/111a/111b/130 in a second direction orthogonal to the first direction, in order to include a stack memory die (see, e.g., Oh: par. [0058]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include a second die adjacent to the first die such that the first die between the second die and the package substrate of Oh in the device of Yoon in view of Kim in view of Lee, in order to in order to include a stack memory die.
Yoon in view of Kim in view of Lee in view of Oh shows (see, e.g., Oh: fig. 4) a plurality of wire bonds 170W each connected to the second die 170 and a first metal pad 112b of the plurality of first metal pads 112b.
Regarding claim 22, Yoon in view of Kim in view of Lee in view of Oh shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the second substrate further comprises a plurality of first vias 123w each coupling a first metal pad 122w of the plurality of first metal pads 122w to a second metal interconnect 122w of the plurality of second metal interconnects 122w.
Regarding claim 23, Yoon in view of Kim in view of Lee in view of Oh shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) a third substrate comprising:
A second film metallization layer 121/122 adjacent to the first film metallization layer and extending in the first direction
The second film metallization layer 121/122 comprising:
A third surface
A second film insulating layer 121
A third metal layer 122, comprising:
A plurality of third metal interconnects 122w exposed from the third surface
A plurality of fourth metal interconnects 122w exposed from the third surface
A core layer 110 between the first substrate and the third substrate in a second direction orthogonal to the first direction
The core layer 110 comprising:
A plurality of metal pillars 115 each coupled to a first metal interconnect 122w of the plurality of first metal interconnects 122w, and to a third metal interconnect 132w of the plurality of third metal interconnects 132w
Regarding claim 27, Yoon in view of Kim in view of Lee in view of Oh shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that the device is selected from the group consisting of: a set top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a global positioning system (GPS) device; a mobile phone; a cellular phone; a smart phone 1100; a session initiation protocol (SIP) phone; a tablet; a phablet; a server; a computer; a portable computer; a mobile computing device; a wearable computing device; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; a video player; a digital video disc (DVD) player; a portable digital video player; an automobile; a vehicle component; avionics systems; a drone; and a multicopter.
Claims 25 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Yoon in view of Kim in view of Lee in view of Oh in further view of Byun (US 2008/0088037).
Regarding claim 25, Yoon in view of Kim in view of Lee in view of Oh shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) a first film insulating layer 121 and a PPG metallization layer 121.
However, Yoon in view of Kim in view of Lee in view of Oh fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that the first film insulating layer 121 has a first modulus of elasticity, and the first PPG metallization layer 121 has a second modulus of elasticity, wherein the second modulus of elasticity is greater than the first modulus of elasticity.
Byun, in a similar device to Yoon in view of Kim in view of Lee in view of Oh, shows (see, e.g., Byun: fig. 7) that the dielectric/insulating layer (as a PPG metallization layer) 234 has a second modulus of elasticity (ranging from approximately 5 GPa to approximately 10 GPa) and the dielectric/insulating layer (as the first film insulating) 233 has first modulus of elasticity (ranging between 300 MPa and 5GPa) (see, e.g., Byun: par. [0053]). Byun further shows that the modulus of elasticity for the dielectric/insulating layers are chosen in order to reduce the expansion of the insulators and reduce the tensile stress that can introduce defects into the interconnects (see, e.g., Byun: par. [0043]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the modulus of a second insulating layer of Byun greater than the modulus of a first insulating layer in the device of Yoon in view of Kim in view of Lee in view of Oh, in order to reduce the expansion of the insulators and reduce the tensile stress that can introduce defects into the interconnects.
However, the differences in the moduli will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see paragraph 27) of the mentioned moduli, and Byun has identified such moduli as result-effective variables subject to optimization (see, e.g., Byun: par. [0053]), it would have been obvious to one of ordinary skill in the art to use these modulus values in the device of Yoon in view of Kim in view of Lee in view of Oh.
Regarding claim 26, Yoon in view of Kim in view of Lee in view of Oh im shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) a first film insulating layer 121 and a PPG metallization layer 121.
However, Yoon in view of Kim in view of Lee in view of Oh fails (see, e.g., Yoon: fig. 3, and annotated fig. 3) to show that the first film insulating layer 121 has a first modulus of elasticity, and the first PPG metallization layer 121 has a second modulus of elasticity, wherein the first modulus of elasticity is between 5 GigaPascal (GPa) and 20 GPa, and the second modulus of elasticity between 14 GPa and 25 GPa.
Byun, in a similar device to Yoon in view of Kim in view of Lee in view of Oh, shows (see, e.g., Byun: fig. 7) that the dielectric/insulating layer (as a PPG metallization layer) 234 has a second modulus of elasticity (ranging from approximately 5 GPa to approximately 10 GPa) and the dielectric/insulating layer (as the first film insulating) 233 has first modulus of elasticity (ranging between 300 MPa and 5GPa) (see, e.g., Byun: par. [0053]). Byun further shows that the modulus of elasticity for the dielectric/insulating layers are chosen in order to reduce the expansion of the insulators and reduce the tensile stress that can introduce defects into the interconnects (see, e.g., Byun: par. [0043]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the moduli of a first and second insulating layers of Byun in the device of Yoon in view of Kim in view of Lee in view of Oh, in order to reduce the expansion of the insulators and reduce the tensile stress that can introduce defects into the interconnects.
However, the differences in the moduli will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Accordingly, since the applicant has not established the criticality (see paragraph 27) of the mentioned moduli, and Byun has identified such moduli as result-effective variables subject to optimization (see, e.g., Byun: par. [0053]), it would have been obvious to one of ordinary skill in the art to use these modulus values in the device of Yoon in view of Kim in view of Lee in view of Oh.
Response to Arguments
The examiner considered the Applicants’ arguments, but are moot in view of the new grounds of rejection.
The applicants argue:
Yoon fails to show “a first film insulating layer that does not include a reinforcing material”.
The examiner responds:
In view of the new grounds of rejection, Yoon shows (see, e.g., Yoon: fig. 3, and annotated fig. 3) that a first film insulating layer 121 can contain “a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide” (see, e.g., Yoon: par. [0038]), materials which does not contains reinforcing material as fillers and fibers, as it is indicated in the specification of the instant invention. This is a negative limitation (see MPEP 2173.05(i)). Thus, because the Applicant very clearly defines what "reinforcing material" is (as material elements, see the specification of the instant invention), then it can be understood that any material without the material elements from the specification is a material that does not have reinforcing material.
Conclusion
A shortened statutory period for reply to this final action is set to expire three months from the mailing date of this action. In the event a first reply is filed within two months of the mailing date of this final action and the advisory action is not mailed until after the end of the three-month shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than six months from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIBERIU DAN ONUTA whose telephone number is (571) 270-0074 and between the hours of 9:00 AM to 5:00 PM (Eastern Standard Time) Monday through Friday or by e-mail via Tiberiu.Onuta@uspto.gov. If attempts to reach the examiner by telephone or email are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (in USA or Canada) or 571-272-1000.
/TIBERIU DAN ONUTA/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
Prosecution Insights